This patch improves Rx packet type offload report in case the device is
a virtual function device.
In these devices we observed that the L2 tunnel flag is set also for
non-tunneled packets, this leads to a complete misinterpretation of the
packet type being received.
This issue occurs since the tunnel_mode is not set to 0x7 by the driver
for virtual devices and therefore the value in the L2 tunnel flag is
meaningless and should be ignored.
Fixes:
aee4a03fee4f ("net/mlx4: enhance Rx packet type offloads")
Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
{
static const uint32_t ptypes[] = {
+ /* refers to rxq_cq_to_pkt_type() */
+ RTE_PTYPE_L2_ETHER,
+ RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
+ RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
+ RTE_PTYPE_L4_FRAG,
+ RTE_PTYPE_L4_TCP,
+ RTE_PTYPE_L4_UDP,
+ RTE_PTYPE_UNKNOWN
+ };
+ static const uint32_t ptypes_l2tun[] = {
/* refers to rxq_cq_to_pkt_type() */
RTE_PTYPE_L2_ETHER,
RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
RTE_PTYPE_UNKNOWN
};
+ struct priv *priv = dev->data->dev_private;
- if (dev->rx_pkt_burst == mlx4_rx_burst)
- return ptypes;
+ if (dev->rx_pkt_burst == mlx4_rx_burst) {
+ if (priv->hw_csum_l2tun)
+ return ptypes_l2tun;
+ else
+ return ptypes;
+ }
return NULL;
}
dev->data->dev_conf.rxmode.hw_ip_checksum),
.csum_l2tun = (priv->hw_csum_l2tun &&
dev->data->dev_conf.rxmode.hw_ip_checksum),
+ .l2tun_offload = priv->hw_csum_l2tun,
.stats = {
.idx = idx,
},
* Packet type for struct rte_mbuf.
*/
static inline uint32_t
-rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe)
+rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe,
+ uint32_t l2tun_offload)
{
uint8_t idx = 0;
uint32_t pinfo = rte_be_to_cpu_32(cqe->vlan_my_qpn);
* bit[7] - MLX4_CQE_L2_TUNNEL
* bit[6] - MLX4_CQE_L2_TUNNEL_IPV4
*/
- if (!(pinfo & MLX4_CQE_L2_VLAN_MASK) && (pinfo & MLX4_CQE_L2_TUNNEL))
+ if (l2tun_offload && (pinfo & MLX4_CQE_L2_TUNNEL))
idx |= ((pinfo & MLX4_CQE_L2_TUNNEL) >> 20) |
((pinfo & MLX4_CQE_L2_TUNNEL_IPV4) >> 19);
/*
}
pkt = seg;
/* Update packet information. */
- pkt->packet_type = rxq_cq_to_pkt_type(cqe);
+ pkt->packet_type =
+ rxq_cq_to_pkt_type(cqe, rxq->l2tun_offload);
pkt->ol_flags = 0;
pkt->pkt_len = len;
if (rxq->csum | rxq->csum_l2tun) {
volatile uint32_t *rq_db; /**< RQ doorbell record. */
uint32_t csum:1; /**< Enable checksum offloading. */
uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
+ uint32_t l2tun_offload:1; /**< L2 tunnel offload is enabled. */
struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
struct mlx4_rxq_stats stats; /**< Rx queue counters. */
unsigned int socket; /**< CPU socket ID for allocations. */