Eliminate some semantic warnings, static analysis warnings.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
nvms = (struct ice_nvm_table *)(ice_seg->device_table +
LE32_TO_CPU(ice_seg->device_table_count));
- return (struct ice_buf_table *)
+ return (_FORCE_ struct ice_buf_table *)
(nvms->vers + LE32_TO_CPU(nvms->table_count));
}
case ICE_SID_XLT2_ACL:
case ICE_SID_XLT2_PE:
xlt2 = (struct ice_xlt2_section *)sect;
- src = (u8 *)xlt2->value;
+ src = (_FORCE_ u8 *)xlt2->value;
sect_len = LE16_TO_CPU(xlt2->count) *
sizeof(*hw->blk[block_id].xlt2.t);
dst = (u8 *)hw->blk[block_id].xlt2.t;
/* fill in the swap array */
si = hw->blk[ICE_BLK_FD].es.fvw - 1;
- do {
+ while (si >= 0) {
u8 indexes_used = 1;
/* assume flat at this index */
}
si -= indexes_used;
- } while (si >= 0);
+ }
/* for each set of 4 swap indexes, write the appropriate register */
for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
const ice_bitmap_t *src;
u32 hdrs;
- if (i > 0 && (i + 1) < prof->segs_cnt)
- continue;
-
hdrs = prof->segs[i].hdrs;
if (hdrs & ICE_FLOW_SEG_HDR_ETH) {
status = ice_read_sr_aq(hw, offset, 1, data, true);
if (!status)
- *data = LE16_TO_CPU(*(__le16 *)data);
+ *data = LE16_TO_CPU(*(_FORCE_ __le16 *)data);
return status;
}
} while (words_read < *words);
for (i = 0; i < *words; i++)
- data[i] = LE16_TO_CPU(((__le16 *)data)[i]);
+ data[i] = LE16_TO_CPU(((_FORCE_ __le16 *)data)[i]);
read_nvm_buf_aq_exit:
*words = words_read;
u16 field;
u16 proto_type;
u16 vni;
+ u16 reserved;
};
struct ice_nvgre {
return ICE_ERR_PARAM;
buf_size = count * sizeof(__le16);
- mr_list = (__le16 *)ice_malloc(hw, buf_size);
+ mr_list = (_FORCE_ __le16 *)ice_malloc(hw, buf_size);
if (!mr_list)
return ICE_ERR_NO_MEMORY;
break;
return -1;
}
-
/**
* ice_fill_sw_rule - Helper function to fill switch rule structure
* @hw: pointer to the hardware structure
__be16 *off;
u8 q_rgn;
-
if (opc == ice_aqc_opc_remove_sw_rules) {
s_rule->pdata.lkup_tx_rx.act = 0;
s_rule->pdata.lkup_tx_rx.index =
daddr = f_info->l_data.ethertype_mac.mac_addr;
/* fall-through */
case ICE_SW_LKUP_ETHERTYPE:
- off = (__be16 *)(eth_hdr + ICE_ETH_ETHTYPE_OFFSET);
+ off = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_ETHTYPE_OFFSET);
*off = CPU_TO_BE16(f_info->l_data.ethertype_mac.ethertype);
break;
case ICE_SW_LKUP_MAC_VLAN:
ICE_NONDMA_TO_NONDMA);
if (!(vlan_id > ICE_MAX_VLAN_ID)) {
- off = (__be16 *)(eth_hdr + ICE_ETH_VLAN_TCI_OFFSET);
+ off = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_VLAN_TCI_OFFSET);
*off = CPU_TO_BE16(vlan_id);
}
#define BITS_PER_BYTE 8
+#ifndef _FORCE_
+#define _FORCE_
+#endif
+
#define ICE_BYTES_PER_WORD 2
#define ICE_BYTES_PER_DWORD 4
#define ICE_MAX_TRAFFIC_CLASS 8
#endif
#ifndef IS_ASCII
-#define IS_ASCII(_ch) ((_ch) < 0x80)
+#define IS_ASCII(_ch) ((_ch) < 0x80)
#endif
#include "ice_status.h"
u8 pf_id; /* device profile info */
u16 max_burst_size; /* driver sets this value */
+
/* Tx Scheduler values */
u16 num_tx_sched_layers;
u16 num_tx_sched_phys_layers;