net/dpaa2: set data align option in MC firmware
authorHemant Agrawal <hemant.agrawal@nxp.com>
Thu, 22 Jun 2017 13:57:09 +0000 (19:27 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 6 Jul 2017 13:00:56 +0000 (15:00 +0200)
Configuring the MC FW to configure data alignment by default.
This help in improving performance for some of the platform variants.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
drivers/net/dpaa2/base/dpaa2_hw_dpni.c

index 547025d..8bf7687 100644 (file)
@@ -313,11 +313,13 @@ dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
        layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
                         DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
                         DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
+                        DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
                         DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
 
        layout.pass_frame_status = 1;
        layout.private_data_size = DPAA2_FD_PTA_SIZE;
        layout.pass_parser_result = 1;
+       layout.data_align = DPAA2_PACKET_LAYOUT_ALIGN;
        layout.data_head_room = tot_size - DPAA2_FD_PTA_SIZE -
                                DPAA2_MBUF_HW_ANNOTATION;
        retcode = dpni_set_buffer_layout(dpni, CMD_PRI_LOW, priv->token,
@@ -332,9 +334,8 @@ dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
        bpool_cfg.num_dpbp = 1;
        bpool_cfg.pools[0].dpbp_id = bp_list->buf_pool.dpbp_node->dpbp_id;
        bpool_cfg.pools[0].backup_pool = 0;
-       bpool_cfg.pools[0].buffer_size =
-               RTE_ALIGN_CEIL(bp_list->buf_pool.size,
-                              256 /*DPAA2_PACKET_LAYOUT_ALIGN*/);
+       bpool_cfg.pools[0].buffer_size = RTE_ALIGN_CEIL(bp_list->buf_pool.size,
+                                               DPAA2_PACKET_LAYOUT_ALIGN);
 
        retcode = dpni_set_pools(dpni, CMD_PRI_LOW, priv->token, &bpool_cfg);
        if (retcode != 0) {