net/bnxt: support RSS hash selection

Add support to select RSS hash based on innermost or outermost
headers. If an application is started without any specific settings
the default mode configured by FW or HW shall be used.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>

diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst
index 808bdc4e54814f74ba10614d611775759a4a7c0c..62e36a52884ee240f05dd8091c81b71e4e50a81b 100644 (file)
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -60,6 +60,7 @@ New Features
   Updated the Broadcom bnxt driver with new features and improvements, including:
 
   * Added support for 200G PAM4 link speed.
+  * Added support for RSS hash level selection.
 
 * **Updated Cisco enic driver.**
 

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 19d4774c56738394a240b249a42f61e343fb2da5..ae38428e69bfe3d53d1c8cd9eaee28f9cb78cf2e 100644 (file)
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -558,7 +558,8 @@ struct bnxt_rep_info {
        ETH_RSS_NONFRAG_IPV4_UDP |      \
        ETH_RSS_IPV6 |          \
        ETH_RSS_NONFRAG_IPV6_TCP |      \
-       ETH_RSS_NONFRAG_IPV6_UDP)
+       ETH_RSS_NONFRAG_IPV6_UDP |      \
+       ETH_RSS_LEVEL_MASK)
 
 #define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
                                     DEV_TX_OFFLOAD_IPV4_CKSUM | \
@@ -671,6 +672,7 @@ struct bnxt {
 
        uint32_t                vnic_cap_flags;
 #define BNXT_VNIC_CAP_COS_CLASSIFY     BIT(0)
+#define BNXT_VNIC_CAP_OUTER_RSS                BIT(1)
        unsigned int            rx_nr_rings;
        unsigned int            rx_cp_nr_rings;
        unsigned int            rx_num_qs_per_vnic;

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index a6812c1a66b64b3e607e11ce3f85ffd67dfd5d90..624cb203118113187870601d67844a5309da2851 100644 (file)
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -1898,6 +1898,9 @@ static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
        /* Update the default RSS VNIC(s) */
        vnic = BNXT_GET_DEFAULT_VNIC(bp);
        vnic->hash_type = bnxt_rte_to_hwrm_hash_types(rss_conf->rss_hf);
+       vnic->hash_mode =
+               bnxt_rte_to_hwrm_hash_level(bp, rss_conf->rss_hf,
+                                           ETH_RSS_LEVEL(rss_conf->rss_hf));
 
        /*
         * If hashkey is not specified, use the previously configured
@@ -1968,6 +1971,10 @@ static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
                        hash_types &=
                                ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
                }
+
+               rss_conf->rss_hf |=
+                       bnxt_hwrm_to_rte_rss_level(bp, vnic->hash_mode);
+
                if (hash_types) {
                        PMD_DRV_LOG(ERR,
                                "Unknown RSS config from firmware (%08x), RSS disabled",

diff --git a/drivers/net/bnxt/bnxt_flow.c b/drivers/net/bnxt/bnxt_flow.c
index c1c59bbe588f63a965e72dc3efffccb0c69c42d7..127d51c45b652ed47e5a0b441be3bc47fe1cc0b0 100644 (file)
--- a/drivers/net/bnxt/bnxt_flow.c
+++ b/drivers/net/bnxt/bnxt_flow.c
@@ -1365,6 +1365,8 @@ use_vnic:
                if (vnic->rx_queue_cnt > 1) {
                        vnic->hash_type =
                                bnxt_rte_to_hwrm_hash_types(rss->types);
+                       vnic->hash_mode =
+                       bnxt_rte_to_hwrm_hash_level(bp, rss->types, rss->level);
 
                        if (!rss->key_len) {
                                /* If hash key has not been specified,

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index c7e70c628d933f88482bcedc95d0ac3beb91e9c9..fc89cc29a6a571b3b39290f315b6be31899a61a0 100644 (file)
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -835,6 +835,7 @@ int bnxt_hwrm_func_qcaps(struct bnxt *bp)
 int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
 {
        int rc = 0;
+       uint32_t flags;
        struct hwrm_vnic_qcaps_input req = {.req_type = 0 };
        struct hwrm_vnic_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
 
@@ -846,12 +847,16 @@ int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
 
        HWRM_CHECK_RESULT();
 
-       if (rte_le_to_cpu_32(resp->flags) &
-           HWRM_VNIC_QCAPS_OUTPUT_FLAGS_COS_ASSIGNMENT_CAP) {
+       flags = rte_le_to_cpu_32(resp->flags);
+
+       if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_COS_ASSIGNMENT_CAP) {
                bp->vnic_cap_flags |= BNXT_VNIC_CAP_COS_CLASSIFY;
                PMD_DRV_LOG(INFO, "CoS assignment capability enabled\n");
        }
 
+       if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP)
+               bp->vnic_cap_flags |= BNXT_VNIC_CAP_OUTER_RSS;
+
        bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported);
 
        HWRM_UNLOCK();

diff --git a/drivers/net/bnxt/bnxt_rxq.c b/drivers/net/bnxt/bnxt_rxq.c
index 8cc77f7f9e0cb94d3139ef574e5c1cb890c4ffeb..1003ca6410cc0b01eadfe1adf9a18a364375b75c 100644 (file)
--- a/drivers/net/bnxt/bnxt_rxq.c
+++ b/drivers/net/bnxt/bnxt_rxq.c
@@ -172,9 +172,15 @@ out:
                        bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 
                for (i = 0; i < bp->nr_vnics; i++) {
+                       uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
+
                        vnic = &bp->vnic_info[i];
                        vnic->hash_type =
                                bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
+                       vnic->hash_mode =
+                               bnxt_rte_to_hwrm_hash_level(bp,
+                                                           rss->rss_hf,
+                                                           lvl);
 
                        /*
                         * Use the supplied key if the key length is

diff --git a/drivers/net/bnxt/bnxt_vnic.c b/drivers/net/bnxt/bnxt_vnic.c
index 9a135ae881b85d285b9ca6da0efe77892f1e1f98..1602fb2b88bc46d96078d9803c28f458266222eb 100644 (file)
--- a/drivers/net/bnxt/bnxt_vnic.c
+++ b/drivers/net/bnxt/bnxt_vnic.c
@@ -253,3 +253,69 @@ uint16_t bnxt_rte_to_hwrm_hash_types(uint64_t rte_type)
 
        return hwrm_type;
 }
+
+int bnxt_rte_to_hwrm_hash_level(struct bnxt *bp, uint64_t hash_f, uint32_t lvl)
+{
+       uint32_t mode = HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_DEFAULT;
+       bool l3 = (hash_f & (ETH_RSS_IPV4 | ETH_RSS_IPV6));
+       bool l4 = (hash_f & (ETH_RSS_NONFRAG_IPV4_UDP |
+                            ETH_RSS_NONFRAG_IPV6_UDP |
+                            ETH_RSS_NONFRAG_IPV4_TCP |
+                            ETH_RSS_NONFRAG_IPV6_TCP));
+       bool l3_only = l3 && !l4;
+       bool l3_and_l4 = l3 && l4;
+
+       /* If FW has not advertised capability to configure outer/inner
+        * RSS hashing , just log a message. HW will work in default RSS mode.
+        */
+       if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_OUTER_RSS)) {
+               PMD_DRV_LOG(ERR, "RSS hash level cannot be configured\n");
+               return mode;
+       }
+
+       switch (lvl) {
+       case BNXT_RSS_LEVEL_INNERMOST:
+               if (l3_and_l4 || l4)
+                       mode =
+                       HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_4;
+               else if (l3_only)
+                       mode =
+                       HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_2;
+               break;
+       case BNXT_RSS_LEVEL_OUTERMOST:
+               if (l3_and_l4 || l4)
+                       mode =
+                       HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_4;
+               else if (l3_only)
+                       mode =
+                       HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_2;
+               break;
+       default:
+               mode = HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_DEFAULT;
+               break;
+       }
+
+       return mode;
+}
+
+uint64_t bnxt_hwrm_to_rte_rss_level(struct bnxt *bp, uint32_t mode)
+{
+       uint64_t rss_level = 0;
+
+       /* If FW has not advertised capability to configure inner/outer RSS
+        * return default hash mode.
+        */
+       if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_OUTER_RSS))
+               return ETH_RSS_LEVEL_PMD_DEFAULT;
+
+       if (mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_2 ||
+           mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_4)
+               rss_level |= ETH_RSS_LEVEL_OUTERMOST;
+       else if (mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_2 ||
+                mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_4)
+               rss_level |= ETH_RSS_LEVEL_INNERMOST;
+       else
+               rss_level |= ETH_RSS_LEVEL_PMD_DEFAULT;
+
+       return rss_level;
+}

diff --git a/drivers/net/bnxt/bnxt_vnic.h b/drivers/net/bnxt/bnxt_vnic.h
index a372b899bce8392b9e5c1a2efe6306225aefef23..2a6f05d9e42ccb69ab25d08d8586bd60fef43c60 100644 (file)
--- a/drivers/net/bnxt/bnxt_vnic.h
+++ b/drivers/net/bnxt/bnxt_vnic.h
@@ -11,6 +11,9 @@
 
 #define INVALID_VNIC_ID                ((uint16_t)-1)
 
+#define BNXT_RSS_LEVEL_INNERMOST        0x2
+#define BNXT_RSS_LEVEL_OUTERMOST        0x1
+
 struct bnxt_vnic_info {
        STAILQ_ENTRY(bnxt_vnic_info)    next;
        uint8_t         ff_pool_idx;
@@ -69,4 +72,6 @@ int bnxt_alloc_vnic_mem(struct bnxt *bp);
 int bnxt_vnic_grp_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic);
 void prandom_bytes(void *dest_ptr, size_t len);
 uint16_t bnxt_rte_to_hwrm_hash_types(uint64_t rte_type);
+int bnxt_rte_to_hwrm_hash_level(struct bnxt *bp, uint64_t hash_f, uint32_t lvl);
+uint64_t bnxt_hwrm_to_rte_rss_level(struct bnxt *bp, uint32_t mode);
 #endif