common/iavf: add enumeration for Rx descriptor ID

Support for allowing VFs to negotiate the descriptor format was added
previously.

This support requires that the VF specify which descriptor format to use
when requesting Rx queues. The VF is supposed to request the set of
supported formats via the new VIRTCHNL_OP_GET_SUPPORTED_RXDIDS, and then
set one of the supported formats in the rxdid field of the
virtchnl_rxq_info structure.

The virtchnl.h header does not provide an enumeration of the format
values. The existing implementations in the PF directly use the values
from the DDP package.

Make the formats explicit by defining an enumeration of the RXDIDs.
Provide an enumeration for the values as well as the bit positions as
returned by the supported_rxdids data from the
VIRTCHNL_OP_GET_SUPPORTED_RXDIDS.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>

diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index c68128f..d794f11 100644 (file)
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -432,6 +432,54 @@ struct virtchnl_txq_info {
 
 VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_txq_info);
 
+/* RX descriptor IDs (range from 0 to 63) */
+enum virtchnl_rx_desc_ids {
+       VIRTCHNL_RXDID_0_16B_BASE               = 0,
+       /* 32B_BASE and FLEX_SPLITQ share desc ids as default descriptors
+        * because they can be differentiated based on queue model; e.g. single
+        * queue model can only use 32B_BASE and split queue model can only use
+        * FLEX_SPLITQ.  Having these as 1 allows them to be used as default
+        * descriptors without negotiation.
+        */
+       VIRTCHNL_RXDID_1_32B_BASE               = 1,
+       VIRTCHNL_RXDID_1_FLEX_SPLITQ            = 1,
+       VIRTCHNL_RXDID_2_FLEX_SQ_NIC            = 2,
+       VIRTCHNL_RXDID_3_FLEX_SQ_SW             = 3,
+       VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB        = 4,
+       VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL        = 5,
+       VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2          = 6,
+       VIRTCHNL_RXDID_7_HW_RSVD                = 7,
+       /* 9 through 15 are reserved */
+       VIRTCHNL_RXDID_16_COMMS_GENERIC         = 16,
+       VIRTCHNL_RXDID_17_COMMS_AUX_VLAN        = 17,
+       VIRTCHNL_RXDID_18_COMMS_AUX_IPV4        = 18,
+       VIRTCHNL_RXDID_19_COMMS_AUX_IPV6        = 19,
+       VIRTCHNL_RXDID_20_COMMS_AUX_FLOW        = 20,
+       VIRTCHNL_RXDID_21_COMMS_AUX_TCP         = 21,
+       /* 22 through 63 are reserved */
+};
+
+/* RX descriptor ID bitmasks */
+enum virtchnl_rx_desc_id_bitmasks {
+       VIRTCHNL_RXDID_0_16B_BASE_M             = BIT(VIRTCHNL_RXDID_0_16B_BASE),
+       VIRTCHNL_RXDID_1_32B_BASE_M             = BIT(VIRTCHNL_RXDID_1_32B_BASE),
+       VIRTCHNL_RXDID_1_FLEX_SPLITQ_M          = BIT(VIRTCHNL_RXDID_1_FLEX_SPLITQ),
+       VIRTCHNL_RXDID_2_FLEX_SQ_NIC_M          = BIT(VIRTCHNL_RXDID_2_FLEX_SQ_NIC),
+       VIRTCHNL_RXDID_3_FLEX_SQ_SW_M           = BIT(VIRTCHNL_RXDID_3_FLEX_SQ_SW),
+       VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB_M      = BIT(VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB),
+       VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL_M      = BIT(VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL),
+       VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2_M        = BIT(VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2),
+       VIRTCHNL_RXDID_7_HW_RSVD_M              = BIT(VIRTCHNL_RXDID_7_HW_RSVD),
+       /* 9 through 15 are reserved */
+       VIRTCHNL_RXDID_16_COMMS_GENERIC_M       = BIT(VIRTCHNL_RXDID_16_COMMS_GENERIC),
+       VIRTCHNL_RXDID_17_COMMS_AUX_VLAN_M      = BIT(VIRTCHNL_RXDID_17_COMMS_AUX_VLAN),
+       VIRTCHNL_RXDID_18_COMMS_AUX_IPV4_M      = BIT(VIRTCHNL_RXDID_18_COMMS_AUX_IPV4),
+       VIRTCHNL_RXDID_19_COMMS_AUX_IPV6_M      = BIT(VIRTCHNL_RXDID_19_COMMS_AUX_IPV6),
+       VIRTCHNL_RXDID_20_COMMS_AUX_FLOW_M      = BIT(VIRTCHNL_RXDID_20_COMMS_AUX_FLOW),
+       VIRTCHNL_RXDID_21_COMMS_AUX_TCP_M       = BIT(VIRTCHNL_RXDID_21_COMMS_AUX_TCP),
+       /* 22 through 63 are reserved */
+};
+
 /* VIRTCHNL_OP_CONFIG_RX_QUEUE
  * VF sends this message to set up parameters for one RX queue.
  * External data buffer contains one instance of virtchnl_rxq_info.
@@ -454,7 +502,11 @@ struct virtchnl_rxq_info {
        u32 databuffer_size;
        u32 max_pkt_size;
        u8 crc_disable;
-       /* only used when VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC is supported */
+       /* see enum virtchnl_rx_desc_ids;
+        * only used when VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC is supported. Note
+        * that when the offload is not supported, the descriptor format aligns
+        * with VIRTCHNL_RXDID_1_32B_BASE.
+        */
        u8 rxdid;
        u8 pad1[2];
        u64 dma_ring_addr;
@@ -1294,6 +1346,7 @@ struct virtchnl_dcf_vlan_offload {
 VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_dcf_vlan_offload);
 
 struct virtchnl_supported_rxdids {
+       /* see enum virtchnl_rx_desc_id_bitmasks */
        u64 supported_rxdids;
 };