Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.
Example:
--dev "0002:1e:00.0,tim_stats_ena=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
-a 0002:0e:00.0,tim_chnk_slots=1023
+- ``TIM enable arm/cancel statistics``
+
+ The ``tim_stats_ena`` devargs can be used to enable arm and cancel stats of
+ event timer adapter.
+
+ For example::
+
+ -a 0002:0e:00.0,tim_stats_ena=1
+
- ``TIM limit max rings reserved``
The ``tim_rings_lmt`` devargs can be used to limit the max number of TIM
CN10K_SSO_GW_MODE "=<int>"
CNXK_TIM_DISABLE_NPA "=1"
CNXK_TIM_CHNK_SLOTS "=<int>"
- CNXK_TIM_RINGS_LMT "=<int>");
+ CNXK_TIM_RINGS_LMT "=<int>"
+ CNXK_TIM_STATS_ENA "=1");
CN9K_SSO_SINGLE_WS "=1"
CNXK_TIM_DISABLE_NPA "=1"
CNXK_TIM_CHNK_SLOTS "=<int>"
- CNXK_TIM_RINGS_LMT "=<int>");
+ CNXK_TIM_RINGS_LMT "=<int>"
+ CNXK_TIM_STATS_ENA "=1");
{
uint8_t prod_flag = !tim_ring->prod_type_sp;
- /* [DFB/FB] [SP][MP]*/
- const rte_event_timer_arm_burst_t arm_burst[2][2] = {
-#define FP(_name, _f2, _f1, flags) [_f2][_f1] = cnxk_tim_arm_burst_##_name,
+ /* [STATS] [DFB/FB] [SP][MP]*/
+ const rte_event_timer_arm_burst_t arm_burst[2][2][2] = {
+#define FP(_name, _f3, _f2, _f1, flags) \
+ [_f3][_f2][_f1] = cnxk_tim_arm_burst_##_name,
TIM_ARM_FASTPATH_MODES
#undef FP
};
- const rte_event_timer_arm_tmo_tick_burst_t arm_tmo_burst[2] = {
-#define FP(_name, _f1, flags) [_f1] = cnxk_tim_arm_tmo_tick_burst_##_name,
+ const rte_event_timer_arm_tmo_tick_burst_t arm_tmo_burst[2][2] = {
+#define FP(_name, _f2, _f1, flags) \
+ [_f2][_f1] = cnxk_tim_arm_tmo_tick_burst_##_name,
TIM_ARM_TMO_FASTPATH_MODES
#undef FP
};
- cnxk_tim_ops.arm_burst = arm_burst[tim_ring->ena_dfb][prod_flag];
- cnxk_tim_ops.arm_tmo_tick_burst = arm_tmo_burst[tim_ring->ena_dfb];
+ cnxk_tim_ops.arm_burst =
+ arm_burst[tim_ring->enable_stats][tim_ring->ena_dfb][prod_flag];
+ cnxk_tim_ops.arm_tmo_tick_burst =
+ arm_tmo_burst[tim_ring->enable_stats][tim_ring->ena_dfb];
cnxk_tim_ops.cancel_burst = cnxk_tim_timer_cancel_burst;
}
tim_ring->nb_timers = rcfg->nb_timers;
tim_ring->chunk_sz = dev->chunk_sz;
tim_ring->disable_npa = dev->disable_npa;
+ tim_ring->enable_stats = dev->enable_stats;
if (tim_ring->disable_npa) {
tim_ring->nb_chunks =
return 0;
}
+static int
+cnxk_tim_stats_get(const struct rte_event_timer_adapter *adapter,
+ struct rte_event_timer_adapter_stats *stats)
+{
+ struct cnxk_tim_ring *tim_ring = adapter->data->adapter_priv;
+ uint64_t bkt_cyc = cnxk_tim_cntvct() - tim_ring->ring_start_cyc;
+
+ stats->evtim_exp_count =
+ __atomic_load_n(&tim_ring->arm_cnt, __ATOMIC_RELAXED);
+ stats->ev_enq_count = stats->evtim_exp_count;
+ stats->adapter_tick_count =
+ rte_reciprocal_divide_u64(bkt_cyc, &tim_ring->fast_div);
+ return 0;
+}
+
+static int
+cnxk_tim_stats_reset(const struct rte_event_timer_adapter *adapter)
+{
+ struct cnxk_tim_ring *tim_ring = adapter->data->adapter_priv;
+
+ __atomic_store_n(&tim_ring->arm_cnt, 0, __ATOMIC_RELAXED);
+ return 0;
+}
+
int
cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,
uint32_t *caps,
cnxk_tim_ops.uninit = cnxk_tim_ring_free;
cnxk_tim_ops.get_info = cnxk_tim_ring_info_get;
+ if (dev->enable_stats) {
+ cnxk_tim_ops.stats_get = cnxk_tim_stats_get;
+ cnxk_tim_ops.stats_reset = cnxk_tim_stats_reset;
+ }
+
/* Store evdev pointer for later use. */
dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;
*caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
&dev->disable_npa);
rte_kvargs_process(kvlist, CNXK_TIM_CHNK_SLOTS, &parse_kvargs_value,
&dev->chunk_slots);
+ rte_kvargs_process(kvlist, CNXK_TIM_STATS_ENA, &parse_kvargs_flag,
+ &dev->enable_stats);
rte_kvargs_process(kvlist, CNXK_TIM_RINGS_LMT, &parse_kvargs_value,
&dev->min_ring_cnt);
#define CNXK_TIM_DISABLE_NPA "tim_disable_npa"
#define CNXK_TIM_CHNK_SLOTS "tim_chnk_slots"
+#define CNXK_TIM_STATS_ENA "tim_stats_ena"
#define CNXK_TIM_RINGS_LMT "tim_rings_lmt"
-#define CNXK_TIM_SP 0x1
-#define CNXK_TIM_MP 0x2
-#define CNXK_TIM_ENA_FB 0x10
-#define CNXK_TIM_ENA_DFB 0x20
+#define CNXK_TIM_SP 0x1
+#define CNXK_TIM_MP 0x2
+#define CNXK_TIM_ENA_FB 0x10
+#define CNXK_TIM_ENA_DFB 0x20
+#define CNXK_TIM_ENA_STATS 0x40
#define TIM_BUCKET_W1_S_CHUNK_REMAINDER (48)
#define TIM_BUCKET_W1_M_CHUNK_REMAINDER \
uint8_t disable_npa;
uint16_t chunk_slots;
uint16_t min_ring_cnt;
+ uint8_t enable_stats;
};
enum cnxk_tim_clk_src {
struct rte_reciprocal_u64 fast_bkt;
uint64_t arm_cnt;
uint8_t prod_type_sp;
+ uint8_t enable_stats;
uint8_t disable_npa;
uint8_t ena_dfb;
uint16_t ring_id;
#endif
#define TIM_ARM_FASTPATH_MODES \
- FP(sp, 0, 0, CNXK_TIM_ENA_DFB | CNXK_TIM_SP) \
- FP(mp, 0, 1, CNXK_TIM_ENA_DFB | CNXK_TIM_MP) \
- FP(fb_sp, 1, 0, CNXK_TIM_ENA_FB | CNXK_TIM_SP) \
- FP(fb_mp, 1, 1, CNXK_TIM_ENA_FB | CNXK_TIM_MP)
+ FP(sp, 0, 0, 0, CNXK_TIM_ENA_DFB | CNXK_TIM_SP) \
+ FP(mp, 0, 0, 1, CNXK_TIM_ENA_DFB | CNXK_TIM_MP) \
+ FP(fb_sp, 0, 1, 0, CNXK_TIM_ENA_FB | CNXK_TIM_SP) \
+ FP(fb_mp, 0, 1, 1, CNXK_TIM_ENA_FB | CNXK_TIM_MP) \
+ FP(stats_sp, 1, 0, 0, \
+ CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_DFB | CNXK_TIM_SP) \
+ FP(stats_mp, 1, 0, 1, \
+ CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_DFB | CNXK_TIM_MP) \
+ FP(stats_fb_sp, 1, 1, 0, \
+ CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_FB | CNXK_TIM_SP) \
+ FP(stats_fb_mp, 1, 1, 1, \
+ CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_FB | CNXK_TIM_MP)
#define TIM_ARM_TMO_FASTPATH_MODES \
- FP(dfb, 0, CNXK_TIM_ENA_DFB) \
- FP(fb, 1, CNXK_TIM_ENA_FB)
+ FP(dfb, 0, 0, CNXK_TIM_ENA_DFB) \
+ FP(fb, 0, 1, CNXK_TIM_ENA_FB) \
+ FP(stats_dfb, 1, 0, CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_DFB) \
+ FP(stats_fb, 1, 1, CNXK_TIM_ENA_STATS | CNXK_TIM_ENA_FB)
-#define FP(_name, _f2, _f1, flags) \
+#define FP(_name, _f3, _f2, _f1, flags) \
uint16_t cnxk_tim_arm_burst_##_name( \
const struct rte_event_timer_adapter *adptr, \
struct rte_event_timer **tim, const uint16_t nb_timers);
TIM_ARM_FASTPATH_MODES
#undef FP
-#define FP(_name, _f1, flags) \
+#define FP(_name, _f2, _f1, flags) \
uint16_t cnxk_tim_arm_tmo_tick_burst_##_name( \
const struct rte_event_timer_adapter *adptr, \
struct rte_event_timer **tim, const uint64_t timeout_tick, \
}
}
+ if (flags & CNXK_TIM_ENA_STATS)
+ __atomic_fetch_add(&tim_ring->arm_cnt, index, __ATOMIC_RELAXED);
+
return index;
}
-#define FP(_name, _f2, _f1, _flags) \
+#define FP(_name, _f3, _f2, _f1, _flags) \
uint16_t __rte_noinline cnxk_tim_arm_burst_##_name( \
const struct rte_event_timer_adapter *adptr, \
struct rte_event_timer **tim, const uint16_t nb_timers) \
break;
}
+ if (flags & CNXK_TIM_ENA_STATS)
+ __atomic_fetch_add(&tim_ring->arm_cnt, set_timers,
+ __ATOMIC_RELAXED);
+
return set_timers;
}
-#define FP(_name, _f1, _flags) \
+#define FP(_name, _f2, _f1, _flags) \
uint16_t __rte_noinline cnxk_tim_arm_tmo_tick_burst_##_name( \
const struct rte_event_timer_adapter *adptr, \
struct rte_event_timer **tim, const uint64_t timeout_tick, \