dpaa2_cpu[lcore_id] = 0xffffffff;
for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
- for (i = 0; i < RTE_MAX_LCORE; i++) {
- rte_cpuset_t cpuset = rte_lcore_cpuset(lcore_id);
-
- if (CPU_ISSET(i, &cpuset)) {
- RTE_LOG(DEBUG, EAL, "lcore id = %u cpu=%u\n",
- lcore_id, i);
- if (dpaa2_cpu[lcore_id] != 0xffffffff) {
- DPAA2_BUS_ERR(
- "ERR:lcore map to multi-cpu not supported");
- ret = -1;
- } else {
- dpaa2_cpu[lcore_id] = i;
- }
+ rte_cpuset_t cpuset = rte_lcore_cpuset(lcore_id);
+
+ for (i = 0; i < CPU_SETSIZE; i++) {
+ if (!CPU_ISSET(i, &cpuset))
+ continue;
+ if (i >= RTE_MAX_LCORE) {
+ DPAA2_BUS_ERR("ERR:lcore map to core %u (>= %u) not supported",
+ i, RTE_MAX_LCORE);
+ ret = -1;
+ continue;
}
+ RTE_LOG(DEBUG, EAL, "lcore id = %u cpu=%u\n",
+ lcore_id, i);
+ if (dpaa2_cpu[lcore_id] != 0xffffffff) {
+ DPAA2_BUS_ERR("ERR:lcore map to multi-cpu not supported");
+ ret = -1;
+ continue;
+ }
+ dpaa2_cpu[lcore_id] = i;
}
}
return ret;
* ',' used for a single number.
*/
static int
-eal_parse_set(const char *input, uint16_t set[], unsigned num)
+eal_parse_set(const char *input, rte_cpuset_t *set)
{
unsigned idx;
const char *str = input;
char *end = NULL;
unsigned min, max;
- memset(set, 0, num * sizeof(uint16_t));
+ CPU_ZERO(set);
while (isblank(*str))
str++;
if (*str != '(') {
errno = 0;
idx = strtoul(str, &end, 10);
- if (errno || end == NULL || idx >= num)
+ if (errno || end == NULL || idx >= CPU_SETSIZE)
return -1;
else {
while (isblank(*end))
errno = 0;
idx = strtoul(end, &end, 10);
- if (errno || end == NULL || idx >= num)
+ if (errno || end == NULL || idx >= CPU_SETSIZE)
return -1;
max = idx;
while (isblank(*end))
for (idx = RTE_MIN(min, max);
idx <= RTE_MAX(min, max); idx++)
- set[idx] = 1;
+ CPU_SET(idx, set);
return end - input;
}
/* get the digit value */
errno = 0;
idx = strtoul(str, &end, 10);
- if (errno || end == NULL || idx >= num)
+ if (errno || end == NULL || idx >= CPU_SETSIZE)
return -1;
/* go ahead to separator '-',',' and ')' */
min = idx;
for (idx = RTE_MIN(min, max);
idx <= RTE_MAX(min, max); idx++)
- set[idx] = 1;
+ CPU_SET(idx, set);
min = RTE_MAX_LCORE;
} else
return str - input;
}
-/* convert from set array to cpuset bitmap */
static int
-convert_to_cpuset(rte_cpuset_t *cpusetp,
- uint16_t *set, unsigned num)
+check_cpuset(rte_cpuset_t *set)
{
- unsigned idx;
-
- CPU_ZERO(cpusetp);
+ unsigned int idx;
- for (idx = 0; idx < num; idx++) {
- if (!set[idx])
+ for (idx = 0; idx < CPU_SETSIZE; idx++) {
+ if (!CPU_ISSET(idx, set))
continue;
if (eal_cpu_detected(idx) == 0) {
"unavailable\n", idx);
return -1;
}
-
- CPU_SET(idx, cpusetp);
}
-
return 0;
}
eal_parse_lcores(const char *lcores)
{
struct rte_config *cfg = rte_eal_get_configuration();
- static uint16_t set[RTE_MAX_LCORE];
+ rte_cpuset_t lcore_set;
+ unsigned int set_count;
unsigned idx = 0;
unsigned count = 0;
const char *lcore_start = NULL;
lcores += strcspn(lcores, "@,");
if (*lcores == '@') {
- /* explicit assign cpu_set */
- offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
+ /* explicit assign cpuset and update the end cursor */
+ offset = eal_parse_set(lcores + 1, &cpuset);
if (offset < 0)
goto err;
-
- /* prepare cpu_set and update the end cursor */
- if (0 > convert_to_cpuset(&cpuset,
- set, RTE_DIM(set)))
- goto err;
end = lcores + 1 + offset;
} else { /* ',' or '\0' */
- /* haven't given cpu_set, current loop done */
+ /* haven't given cpuset, current loop done */
end = lcores;
/* go back to check <number>-<number> */
goto err;
/* parse lcore_set from start point */
- if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
+ if (eal_parse_set(lcore_start, &lcore_set) < 0)
goto err;
- /* without '@', by default using lcore_set as cpu_set */
- if (*lcores != '@' &&
- 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
- goto err;
+ /* without '@', by default using lcore_set as cpuset */
+ if (*lcores != '@')
+ rte_memcpy(&cpuset, &lcore_set, sizeof(cpuset));
+ set_count = CPU_COUNT(&lcore_set);
/* start to update lcore_set */
for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
- if (!set[idx])
+ if (!CPU_ISSET(idx, &lcore_set))
continue;
+ set_count--;
if (cfg->lcore_role[idx] != ROLE_RTE) {
lcore_config[idx].core_index = count;
CPU_ZERO(&cpuset);
CPU_SET(idx, &cpuset);
}
+
+ if (check_cpuset(&cpuset) < 0)
+ goto err;
rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
sizeof(rte_cpuset_t));
}
+ /* some cores from the lcore_set can't be handled by EAL */
+ if (set_count != 0)
+ goto err;
+
lcores = end + 1;
} while (*end != '\0');