net/ixgbe: fix overwriting RSS RETA
authorXiaoyun Li <xiaoyun.li@intel.com>
Tue, 4 Dec 2018 04:37:57 +0000 (12:37 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 13 Dec 2018 16:40:25 +0000 (16:40 +0000)
When starting the device, the RSS table is initialized. So the RSS
update before device_start would be overwritten. This patch allows users
to update the RSS reta table before device_start.

Fixes: db5b65301dde ("ethdev: allow to set RSS hash computation flags and/or key")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
drivers/net/ixgbe/ixgbe_ethdev.c
drivers/net/ixgbe/ixgbe_ethdev.h
drivers/net/ixgbe/ixgbe_rxtx.c

index 91ba620..7493110 100644 (file)
@@ -2790,6 +2790,8 @@ static void
 ixgbe_dev_stop(struct rte_eth_dev *dev)
 {
        struct rte_eth_link link;
+       struct ixgbe_adapter *adapter =
+               (struct ixgbe_adapter *)dev->data->dev_private;
        struct ixgbe_hw *hw =
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct ixgbe_vf_info *vfinfo =
@@ -2850,6 +2852,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
 
        /* reset hierarchy commit */
        tm_conf->committed = false;
+
+       adapter->rss_reta_updated = 0;
 }
 
 /*
@@ -4779,6 +4783,8 @@ ixgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
        uint8_t j, mask;
        uint32_t reta, r;
        uint16_t idx, shift;
+       struct ixgbe_adapter *adapter =
+               (struct ixgbe_adapter *)dev->data->dev_private;
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        uint32_t reta_reg;
 
@@ -4820,6 +4826,7 @@ ixgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
                }
                IXGBE_WRITE_REG(hw, reta_reg, reta);
        }
+       adapter->rss_reta_updated = 1;
 
        return 0;
 }
@@ -5143,6 +5150,8 @@ static void
 ixgbevf_dev_stop(struct rte_eth_dev *dev)
 {
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       struct ixgbe_adapter *adapter =
+               (struct ixgbe_adapter *)dev->data->dev_private;
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
        struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 
@@ -5172,6 +5181,8 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)
                rte_free(intr_handle->intr_vec);
                intr_handle->intr_vec = NULL;
        }
+
+       adapter->rss_reta_updated = 0;
 }
 
 static void
index d0b9396..565c69c 100644 (file)
@@ -490,6 +490,9 @@ struct ixgbe_adapter {
        struct rte_timecounter      rx_tstamp_tc;
        struct rte_timecounter      tx_tstamp_tc;
        struct ixgbe_tm_conf        tm_conf;
+
+       /* For RSS reta table update */
+       uint8_t rss_reta_updated;
 };
 
 struct ixgbe_vf_representor {
index 7771d0e..9a79d18 100644 (file)
@@ -3418,6 +3418,7 @@ static void
 ixgbe_rss_configure(struct rte_eth_dev *dev)
 {
        struct rte_eth_rss_conf rss_conf;
+       struct ixgbe_adapter *adapter;
        struct ixgbe_hw *hw;
        uint32_t reta;
        uint16_t i;
@@ -3426,6 +3427,7 @@ ixgbe_rss_configure(struct rte_eth_dev *dev)
        uint32_t reta_reg;
 
        PMD_INIT_FUNC_TRACE();
+       adapter = (struct ixgbe_adapter *)dev->data->dev_private;
        hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
        sp_reta_size = ixgbe_reta_size_get(hw->mac.type);
@@ -3435,16 +3437,18 @@ ixgbe_rss_configure(struct rte_eth_dev *dev)
         * The byte-swap is needed because NIC registers are in
         * little-endian order.
         */
-       reta = 0;
-       for (i = 0, j = 0; i < sp_reta_size; i++, j++) {
-               reta_reg = ixgbe_reta_reg_get(hw->mac.type, i);
-
-               if (j == dev->data->nb_rx_queues)
-                       j = 0;
-               reta = (reta << 8) | j;
-               if ((i & 3) == 3)
-                       IXGBE_WRITE_REG(hw, reta_reg,
-                                       rte_bswap32(reta));
+       if (adapter->rss_reta_updated == 0) {
+               reta = 0;
+               for (i = 0, j = 0; i < sp_reta_size; i++, j++) {
+                       reta_reg = ixgbe_reta_reg_get(hw->mac.type, i);
+
+                       if (j == dev->data->nb_rx_queues)
+                               j = 0;
+                       reta = (reta << 8) | j;
+                       if ((i & 3) == 3)
+                               IXGBE_WRITE_REG(hw, reta_reg,
+                                               rte_bswap32(reta));
+               }
        }
 
        /*