mempool/cnxk: add cn10k mempool operations

Add Marvell CN10k mempool ops and implement CN10k mempool alloc.

CN10k has 64 bytes L1D cache line size. Hence the CN10k mempool
alloc does not make the element size an odd multiple L1D cache
line size as NPA requires the element sizes to be multiples of
128 bytes.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>

diff --git a/doc/guides/mempool/cnxk.rst b/doc/guides/mempool/cnxk.rst
index 8568fdb..76a0244 100644 (file)
--- a/doc/guides/mempool/cnxk.rst
+++ b/doc/guides/mempool/cnxk.rst
@@ -80,3 +80,7 @@ Standalone mempool device
    device. In case, if end user need to run mempool as a standalone device
    (without ethdev or eventdev), end user needs to bind a mempool device using
    ``usertools/dpdk-devbind.py``
+
+   Example command to run ``mempool_autotest`` test with standalone CN10K NPA device::
+
+     echo "mempool_autotest" | <build_dir>/app/test/dpdk-test -c 0xf0 --mbuf-pool-ops-name="cn10k_mempool_ops"

diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c
new file mode 100644 (file)
index 0000000..9b63789
--- /dev/null
+++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include <rte_mempool.h>
+
+#include "roc_api.h"
+#include "cnxk_mempool.h"
+
+static int
+cn10k_mempool_alloc(struct rte_mempool *mp)
+{
+       uint32_t block_size;
+       size_t padding;
+
+       block_size = mp->elt_size + mp->header_size + mp->trailer_size;
+       /* Align header size to ROC_ALIGN */
+       if (mp->header_size % ROC_ALIGN != 0) {
+               padding = RTE_ALIGN_CEIL(mp->header_size, ROC_ALIGN) -
+                         mp->header_size;
+               mp->header_size += padding;
+               block_size += padding;
+       }
+
+       /* Align block size to ROC_ALIGN */
+       if (block_size % ROC_ALIGN != 0) {
+               padding = RTE_ALIGN_CEIL(block_size, ROC_ALIGN) - block_size;
+               mp->trailer_size += padding;
+               block_size += padding;
+       }
+
+       return cnxk_mempool_alloc(mp);
+}
+
+static void
+cn10k_mempool_free(struct rte_mempool *mp)
+{
+       cnxk_mempool_free(mp);
+}
+
+static struct rte_mempool_ops cn10k_mempool_ops = {
+       .name = "cn10k_mempool_ops",
+       .alloc = cn10k_mempool_alloc,
+       .free = cn10k_mempool_free,
+       .enqueue = cnxk_mempool_enq,
+       .dequeue = cnxk_mempool_deq,
+       .get_count = cnxk_mempool_get_count,
+       .calc_mem_size = cnxk_mempool_calc_mem_size,
+       .populate = cnxk_mempool_populate,
+};
+
+MEMPOOL_REGISTER_OPS(cn10k_mempool_ops);

diff --git a/drivers/mempool/cnxk/cnxk_mempool_ops.c b/drivers/mempool/cnxk/cnxk_mempool_ops.c
index d8ed37e..42c02bf 100644 (file)
--- a/drivers/mempool/cnxk/cnxk_mempool_ops.c
+++ b/drivers/mempool/cnxk/cnxk_mempool_ops.c
@@ -177,7 +177,7 @@ cnxk_mempool_plt_init(void)
        if (roc_model_is_cn9k())
                rte_mbuf_set_platform_mempool_ops("cn9k_mempool_ops");
        else if (roc_model_is_cn10k())
-               rte_mbuf_set_platform_mempool_ops("cnxk_mempool_ops");
+               rte_mbuf_set_platform_mempool_ops("cn10k_mempool_ops");
 
        return 0;
 }

diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build
index ff31893..3282b5e 100644 (file)
--- a/drivers/mempool/cnxk/meson.build
+++ b/drivers/mempool/cnxk/meson.build
@@ -10,6 +10,7 @@ endif
 
 sources = files('cnxk_mempool.c',
                'cnxk_mempool_ops.c',
-               'cn9k_mempool_ops.c')
+               'cn9k_mempool_ops.c',
+               'cn10k_mempool_ops.c')
 
 deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool']