*/
 struct i40e_aqc_nvm_update {
        u8      command_flags;
-#define I40E_AQ_NVM_LAST_CMD   0x01
-#define I40E_AQ_NVM_FLASH_ONLY 0x80
+#define I40E_AQ_NVM_LAST_CMD                   0x01
+#define I40E_AQ_NVM_FLASH_ONLY                 0x80
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT   1
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK    0x03
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED        0x03
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL     0x01
        u8      module_pointer;
        __le16  length;
        __le32  offset;
 
  * @length: length of the section to be written (in bytes from the offset)
  * @data: command buffer (size [bytes] = length)
  * @last_command: tells if this is the last command in a series
+ * @preservation_flags: Preservation mode flags
  * @cmd_details: pointer to command details structure or NULL
  *
  * Update the NVM using the admin queue commands
  **/
 enum i40e_status_code i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
                                u32 offset, u16 length, void *data,
-                               bool last_command,
+                               bool last_command, u8 preservation_flags,
                                struct i40e_asq_cmd_details *cmd_details)
 {
        struct i40e_aq_desc desc;
        /* If this is the last command in a series, set the proper flag. */
        if (last_command)
                cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
+       if (hw->mac.type == I40E_MAC_X722) {
+               if (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_SELECTED)
+                       cmd->command_flags |=
+                               (I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED <<
+                                I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);
+               else if (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_ALL)
+                       cmd->command_flags |=
+                               (I40E_AQ_NVM_PRESERVATION_FLAGS_ALL <<
+                                I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);
+       }
        cmd->module_pointer = module_pointer;
        cmd->offset = CPU_TO_LE32(offset);
        cmd->length = CPU_TO_LE16(length);
 
                ret_code = i40e_aq_update_nvm(hw, module_pointer,
                                              2 * offset,  /*bytes*/
                                              2 * words,   /*bytes*/
-                                             data, last_command, &cmd_details);
+                                             data, last_command, 0,
+                                             &cmd_details);
 
        return ret_code;
 }
        return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);
 }
 
+STATIC INLINE u8 i40e_nvmupd_get_preservation_flags(u32 val)
+{
+       return (u8)((val & I40E_NVM_PRESERVATION_FLAGS_MASK) >>
+                   I40E_NVM_PRESERVATION_FLAGS_SHIFT);
+}
+
 STATIC const char *i40e_nvm_update_state_str[] = {
        "I40E_NVMUPD_INVALID",
        "I40E_NVMUPD_READ_CON",
        enum i40e_status_code status = I40E_SUCCESS;
        struct i40e_asq_cmd_details cmd_details;
        u8 module, transaction;
+       u8 preservation_flags;
        bool last;
 
        transaction = i40e_nvmupd_get_transaction(cmd->config);
        module = i40e_nvmupd_get_module(cmd->config);
        last = (transaction & I40E_NVM_LCB);
+       preservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config);
 
        memset(&cmd_details, 0, sizeof(cmd_details));
        cmd_details.wb_desc = &hw->nvm_wb_desc;
 
        status = i40e_aq_update_nvm(hw, module, cmd->offset,
                                    (u16)cmd->data_size, bytes, last,
-                                   &cmd_details);
+                                   preservation_flags, &cmd_details);
        if (status) {
                i40e_debug(hw, I40E_DEBUG_NVM,
                           "i40e_nvmupd_nvm_write mod 0x%x off 0x%x len 0x%x\n",
 
                                struct i40e_asq_cmd_details *cmd_details);
 enum i40e_status_code i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,
                                u32 offset, u16 length, void *data,
-                               bool last_command,
+                               bool last_command, u8 preservation_flags,
+                               struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_nvm_progress(struct i40e_hw *hw, u8 *progress,
                                struct i40e_asq_cmd_details *cmd_details);
 enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
                                u8 mib_type, void *buff, u16 buff_size,
 
 
 #define I40E_NVM_MOD_PNT_MASK 0xFF
 
-#define I40E_NVM_TRANS_SHIFT   8
-#define I40E_NVM_TRANS_MASK    (0xf << I40E_NVM_TRANS_SHIFT)
-#define I40E_NVM_CON           0x0
-#define I40E_NVM_SNT           0x1
-#define I40E_NVM_LCB           0x2
-#define I40E_NVM_SA            (I40E_NVM_SNT | I40E_NVM_LCB)
-#define I40E_NVM_ERA           0x4
-#define I40E_NVM_CSUM          0x8
-#define I40E_NVM_EXEC          0xf
+#define I40E_NVM_TRANS_SHIFT                   8
+#define I40E_NVM_TRANS_MASK                    (0xf << I40E_NVM_TRANS_SHIFT)
+#define I40E_NVM_PRESERVATION_FLAGS_SHIFT      12
+#define I40E_NVM_PRESERVATION_FLAGS_MASK \
+                               (0x3 << I40E_NVM_PRESERVATION_FLAGS_SHIFT)
+#define I40E_NVM_PRESERVATION_FLAGS_SELECTED   0x01
+#define I40E_NVM_PRESERVATION_FLAGS_ALL                0x02
+#define I40E_NVM_CON                           0x0
+#define I40E_NVM_SNT                           0x1
+#define I40E_NVM_LCB                           0x2
+#define I40E_NVM_SA                            (I40E_NVM_SNT | I40E_NVM_LCB)
+#define I40E_NVM_ERA                           0x4
+#define I40E_NVM_CSUM                          0x8
+#define I40E_NVM_EXEC                          0xf
 
 #define I40E_NVM_ADAPT_SHIFT   16
 #define I40E_NVM_ADAPT_MASK    (0xffffULL << I40E_NVM_ADAPT_SHIFT)