DPDK PCIe-VFIO framework configures base MSIX vector for interrupts
which is supported by other h/w. In case of bnxt, base MSIX vector
starts with the RX completion queue 0. To comply with the DPDK
framework We need to increase the map index by 1 so that RXTX
completion queues events can be delivered to appropriate event listeners
by kernel VFIO.
Fixes:
bd0a14c99f65 ("net/bnxt: use dedicated CPR for async events")
Cc: stable@dpdk.org
Signed-off-by: Rahul Gupta <rahul.gupta@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
#define BNXT_NUM_ASYNC_CPR(bp) 1
#endif
+#define BNXT_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
+#define BNXT_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
+
/* Chimp Communication Channel */
#define GRCPF_REG_CHIMP_CHANNEL_OFFSET 0x0
#define GRCPF_REG_CHIMP_COMM_TRIGGER 0x100
#ifndef _BNXT_IRQ_H_
#define _BNXT_IRQ_H_
-#define BNXT_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
-#define BNXT_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
-
struct bnxt_irq {
rte_intr_callback_fn handler;
unsigned int vector;
{
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
- int cp_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
+ int cp_ring_index = queue_index + BNXT_RX_VEC_START;
struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
uint8_t ring_type;
int rc = 0;