net/iavf: replace SMP barrier with thread fence in Rx

Replace the SMP barrier with atomic thread fence for iavf hw ring scan
in the bulk Rx path.

This patch introduces a change to the iavf driver that was already added
to the i40e driver [1] as part of the adoption of the use of compiler
atomics.

[1]Commit 8649e2356689 ("net/i40e: replace SMP barrier with thread fence
in Rx")

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Reviewed-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>

diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 16e8d021f9e3c0913ae9c4be1ced41b7238776f9..d2cc3ed4bdd794c6fa6fd7b5a2058e58cd9162c3 100644 (file)
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -1843,7 +1843,8 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
                for (j = IAVF_LOOK_AHEAD - 1; j >= 0; j--)
                        s[j] = rte_le_to_cpu_16(rxdp[j].wb.status_error0);
 
-               rte_smp_rmb();
+               /* This barrier is to order loads of different words in the descriptor */
+               rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
 
                /* Compute how many contiguous DD bits were set */
                for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {
@@ -1946,7 +1947,8 @@ iavf_rx_scan_hw_ring(struct iavf_rx_queue *rxq)
                               IAVF_RXD_QW1_STATUS_SHIFT;
                }
 
-               rte_smp_rmb();
+               /* This barrier is to order loads of different words in the descriptor */
+               rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
 
                /* Compute how many contiguous DD bits were set */
                for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {