goto err_exit;
}
if (IS_CHIP_FEATURE(REVISION_B1)) {
- u32 offset = 0;
+ u32 mbox_offset = (a - self->rpc_addr) / sizeof(u32);
+ u32 data_offset = 0;
- for (; offset < cnt; ++offset) {
- aq_hw_write_reg(self, 0x328, p[offset]);
+ for (; data_offset < cnt; ++mbox_offset, ++data_offset) {
+ aq_hw_write_reg(self, 0x328, p[data_offset]);
aq_hw_write_reg(self, 0x32C,
- (0x80000000 | (0xFFFF & (offset * 4))));
+ (0x80000000 | (0xFFFF & (mbox_offset * 4))));
hw_atl_mcp_up_force_intr_set(self, 1);
/* 1000 times by 10us = 10ms */
AQ_HW_WAIT_FOR((aq_hw_read_reg(self,