net/sfc/base: modify phy caps to indicate FEC request
authorRichard Houldsworth <rhouldsworth@solarflare.com>
Mon, 10 Sep 2018 09:33:34 +0000 (10:33 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 27 Sep 2018 23:41:02 +0000 (01:41 +0200)
The capability bits to request FEC modes are implicitly valid
when the corresponding FEC mode is a supported capability.
Drivers expect that it is only valid to advertise those
capabilities explicitly marked as supported. The capabilities
reported by firmware is modified with the implicit capabilities
to present the explicit model to drivers.

Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
drivers/net/sfc/base/ef10_nic.c
drivers/net/sfc/base/efx_phy.c

index 0a2474f..b54cd39 100644 (file)
@@ -1772,6 +1772,21 @@ ef10_nic_board_cfg(
        if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
                goto fail6;
 
+       /*
+        * Firmware with support for *_FEC capability bits does not
+        * report that the corresponding *_FEC_REQUESTED bits are supported.
+        * Add them here so that drivers understand that they are supported.
+        */
+       if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_BASER_FEC))
+               epp->ep_phy_cap_mask |=
+                   (1u << EFX_PHY_CAP_BASER_FEC_REQUESTED);
+       if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_RS_FEC))
+               epp->ep_phy_cap_mask |=
+                   (1u << EFX_PHY_CAP_RS_FEC_REQUESTED);
+       if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_25G_BASER_FEC))
+               epp->ep_phy_cap_mask |=
+                   (1u << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
+
        /* Obtain the default PHY advertised capabilities */
        if ((rc = ef10_phy_get_link(enp, &els)) != 0)
                goto fail7;
index 7c341e4..25059df 100644 (file)
@@ -192,11 +192,6 @@ efx_phy_adv_cap_get(
        }
 }
 
-#define        EFX_PHY_CAP_FEC_REQ_MASK                        \
-       (1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) |       \
-       (1U << EFX_PHY_CAP_RS_FEC_REQUESTED)    |       \
-       (1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED)
-
        __checkReturn   efx_rc_t
 efx_phy_adv_cap_set(
        __in            efx_nic_t *enp,
@@ -210,8 +205,7 @@ efx_phy_adv_cap_set(
        EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
        EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
 
-       /* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */
-       if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) {
+       if ((mask & ~epp->ep_phy_cap_mask) != 0) {
                rc = ENOTSUP;
                goto fail1;
        }