The NFP4000/6000 supports a minimum of 256 Tx/Rx descriptors and not 64.
Before this patch when a DPDK application configured < 256 Tx
descriptors the hardware read/write pointers would be unmasked and not
wrapped at the expected size of the ring. The PMD logic to determine the
amount of free space in the Tx ring is incompatible with the unmasked
hwqueue pointers and this will result in the PMD not updating the
read pointer at all.The knock-on effect is that under high load the
PMD will potentially re-use a Tx descriptor before the hw has had a
chance to process that particular descriptor. This issue can manifest as
a DMA error when the hardware tries to perform a DMA with info from a
partially populated descriptor.
Fixes:
defb9a5dd156 ("nfp: introduce driver initialization")
Cc: stable@dpdk.org
Signed-off-by: Heinrich Kuhn <heinrich.kuhn@corigine.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
* DPDK uses uint16_t variables for these values
*/
#define NFP_NET_MAX_TX_DESC (32 * 1024)
-#define NFP_NET_MIN_TX_DESC 64
+#define NFP_NET_MIN_TX_DESC 256
#define NFP_NET_MAX_RX_DESC (32 * 1024)
-#define NFP_NET_MIN_RX_DESC 64
+#define NFP_NET_MIN_RX_DESC 256
/* Descriptor alignment */
#define NFP_ALIGN_RING_DESC 128