]> git.droids-corp.org - dpdk.git/commitdiff
common/mlx5: fix user mode register access command
authorViacheslav Ovsiienko <viacheslavo@mellanox.com>
Wed, 29 Jul 2020 12:29:14 +0000 (12:29 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 29 Jul 2020 22:41:24 +0000 (00:41 +0200)
To detect the timestamp mode configured on the NIC the mlx5
PMD uses the firmware command ACCESS_REGISTER_USER. This
command is relatively new and might be not supported by
older firmware versions and was rejected, causing annoying
messages in kernel log.

This patch adds the attribute flag check whether firmware
supports the command and avoid the call if it does not.

Fixes: bb7ef9a96281 ("common/mlx5: add register access DevX routine")
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h
drivers/common/mlx5/mlx5_prm.h
drivers/net/mlx5/linux/mlx5_os.c

index d1c674c7cf37860a7eb4f22725c5ae0fcf773be3..7c81ae15a92d21faab7c1abc4bf4b24ac295bc0e 100644 (file)
@@ -688,6 +688,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
                        relaxed_ordering_write);
        attr->relaxed_ordering_read = MLX5_GET(cmd_hca_cap, hcattr,
                        relaxed_ordering_read);
+       attr->access_register_user = MLX5_GET(cmd_hca_cap, hcattr,
+                       access_register_user);
        attr->eth_net_offloads = MLX5_GET(cmd_hca_cap, hcattr,
                                          eth_net_offloads);
        attr->eth_virt = MLX5_GET(cmd_hca_cap, hcattr, eth_virt);
index 528cb7bdd1b7290bfaf0a3f4ff81bb7436fc3635..1c84cea851efa5d960627507deb09969df8370ed 100644 (file)
@@ -93,6 +93,7 @@ struct mlx5_hca_attr {
        uint32_t vhca_id:16;
        uint32_t relaxed_ordering_write:1;
        uint32_t relaxed_ordering_read:1;
+       uint32_t access_register_user:1;
        uint32_t wqe_index_ignore:1;
        uint32_t cross_channel:1;
        uint32_t non_wire_sq:1; /* SQ with non-wire ops is supported. */
index 62efa7284bdb4d57e598ccc94c60588e7bae1341..0fa42bb8b2d447123f40c61bc8cc1ab1ee274a93 100644 (file)
@@ -1104,7 +1104,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8 log_max_eq_sz[0x8];
        u8 relaxed_ordering_write[0x1];
        u8 relaxed_ordering_read[0x1];
-       u8 log_max_mkey[0x6];
+       u8 access_register_user[0x1];
+       u8 log_max_mkey[0x5];
        u8 reserved_at_f0[0x8];
        u8 dump_fill_mkey[0x1];
        u8 reserved_at_f9[0x3];
index fc339affa5e7fe1d6c0aeccff5561ce1c7c25628..69123e12c368cc4fc675eec81350afea3609f8ea 100644 (file)
@@ -1067,9 +1067,10 @@ err_secondary:
        if (config->devx) {
                uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
 
-               err = mlx5_devx_cmd_register_read
-                       (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
-                       reg, MLX5_ST_SZ_DW(register_mtutc));
+               err = config->hca_attr.access_register_user ?
+                       mlx5_devx_cmd_register_read
+                               (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
+                               reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
                if (!err) {
                        uint32_t ts_mode;