net/mlx5: query HCA for enabled FLEX parser protocols
authorMoti Haimovsky <motih@mellanox.com>
Wed, 16 Oct 2019 08:36:09 +0000 (11:36 +0300)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 23 Oct 2019 14:43:10 +0000 (16:43 +0200)
This commit add querying the HCA which FLEX protocols are already
enabled.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
drivers/net/mlx5/mlx5.h
drivers/net/mlx5/mlx5_devx_cmds.c
drivers/net/mlx5/mlx5_prm.h

index baf945c..024a403 100644 (file)
@@ -184,6 +184,7 @@ struct mlx5_hca_attr {
        uint32_t tunnel_lro_vxlan:1;
        uint32_t lro_max_msg_sz_mode:2;
        uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];
+       uint32_t flex_parser_protocols;
 };
 
 /* Flow list . */
index acfe1de..01e4094 100644 (file)
@@ -330,6 +330,8 @@ mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx,
        attr->eth_net_offloads = MLX5_GET(cmd_hca_cap, hcattr,
                                          eth_net_offloads);
        attr->eth_virt = MLX5_GET(cmd_hca_cap, hcattr, eth_virt);
+       attr->flex_parser_protocols = MLX5_GET(cmd_hca_cap, hcattr,
+                                              flex_parser_protocols);
        if (!attr->eth_net_offloads)
                return 0;
 
index 3765df0..e429792 100644 (file)
@@ -856,6 +856,18 @@ enum {
        MLX5_INLINE_MODE_INNER_TCP_UDP,
 };
 
+/* HCA bit masks indicating which Flex parser protocols are already enabled. */
+#define MLX5_HCA_FLEX_IPV4_OVER_VXLAN_ENABLED (1UL << 0)
+#define MLX5_HCA_FLEX_IPV6_OVER_VXLAN_ENABLED (1UL << 1)
+#define MLX5_HCA_FLEX_IPV6_OVER_IP_ENABLED (1UL << 2)
+#define MLX5_HCA_FLEX_GENEVE_ENABLED (1UL << 3)
+#define MLX5_HCA_FLEX_CW_MPLS_OVER_GRE_ENABLED (1UL << 4)
+#define MLX5_HCA_FLEX_CW_MPLS_OVER_UDP_ENABLED (1UL << 5)
+#define MLX5_HCA_FLEX_P_BIT_VXLAN_GPE_ENABLED (1UL << 6)
+#define MLX5_HCA_FLEX_VXLAN_GPE_ENABLED (1UL << 7)
+#define MLX5_HCA_FLEX_ICMP_ENABLED (1UL << 8)
+#define MLX5_HCA_FLEX_ICMPV6_ENABLED (1UL << 9)
+
 struct mlx5_ifc_cmd_hca_cap_bits {
        u8 reserved_at_0[0x30];
        u8 vhca_id[0x10];