net/mlx5: cleanup memory barriers

Updating a consumer index to HW doesn't require a memory barrier in case
that there's no updated data to be posted to HW, but a compiler barrier
is sufficient. rte_wmb() is replaced with rte_io_wmb() when it makes
changes visible to HW, not other core.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>

diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 9389383f66a5313460ba6a06a573cdafca0e1cb4..275cd6a4bd7528d7fc502c531cb998214e5b644f 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1928,9 +1928,9 @@ skip:
                return 0;
        /* Update the consumer index. */
        rxq->rq_ci = rq_ci >> sges_n;
-       rte_wmb();
+       rte_io_wmb();
        *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
-       rte_wmb();
+       rte_io_wmb();
        *rxq->rq_db = rte_cpu_to_be_32(rxq->rq_ci);
 #ifdef MLX5_PMD_SOFT_COUNTERS
        /* Increment packets counter. */

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index a96a21ab77e6f8c433ca874dcf4fdde3cb73203d..827cb3c9fb19e5d403255981d9247688455df42d 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -504,7 +504,7 @@ mlx5_tx_complete(struct mlx5_txq_data *txq)
        txq->cq_ci = cq_ci;
        txq->elts_tail = elts_tail;
        /* Update the consumer index. */
-       rte_wmb();
+       rte_compiler_barrier();
        *txq->cq_db = rte_cpu_to_be_32(cq_ci);
 }
 

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
index 6d337ecd307173b15e8487263dedbd1d5a187897..e8f0626a6a5c5e0aeb1ae41da2116b8ea8c013f7 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
@@ -567,7 +567,7 @@ rxq_replenish_bulk_mbuf(struct mlx5_rxq_data *rxq, uint16_t n)
                wq[i].addr = rte_cpu_to_be_64((uintptr_t)elts[i]->buf_addr +
                                              RTE_PKTMBUF_HEADROOM);
        rxq->rq_ci += n;
-       rte_wmb();
+       rte_io_wmb();
        *rxq->rq_db = rte_cpu_to_be_32(rxq->rq_ci);
 }
 
@@ -1259,7 +1259,7 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
                        rcvd_pkt += n;
                }
        }
-       rte_wmb();
+       rte_compiler_barrier();
        *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
        return rcvd_pkt;
 }