net/ixgbe: fix blocked interrupts

While handling link status change (LSC) interrupt, all interrupts are
blocked until delayed interrupt handler finishes.

The wait duration is at least one second and this may cause timeouts in
VF to PF mailbox.

Make sure only LSC interrupt is blocked while waiting for delayed
interrupt handler to finish.

Fixes: 0a45657a6794 ("pci: rework interrupt handling")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index bdf4e2bcdd6e34bf3d0e2c51805fb69626ebb8f9..ad63e5a046631fe5cf7e226bcced87d0b633ceb0 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -3786,7 +3786,6 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev,
                IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
        int64_t timeout;
        struct rte_eth_link link;
-       int intr_enable_delay = false;
        struct ixgbe_hw *hw =
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
@@ -3819,20 +3818,19 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev,
                        timeout = IXGBE_LINK_DOWN_CHECK_TIMEOUT;
 
                ixgbe_dev_link_status_print(dev);
-
-               intr_enable_delay = true;
-       }
-
-       if (intr_enable_delay) {
+               intr->mask_original = intr->mask;
+               /* only disable lsc interrupt */
+               intr->mask &= ~IXGBE_EIMS_LSC;
                if (rte_eal_alarm_set(timeout * 1000,
                                      ixgbe_dev_interrupt_delayed_handler, (void *)dev) < 0)
                        PMD_DRV_LOG(ERR, "Error setting alarm");
-       } else {
-               PMD_DRV_LOG(DEBUG, "enable intr immediately");
-               ixgbe_enable_intr(dev);
-               rte_intr_enable(intr_handle);
+               else
+                       intr->mask = intr->mask_original;
        }
 
+       PMD_DRV_LOG(DEBUG, "enable intr immediately");
+       ixgbe_enable_intr(dev);
+       rte_intr_enable(intr_handle);
 
        return 0;
 }
@@ -3863,6 +3861,8 @@ ixgbe_dev_interrupt_delayed_handler(void *param)
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        uint32_t eicr;
 
+       ixgbe_disable_intr(hw);
+
        eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
        if (eicr & IXGBE_EICR_MAILBOX)
                ixgbe_pf_mbx_process(dev);
@@ -3885,6 +3885,10 @@ ixgbe_dev_interrupt_delayed_handler(void *param)
                intr->flags &= ~IXGBE_FLAG_MACSEC;
        }
 
+       /* restore original mask */
+       intr->mask = intr->mask_original;
+       intr->mask_original = 0;
+
        PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
        ixgbe_enable_intr(dev);
        rte_intr_enable(intr_handle);

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h
index 6695b681ebede66b64dacd49e17ca1f3f0956546..680d5d939d6aadfad13ddec6dc136a22bd88eb2d 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ethdev.h
+++ b/drivers/net/ixgbe/ixgbe_ethdev.h
@@ -200,6 +200,8 @@ struct ixgbe_hw_fdir_info {
 struct ixgbe_interrupt {
        uint32_t flags;
        uint32_t mask;
+       /*to save original mask during delayed handler */
+       uint32_t mask_original;
 };
 
 struct ixgbe_stat_mapping_registers {