net/sfc/base: move Tx config to ef10 NIC board config

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 7223b21..e5dd375 100644 (file)
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1645,6 +1645,16 @@ ef10_nic_board_cfg(
         */
        encp->enc_rx_scale_max_exclusive_contexts = 64 - 6;
 
+       encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
+       /* No boundary crossing limits */
+       encp->enc_tx_dma_desc_boundary = 0;
+
+       /*
+        * Maximum number of bytes into the frame the TCP header can start for
+        * firmware assisted TSO to work.
+        */
+       encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
+
 
        /* Get remaining controller-specific board config */
        if ((rc = enop->eno_board_cfg(enp)) != 0)

diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index ef660f7..d767068 100644 (file)
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -205,10 +205,6 @@ hunt_board_cfg(
        encp->enc_rx_buf_align_start = 1;
        encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
 
-       encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
-       /* No boundary crossing limits */
-       encp->enc_tx_dma_desc_boundary = 0;
-
        /*
         * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use
         * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available
@@ -254,12 +250,6 @@ hunt_board_cfg(
        encp->enc_intr_vec_base = base;
        encp->enc_intr_limit = nvec;
 
-       /*
-        * Maximum number of bytes into the frame the TCP header can start for
-        * firmware assisted TSO to work.
-        */
-       encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
-
        if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
                goto fail7;
        encp->enc_required_pcie_bandwidth_mbps = bandwidth;

diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index ee9cf68..1b5690b 100644 (file)
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -137,10 +137,6 @@ medford2_board_cfg(
        }
        encp->enc_rx_buf_align_end = end_padding;
 
-       encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
-       /* No boundary crossing limits */
-       encp->enc_tx_dma_desc_boundary = 0;
-
        /*
         * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use
         * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available
@@ -187,12 +183,6 @@ medford2_board_cfg(
        encp->enc_intr_vec_base = base;
        encp->enc_intr_limit = nvec;
 
-       /*
-        * Maximum number of bytes into the frame the TCP header can start for
-        * firmware assisted TSO to work.
-        */
-       encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
-
        /*
         * Medford2 stores a single global copy of VPD, not per-PF as on
         * Huntington.

diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index add0af0..8a96cc6 100644 (file)
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -136,10 +136,6 @@ medford_board_cfg(
        }
        encp->enc_rx_buf_align_end = end_padding;
 
-       encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
-       /* No boundary crossing limits */
-       encp->enc_tx_dma_desc_boundary = 0;
-
        /*
         * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use
         * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available
@@ -186,12 +182,6 @@ medford_board_cfg(
        encp->enc_intr_vec_base = base;
        encp->enc_intr_limit = nvec;
 
-       /*
-        * Maximum number of bytes into the frame the TCP header can start for
-        * firmware assisted TSO to work.
-        */
-       encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
-
        /*
         * Medford stores a single global copy of VPD, not per-PF as on
         * Huntington.