net/hns3: get device specifications from firmware
authorWei Hu (Xavier) <xavier.huwei@huawei.com>
Tue, 25 Aug 2020 11:52:56 +0000 (19:52 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 18 Sep 2020 16:55:07 +0000 (18:55 +0200)
This patch adds getting PF/VF device specifications from firmware.

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
drivers/net/hns3/hns3_cmd.h
drivers/net/hns3/hns3_dcb.c
drivers/net/hns3/hns3_dcb.h
drivers/net/hns3/hns3_ethdev.c
drivers/net/hns3/hns3_ethdev.h
drivers/net/hns3/hns3_ethdev_vf.c

index a13b799..65aa8ba 100644 (file)
@@ -93,6 +93,8 @@ enum hns3_opcode_type {
        HNS3_OPC_QUERY_32_BIT_REG       = 0x0041,
        HNS3_OPC_QUERY_64_BIT_REG       = 0x0042,
 
+       HNS3_OPC_QUERY_DEV_SPECS        = 0x0050,
+
        /* MAC command */
        HNS3_OPC_CONFIG_MAC_MODE        = 0x0301,
        HNS3_OPC_QUERY_LINK_STATUS      = 0x0307,
@@ -805,6 +807,19 @@ struct hns3_reset_cmd {
        uint8_t rsv[22];
 };
 
+#define HNS3_QUERY_DEV_SPECS_BD_NUM            4
+struct hns3_dev_specs_0_cmd {
+       uint32_t rsv0;
+       uint32_t mac_entry_num;
+       uint32_t mng_entry_num;
+       uint16_t rss_ind_tbl_size;
+       uint16_t rss_key_size;
+       uint16_t intr_ql_max;
+       uint8_t max_non_tso_bd_num;
+       uint8_t rsv1;
+       uint32_t max_tm_rate;
+};
+
 #define HNS3_MAX_TQP_NUM_PER_FUNC      64
 #define HNS3_DEFAULT_TX_BUF            0x4000    /* 16k  bytes */
 #define HNS3_TOTAL_PKT_BUF             0x108000  /* 1.03125M bytes */
index 02628b6..c1be49e 100644 (file)
@@ -19,7 +19,6 @@
 #define HNS3_SHAPER_BS_U_DEF   5
 #define HNS3_SHAPER_BS_S_DEF   20
 #define BW_MAX_PERCENT         100
-#define HNS3_ETHER_MAX_RATE    100000
 
 /*
  * hns3_shaper_para_calc: calculate ir parameter for the shaper
index 9c2c5f2..1636c5a 100644 (file)
@@ -5,6 +5,8 @@
 #ifndef _HNS3_DCB_H_
 #define _HNS3_DCB_H_
 
+#define HNS3_ETHER_MAX_RATE            100000
+
 /* MAC Pause */
 #define HNS3_TX_MAC_PAUSE_EN_MSK       BIT(0)
 #define HNS3_RX_MAC_PAUSE_EN_MSK       BIT(1)
index 44fd69f..951f26d 100644 (file)
@@ -2809,6 +2809,51 @@ hns3_parse_speed(int speed_cmd, uint32_t *speed)
        return 0;
 }
 
+static void
+hns3_set_default_dev_specifications(struct hns3_hw *hw)
+{
+       hw->max_non_tso_bd_num = HNS3_MAX_NON_TSO_BD_PER_PKT;
+       hw->rss_ind_tbl_size = HNS3_RSS_IND_TBL_SIZE;
+       hw->rss_key_size = HNS3_RSS_KEY_SIZE;
+       hw->max_tm_rate = HNS3_ETHER_MAX_RATE;
+}
+
+static void
+hns3_parse_dev_specifications(struct hns3_hw *hw, struct hns3_cmd_desc *desc)
+{
+       struct hns3_dev_specs_0_cmd *req0;
+
+       req0 = (struct hns3_dev_specs_0_cmd *)desc[0].data;
+
+       hw->max_non_tso_bd_num = req0->max_non_tso_bd_num;
+       hw->rss_ind_tbl_size = rte_le_to_cpu_16(req0->rss_ind_tbl_size);
+       hw->rss_key_size = rte_le_to_cpu_16(req0->rss_key_size);
+       hw->max_tm_rate = rte_le_to_cpu_32(req0->max_tm_rate);
+}
+
+static int
+hns3_query_dev_specifications(struct hns3_hw *hw)
+{
+       struct hns3_cmd_desc desc[HNS3_QUERY_DEV_SPECS_BD_NUM];
+       int ret;
+       int i;
+
+       for (i = 0; i < HNS3_QUERY_DEV_SPECS_BD_NUM - 1; i++) {
+               hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_QUERY_DEV_SPECS,
+                                         true);
+               desc[i].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
+       }
+       hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_QUERY_DEV_SPECS, true);
+
+       ret = hns3_cmd_send(hw, desc, HNS3_QUERY_DEV_SPECS_BD_NUM);
+       if (ret)
+               return ret;
+
+       hns3_parse_dev_specifications(hw, desc);
+
+       return 0;
+}
+
 static int
 hns3_get_capability(struct hns3_hw *hw)
 {
@@ -2832,11 +2877,25 @@ hns3_get_capability(struct hns3_hw *hw)
        ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
                                  HNS3_PCI_REVISION_ID);
        if (ret != HNS3_PCI_REVISION_ID_LEN) {
-               PMD_INIT_LOG(ERR, "failed to read pci revision id: %d", ret);
+               PMD_INIT_LOG(ERR, "failed to read pci revision id, ret = %d",
+                            ret);
                return -EIO;
        }
        hw->revision = revision;
 
+       if (revision < PCI_REVISION_ID_HIP09_A) {
+               hns3_set_default_dev_specifications(hw);
+               return 0;
+       }
+
+       ret = hns3_query_dev_specifications(hw);
+       if (ret) {
+               PMD_INIT_LOG(ERR,
+                            "failed to query dev specifications, ret = %d",
+                            ret);
+               return ret;
+       }
+
        return 0;
 }
 
index 1914e58..1810cf0 100644 (file)
@@ -381,6 +381,8 @@ struct hns3_hw {
        uint16_t rss_size_max;      /* HW defined max RSS task queue */
        uint16_t num_tx_desc;       /* desc num of per tx queue */
        uint16_t num_rx_desc;       /* desc num of per rx queue */
+       uint32_t mng_entry_num;     /* number of manager table entry */
+       uint32_t mac_entry_num;     /* number of mac-vlan table entry */
 
        struct rte_ether_addr mc_addrs[HNS3_MC_MACADDR_NUM];
        int mc_addrs_num; /* Multicast mac addresses number */
@@ -388,6 +390,8 @@ struct hns3_hw {
        /* The configuration info of RSS */
        struct hns3_rss_conf rss_info;
        bool rss_dis_flag; /* disable rss flag. true: disable, false: enable */
+       uint16_t rss_ind_tbl_size;
+       uint16_t rss_key_size;
 
        uint8_t num_tc;             /* Total number of enabled TCs */
        uint8_t hw_tc_map;
@@ -406,6 +410,8 @@ struct hns3_hw {
        uint16_t tx_qnum_per_tc;    /* TX queue number per TC */
 
        uint32_t capability;
+       uint32_t max_tm_rate;
+       uint8_t max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 
        struct hns3_port_base_vlan_config port_base_vlan_cfg;
        /*
index 6551940..1a7c945 100644 (file)
@@ -1068,6 +1068,49 @@ hns3vf_interrupt_handler(void *param)
        hns3vf_enable_irq0(hw);
 }
 
+static void
+hns3vf_set_default_dev_specifications(struct hns3_hw *hw)
+{
+       hw->max_non_tso_bd_num = HNS3_MAX_NON_TSO_BD_PER_PKT;
+       hw->rss_ind_tbl_size = HNS3_RSS_IND_TBL_SIZE;
+       hw->rss_key_size = HNS3_RSS_KEY_SIZE;
+}
+
+static void
+hns3vf_parse_dev_specifications(struct hns3_hw *hw, struct hns3_cmd_desc *desc)
+{
+       struct hns3_dev_specs_0_cmd *req0;
+
+       req0 = (struct hns3_dev_specs_0_cmd *)desc[0].data;
+
+       hw->max_non_tso_bd_num = req0->max_non_tso_bd_num;
+       hw->rss_ind_tbl_size = rte_le_to_cpu_16(req0->rss_ind_tbl_size);
+       hw->rss_key_size = rte_le_to_cpu_16(req0->rss_key_size);
+}
+
+static int
+hns3vf_query_dev_specifications(struct hns3_hw *hw)
+{
+       struct hns3_cmd_desc desc[HNS3_QUERY_DEV_SPECS_BD_NUM];
+       int ret;
+       int i;
+
+       for (i = 0; i < HNS3_QUERY_DEV_SPECS_BD_NUM - 1; i++) {
+               hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_QUERY_DEV_SPECS,
+                                         true);
+               desc[i].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
+       }
+       hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_QUERY_DEV_SPECS, true);
+
+       ret = hns3_cmd_send(hw, desc, HNS3_QUERY_DEV_SPECS_BD_NUM);
+       if (ret)
+               return ret;
+
+       hns3vf_parse_dev_specifications(hw, desc);
+
+       return 0;
+}
+
 static int
 hns3vf_get_capability(struct hns3_hw *hw)
 {
@@ -1083,11 +1126,25 @@ hns3vf_get_capability(struct hns3_hw *hw)
        ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
                                  HNS3_PCI_REVISION_ID);
        if (ret != HNS3_PCI_REVISION_ID_LEN) {
-               PMD_INIT_LOG(ERR, "failed to read pci revision id: %d", ret);
+               PMD_INIT_LOG(ERR, "failed to read pci revision id, ret = %d",
+                            ret);
                return -EIO;
        }
        hw->revision = revision;
 
+       if (revision < PCI_REVISION_ID_HIP09_A) {
+               hns3vf_set_default_dev_specifications(hw);
+               return 0;
+       }
+
+       ret = hns3vf_query_dev_specifications(hw);
+       if (ret) {
+               PMD_INIT_LOG(ERR,
+                            "failed to query dev specifications, ret = %d",
+                            ret);
+               return ret;
+       }
+
        return 0;
 }