net/qede: configure VFs on hardware

Based on number of VFs enabled at PCI, PF-PMD driver instance
enables/configures those VFs from hardware perspective, such
that in later patches they could get required HW access to
communicate with PFs for slowpath configuration and run the
fastpath themselves.

This patch also add two new qede IOV files [qede_sriov(.c|.h)]
under qede directory to add non-base driver IOV APIs/contents there.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>

diff --git a/drivers/net/qede/meson.build b/drivers/net/qede/meson.build
index 05c9bff737b0e49745ce760b07db27a9b625037f..ff0ac0b0355b15fbc7b31747f396a4125d419b3e 100644 (file)
--- a/drivers/net/qede/meson.build
+++ b/drivers/net/qede/meson.build
@@ -11,6 +11,7 @@ sources = files(
        'qede_rxtx.c',
        'qede_debug.c',
        'qede_regs.c',
+       'qede_sriov.c',
 )
 
 if cc.has_argument('-Wno-format-nonliteral')

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 59f1746ee92c066e12ed5ccafc6d628c67af4904..27ec42e2c7bc1cf1ab55150acbb2b3d880f20d09 100644 (file)
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -2699,6 +2699,7 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
                adapter->vxlan.enable = false;
                adapter->geneve.enable = false;
                adapter->ipgre.enable = false;
+               qed_ops->sriov_configure(edev, pci_dev->max_vfs);
        }
 
        DP_INFO(edev, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",

diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 76c5dae3b84ce3bcd4d74046615e8cc48c470090..4fb77b05c25713dd15a205a949b98d929d4b3731 100644 (file)
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -34,6 +34,7 @@
 #include "base/ecore_l2.h"
 #include "base/ecore_vf.h"
 
+#include "qede_sriov.h"
 #include "qede_logs.h"
 #include "qede_if.h"
 #include "qede_rxtx.h"

diff --git a/drivers/net/qede/qede_if.h b/drivers/net/qede/qede_if.h
index c5ae3fb2e62b796dc9e06c4370f13d92da75e0e3..1693a243f9457b636b2694639e1aad8791b3e0e0 100644 (file)
--- a/drivers/net/qede/qede_if.h
+++ b/drivers/net/qede/qede_if.h
@@ -82,6 +82,7 @@ struct qed_eth_ops {
        const struct qed_common_ops *common;
        int (*fill_dev_info)(struct ecore_dev *edev,
                             struct qed_dev_eth_info *info);
+       void (*sriov_configure)(struct ecore_dev *edev, int num_vfs);
 };
 
 struct qed_link_params {

diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 94061ec115c0dea781255b7c07c1e4cba0e17d8c..c1135822bf33026cda961a3e41518961216bbd00 100644 (file)
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -821,6 +821,7 @@ const struct qed_common_ops qed_common_ops_pass = {
 const struct qed_eth_ops qed_eth_ops_pass = {
        INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
        INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
+       INIT_STRUCT_FIELD(sriov_configure, &qed_sriov_configure),
 };
 
 const struct qed_eth_ops *qed_get_eth_ops(void)

diff --git a/drivers/net/qede/qede_sriov.c b/drivers/net/qede/qede_sriov.c
new file mode 100644 (file)
index 0000000..ba4384e
--- /dev/null
+++ b/drivers/net/qede/qede_sriov.c
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2020 Marvell.
+ * All rights reserved.
+ * www.marvell.com
+ */
+
+#include "qede_sriov.h"
+
+static void qed_sriov_enable_qid_config(struct ecore_hwfn *hwfn,
+                                       u16 vfid,
+                                       struct ecore_iov_vf_init_params *params)
+{
+       u16 num_pf_l2_queues, base, i;
+
+       /* Since we have an equal resource distribution per-VF, and we assume
+        * PF has acquired its first queues, we start setting sequentially from
+        * there.
+        */
+       num_pf_l2_queues = (u16)FEAT_NUM(hwfn, ECORE_PF_L2_QUE);
+
+       base = num_pf_l2_queues + vfid * params->num_queues;
+       params->rel_vf_id = vfid;
+
+       for (i = 0; i < params->num_queues; i++) {
+               params->req_rx_queue[i] = base + i;
+               params->req_tx_queue[i] = base + i;
+       }
+
+       /* PF uses indices 0 for itself; Set vport/RSS afterwards */
+       params->vport_id = vfid + 1;
+       params->rss_eng_id = vfid + 1;
+}
+
+static void qed_sriov_enable(struct ecore_dev *edev, int num)
+{
+       struct ecore_iov_vf_init_params params;
+       struct ecore_hwfn *p_hwfn;
+       struct ecore_ptt *p_ptt;
+       int i, j, rc;
+
+       if ((u32)num >= RESC_NUM(&edev->hwfns[0], ECORE_VPORT)) {
+               DP_NOTICE(edev, false, "Can start at most %d VFs\n",
+                         RESC_NUM(&edev->hwfns[0], ECORE_VPORT) - 1);
+               return;
+       }
+
+       OSAL_MEMSET(&params, 0, sizeof(struct ecore_iov_vf_init_params));
+
+       for_each_hwfn(edev, j) {
+               int feat_num;
+
+               p_hwfn = &edev->hwfns[j];
+               p_ptt = ecore_ptt_acquire(p_hwfn);
+               feat_num = FEAT_NUM(p_hwfn, ECORE_VF_L2_QUE) / num;
+
+               params.num_queues = OSAL_MIN_T(int, feat_num, 16);
+
+               for (i = 0; i < num; i++) {
+                       if (!ecore_iov_is_valid_vfid(p_hwfn, i, false, true))
+                               continue;
+
+                       qed_sriov_enable_qid_config(p_hwfn, i, &params);
+
+                       rc = ecore_iov_init_hw_for_vf(p_hwfn, p_ptt, &params);
+                       if (rc) {
+                               DP_ERR(edev, "Failed to enable VF[%d]\n", i);
+                               ecore_ptt_release(p_hwfn, p_ptt);
+                               return;
+                       }
+               }
+
+               ecore_ptt_release(p_hwfn, p_ptt);
+       }
+}
+
+void qed_sriov_configure(struct ecore_dev *edev, int num_vfs_param)
+{
+       if (!IS_ECORE_SRIOV(edev)) {
+               DP_VERBOSE(edev, ECORE_MSG_IOV, "SR-IOV is not supported\n");
+               return;
+       }
+
+       if (num_vfs_param)
+               qed_sriov_enable(edev, num_vfs_param);
+}

diff --git a/drivers/net/qede/qede_sriov.h b/drivers/net/qede/qede_sriov.h
new file mode 100644 (file)
index 0000000..6c85b1d
--- /dev/null
+++ b/drivers/net/qede/qede_sriov.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2020 Marvell.
+ * All rights reserved.
+ * www.marvell.com
+ */
+
+#include "qede_ethdev.h"
+
+void qed_sriov_configure(struct ecore_dev *edev, int num_vfs_param);