'INFINIBAND_VERBS_H' ],
[ 'HAVE_MLX5_UMR_IMKEY', 'infiniband/mlx5dv.h',
'MLX5_WQE_UMR_CTRL_FLAG_INLINE' ],
+ [ 'HAVE_MLX5_DR_FLOW_DUMP_RULE', 'infiniband/mlx5dv.h',
+ 'mlx5dv_dump_dr_rule' ],
]
config = configuration_data()
foreach arg:has_sym_args
#endif
}
+static int
+mlx5_glue_dr_dump_single_rule(FILE *file, void *rule)
+{
+#ifdef HAVE_MLX5_DR_FLOW_DUMP_RULE
+ return mlx5dv_dump_dr_rule(file, rule);
+#else
+ RTE_SET_USED(file);
+ RTE_SET_USED(rule);
+ return -ENOTSUP;
+#endif
+}
+
static int
mlx5_glue_dr_dump_domain(FILE *file, void *domain)
{
.devx_wq_query = mlx5_glue_devx_wq_query,
.devx_port_query = mlx5_glue_devx_port_query,
.dr_dump_domain = mlx5_glue_dr_dump_domain,
+ .dr_dump_rule = mlx5_glue_dr_dump_single_rule,
.dr_reclaim_domain_memory = mlx5_glue_dr_reclaim_domain_memory,
.dr_create_flow_action_sampler =
mlx5_glue_dr_create_flow_action_sampler,
uint32_t port_num,
struct mlx5dv_devx_port *mlx5_devx_port);
int (*dr_dump_domain)(FILE *file, void *domain);
+ int (*dr_dump_rule)(FILE *file, void *rule);
int (*devx_query_eqn)(struct ibv_context *context, uint32_t cpus,
uint32_t *eqn);
struct mlx5dv_devx_event_channel *(*devx_create_event_channel)
return -ret;
}
+int
+mlx5_devx_cmd_flow_single_dump(void *rule_info __rte_unused,
+ FILE *file __rte_unused)
+{
+ int ret = 0;
+#ifdef HAVE_MLX5_DR_FLOW_DUMP_RULE
+ if (rule_info)
+ ret = mlx5_glue->dr_dump_rule(file, rule_info);
+#else
+ ret = ENOTSUP;
+#endif
+ return -ret;
+}
+
/*
* Create CQ using DevX API.
*
int mlx5_devx_cmd_flow_dump(void *fdb_domain, void *rx_domain, void *tx_domain,
FILE *file);
__rte_internal
+int mlx5_devx_cmd_flow_single_dump(void *rule, FILE *file);
+__rte_internal
struct mlx5_devx_obj *mlx5_devx_cmd_create_cq(void *ctx,
struct mlx5_devx_cq_attr *attr);
__rte_internal
mlx5_devx_cmd_flow_counter_alloc;
mlx5_devx_cmd_flow_counter_query;
mlx5_devx_cmd_flow_dump;
+ mlx5_devx_cmd_flow_single_dump;
mlx5_devx_cmd_mkey_create;
mlx5_devx_cmd_modify_qp_state;
mlx5_devx_cmd_modify_rq;