'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
[ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',
'mlx5dv_dump_dr_domain'],
+ [ 'HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE', 'infiniband/mlx5dv.h',
+ 'mlx5dv_dr_action_create_flow_sampler'],
[ 'HAVE_MLX5DV_DR_MEM_RECLAIM', 'infiniband/mlx5dv.h',
'mlx5dv_dr_domain_set_reclaim_device_memory'],
[ 'HAVE_DEVLINK', 'linux/devlink.h', 'DEVLINK_GENL_NAME' ],
#endif
}
+static void *
+mlx5_glue_dr_create_flow_action_sampler(
+ struct mlx5dv_dr_flow_sampler_attr *attr)
+{
+#ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE
+ return mlx5dv_dr_action_create_flow_sampler(attr);
+#else
+ (void)attr;
+ errno = ENOTSUP;
+ return NULL;
+#endif
+}
+
static int
mlx5_glue_devx_query_eqn(struct ibv_context *ctx, uint32_t cpus,
uint32_t *eqn)
.devx_port_query = mlx5_glue_devx_port_query,
.dr_dump_domain = mlx5_glue_dr_dump_domain,
.dr_reclaim_domain_memory = mlx5_glue_dr_reclaim_domain_memory,
+ .dr_create_flow_action_sampler =
+ mlx5_glue_dr_create_flow_action_sampler,
.devx_query_eqn = mlx5_glue_devx_query_eqn,
.devx_create_event_channel = mlx5_glue_devx_create_event_channel,
.devx_destroy_event_channel = mlx5_glue_devx_destroy_event_channel,
#ifndef HAVE_MLX5DV_DR
enum mlx5dv_dr_domain_type { unused, };
struct mlx5dv_dr_domain;
+struct mlx5dv_dr_action;
#endif
#ifndef HAVE_MLX5DV_DR_DEVX_PORT
struct mlx5dv_dr_flow_meter_attr;
#endif
+#ifndef HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE
+struct mlx5dv_dr_flow_sampler_attr {
+ uint32_t sample_ratio;
+ void *default_next_table;
+ size_t num_sample_actions;
+ struct mlx5dv_dr_action **sample_actions;
+ uint64_t action;
+};
+#endif
+
#ifndef HAVE_IBV_DEVX_EVENT
struct mlx5dv_devx_event_channel { int fd; };
struct mlx5dv_devx_async_event_hdr;
const void *pp_context,
uint32_t flags);
void (*dv_free_pp)(struct mlx5dv_pp *pp);
+ void *(*dr_create_flow_action_sampler)
+ (struct mlx5dv_dr_flow_sampler_attr *attr);
};
extern const struct mlx5_glue *mlx5_glue;
u8 reserved_at_0[0x8000];
};
+struct mlx5_ifc_set_action_in_bits {
+ u8 action_type[0x4];
+ u8 field[0xc];
+ u8 reserved_at_10[0x3];
+ u8 offset[0x5];
+ u8 reserved_at_18[0x3];
+ u8 length[0x5];
+ u8 data[0x20];
+};
+
struct mlx5_ifc_query_hca_cap_out_bits {
u8 status[0x8];
u8 reserved_at_8[0x18];