offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);
/* Word offset for HW managed SA field */
sa->w0.s.hw_ctx_off = offset / 8;
- /* Context push size is up to hmac_opad_ipad */
- sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off;
+
+ /* Context push size is up to err ctl in HW ctx */
+ sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1;
+
/* Entire context size in 128B units */
offset = sizeof(struct roc_ot_ipsec_outb_sa);
sa->w0.s.ctx_size = (PLT_ALIGN_CEIL(offset, ROC_CTX_UNIT_128B) /
ROC_IE_OT_REAS_STS_L3P_ERR = 8,
ROC_IE_OT_REAS_STS_MAX = 9
};
+
+enum {
+ ROC_IE_OT_ERR_CTL_MODE_NONE = 0,
+ ROC_IE_OT_ERR_CTL_MODE_CLEAR = 1,
+ ROC_IE_OT_ERR_CTL_MODE_RING = 2,
+};
+
/* Context units in bytes */
#define ROC_CTX_UNIT_8B 8
#define ROC_CTX_UNIT_128B 128
};
struct roc_ot_ipsec_outb_ctx_update_reg {
- uint64_t rsvd;
+ union {
+ struct {
+ uint64_t reserved_0_2 : 3;
+ uint64_t address : 57;
+ uint64_t mode : 4;
+ } s;
+ uint64_t u64;
+ } err_ctl;
+
uint64_t esn_val;
uint64_t hard_life;
uint64_t soft_life;