net/qede/base: remove clock slowdown option

Remove clock slowdown NVM config option as this is not supported
for current chipsets.

Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>

diff --git a/drivers/net/qede/base/nvm_cfg.h b/drivers/net/qede/base/nvm_cfg.h
index 4202337..4e58835 100644 (file)
--- a/drivers/net/qede/base/nvm_cfg.h
+++ b/drivers/net/qede/base/nvm_cfg.h
@@ -72,10 +72,12 @@ struct nvm_cfg1_glob {
                #define NVM_CFG1_GLOB_ENABLE_ATC_OFFSET 30
                #define NVM_CFG1_GLOB_ENABLE_ATC_DISABLED 0x0
                #define NVM_CFG1_GLOB_ENABLE_ATC_ENABLED 0x1
-               #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_MASK 0x80000000
-               #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_OFFSET 31
-               #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_DISABLED 0x0
-               #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_ENABLED 0x1
+               #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_MASK \
+                                                               0x80000000
+               #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_OFFSET 31
+               #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_DISABLED \
+                                                               0x0
+               #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_ENABLED 0x1
        u32 engineering_change[3]; /* 0x4 */
        u32 manufacturing_id; /* 0x10 */
        u32 serial_number[4]; /* 0x14 */