net/axgbe: alter port speed bit range

Newer generation Hardware uses the slightly different
port speed bit widths, so alter the existing port speed
bit range to extend support to the newer generation hardware
while maintaining the backward compatibility with older
generation hardware.

The previously reserved bits are now being used which
then requires the adjustment to the BIT values, e.g.:

Before:
   PORT_PROPERTY_0[22:21] - Reserved
   PORT_PROPERTY_0[26:23] - Supported Speeds

After:
   PORT_PROPERTY_0[21] - Reserved
   PORT_PROPERTY_0[26:22] - Supported Speeds

To make this backwards compatible, the existing BIT
definitions for the port speeds are incremented by one
to maintain the original position.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Chandubabu Namburu <chandu@amd.com>

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index a5431dd9983c4ec8a28de84cd8e3ee9edde3b395..5310ac54f562548e8a6bf150301ec502fe2995e3 100644 (file)
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -1032,8 +1032,8 @@
 #define XP_PROP_0_PORT_ID_WIDTH                        8
 #define XP_PROP_0_PORT_MODE_INDEX              8
 #define XP_PROP_0_PORT_MODE_WIDTH              4
-#define XP_PROP_0_PORT_SPEEDS_INDEX            23
-#define XP_PROP_0_PORT_SPEEDS_WIDTH            4
+#define XP_PROP_0_PORT_SPEEDS_INDEX            22
+#define XP_PROP_0_PORT_SPEEDS_WIDTH            5
 #define XP_PROP_1_MAX_RX_DMA_INDEX             24
 #define XP_PROP_1_MAX_RX_DMA_WIDTH             5
 #define XP_PROP_1_MAX_RX_QUEUES_INDEX          8

diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index b0e1c267b1ed1fea7829ae9be9fa33b7b00dd6e1..d97fbbfddd3ffcee317f123360426ba4e54d2e34 100644 (file)
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -7,10 +7,10 @@
 #include "axgbe_common.h"
 #include "axgbe_phy.h"
 
-#define AXGBE_PHY_PORT_SPEED_100       BIT(0)
-#define AXGBE_PHY_PORT_SPEED_1000      BIT(1)
-#define AXGBE_PHY_PORT_SPEED_2500      BIT(2)
-#define AXGBE_PHY_PORT_SPEED_10000     BIT(3)
+#define AXGBE_PHY_PORT_SPEED_100       BIT(1)
+#define AXGBE_PHY_PORT_SPEED_1000      BIT(2)
+#define AXGBE_PHY_PORT_SPEED_2500      BIT(3)
+#define AXGBE_PHY_PORT_SPEED_10000     BIT(4)
 
 #define AXGBE_MUTEX_RELEASE            0x80000000