net/octeontx_ep: add ethdev probe and remove
authorNalla Pradeep <pnalla@marvell.com>
Fri, 29 Jan 2021 12:45:01 +0000 (04:45 -0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 29 Jan 2021 17:16:12 +0000 (18:16 +0100)
Add basic PCIe ethdev probe and remove.

Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
drivers/common/octeontx2/otx2_common.h
drivers/net/octeontx_ep/meson.build
drivers/net/octeontx_ep/otx_ep_common.h [new file with mode: 0644]
drivers/net/octeontx_ep/otx_ep_ethdev.c
drivers/net/octeontx_ep/otx_ep_vf.h [new file with mode: 0644]

index 4938fb2..cd52e09 100644 (file)
@@ -137,6 +137,8 @@ extern int otx2_logtype_ree;
 #define PCI_DEVID_OCTEONTX2_RVU_AF_VF          0xA0f8
 #define PCI_DEVID_OCTEONTX2_DPI_VF             0xA081
 #define PCI_DEVID_OCTEONTX2_EP_NET_VF          0xB203 /* OCTEON TX2 EP mode */
+/* OCTEON TX2 98xx EP mode */
+#define PCI_DEVID_CN98XX_EP_NET_VF             0xB103
 #define PCI_DEVID_OCTEONTX2_EP_RAW_VF          0xB204 /* OCTEON TX2 EP mode */
 #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF         0xA0f6
 #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF         0xA0f7
index 2ef2222..73e04b0 100644 (file)
@@ -2,7 +2,9 @@
 # Copyright(C) 2021 Marvell.
 #
 
+deps += ['common_octeontx2']
 sources = files(
                'otx_ep_ethdev.c',
                )
 
+includes += include_directories('../../common/octeontx2')
diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h
new file mode 100644 (file)
index 0000000..35ea99a
--- /dev/null
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+#ifndef _OTX_EP_COMMON_H_
+#define _OTX_EP_COMMON_H_
+
+/* OTX_EP EP VF device data structure */
+struct otx_ep_device {
+       /* PCI device pointer */
+       struct rte_pci_device *pdev;
+
+       struct rte_eth_dev *eth_dev;
+};
+#endif  /* _OTX_EP_COMMON_H_ */
index 603023b..efd88d8 100644 (file)
@@ -1,3 +1,60 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(C) 2021 Marvell.
  */
+
+#include <ethdev_pci.h>
+
+#include "otx2_common.h"
+#include "otx_ep_common.h"
+#include "otx_ep_vf.h"
+
+static int
+otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)
+{
+       RTE_SET_USED(eth_dev);
+
+       return -ENODEV;
+}
+
+static int
+otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
+{
+       RTE_SET_USED(eth_dev);
+
+       return -ENODEV;
+}
+
+static int
+otx_ep_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+                     struct rte_pci_device *pci_dev)
+{
+       return rte_eth_dev_pci_generic_probe(pci_dev,
+                                            sizeof(struct otx_ep_device),
+                                            otx_ep_eth_dev_init);
+}
+
+static int
+otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
+{
+       return rte_eth_dev_pci_generic_remove(pci_dev,
+                                             otx_ep_eth_dev_uninit);
+}
+
+/* Set of PCI devices this driver supports */
+static const struct rte_pci_id pci_id_otx_ep_map[] = {
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_EP_NET_VF) },
+       { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },
+       { .vendor_id = 0, /* sentinel */ }
+};
+
+static struct rte_pci_driver rte_otx_ep_pmd = {
+       .id_table       = pci_id_otx_ep_map,
+       .drv_flags      = RTE_PCI_DRV_NEED_MAPPING,
+       .probe          = otx_ep_eth_dev_pci_probe,
+       .remove         = otx_ep_eth_dev_pci_remove,
+};
+
+RTE_PMD_REGISTER_PCI(net_otx_ep, rte_otx_ep_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(net_otx_ep, pci_id_otx_ep_map);
+RTE_PMD_REGISTER_KMOD_DEP(net_otx_ep, "* igb_uio | vfio-pci");
diff --git a/drivers/net/octeontx_ep/otx_ep_vf.h b/drivers/net/octeontx_ep/otx_ep_vf.h
new file mode 100644 (file)
index 0000000..e88b409
--- /dev/null
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+#ifndef _OTX_EP_VF_H_
+#define _OTX_EP_VF_H_
+
+#define PCI_DEVID_OCTEONTX_EP_VF 0xa303
+
+#endif /*_OTX_EP_VF_H_ */