net/octeontx2: set max VTAG insertion size
authorKiran Kumar K <kirankumark@marvell.com>
Fri, 21 Aug 2020 06:59:30 +0000 (12:29 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 30 Sep 2020 17:19:11 +0000 (19:19 +0200)
When TX side VTAG insertion is enabled, SMQ should be configured with
the maximum VTAG insertion size to avoid generating NIX_SQINT_SEND_ERR
interrupt. Since the default value is zero, This patch configures the
VTAG insertion size to the max supported value.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/net/octeontx2/otx2_tm.c

index 874b0d7..fdd5669 100644 (file)
@@ -581,8 +581,9 @@ populate_tm_reg(struct otx2_eth_dev *dev,
                 * smaller
                 */
                reg[k] = NIX_AF_SMQX_CFG(schq);
-               regval[k] = BIT_ULL(50) | NIX_MIN_HW_FRS;
-               regval_mask[k] = ~(BIT_ULL(50) | 0x7f);
+               regval[k] = BIT_ULL(50) | ((uint64_t)NIX_MAX_VTAG_INS << 36) |
+                       NIX_MIN_HW_FRS;
+               regval_mask[k] = ~(BIT_ULL(50) | (0x7ULL << 36) | 0x7f);
                k++;
 
                /* Parent and schedule conf */