FEAT_DEF(SHA2, REG_HWCAP, 6)
FEAT_DEF(CRC32, REG_HWCAP, 7)
FEAT_DEF(ATOMICS, REG_HWCAP, 8)
+ FEAT_DEF(SVE, REG_HWCAP, 22)
+ FEAT_DEF(SVE2, REG_HWCAP2, 1)
+ FEAT_DEF(SVEAES, REG_HWCAP2, 2)
+ FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
+ FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4)
+ FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
+ FEAT_DEF(SVESM4, REG_HWCAP2, 6)
+ FEAT_DEF(FLAGM2, REG_HWCAP2, 7)
+ FEAT_DEF(FRINT, REG_HWCAP2, 8)
+ FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
+ FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
+ FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
+ FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */