OOP SGL In LB Out = Y
OOP LB In LB Out = Y
CPU crypto = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'aesni_gcm' crypto driver.
;
CPU AESNI = Y
OOP LB In LB Out = Y
CPU crypto = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'aesni_mb' crypto driver.
Sym operation chaining = Y
CPU NEON = Y
CPU ARM CE = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'armv8' crypto driver.
;
; Supported Asymmetric algorithms of the 'dpaa2_sec' crypto driver.
;
-[Asymmetric]
\ No newline at end of file
+[Asymmetric]
Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'ccp' crypto driver.
;
; Supported Asymmetric algorithms of the 'ccp' crypto driver.
;
-[Asymmetric]
\ No newline at end of file
+[Asymmetric]
Digest encrypted =
Asymmetric sessionless =
CPU crypto =
+Symmetric sessionless =
;
; Supported crypto algorithms of a default crypto driver.
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'kasumi' crypto driver.
;
; Supported Asymmetric algorithms of the 'kasumi' crypto driver.
;
-[Asymmetric]
\ No newline at end of file
+[Asymmetric]
OOP SGL In LB Out = Y
OOP SGL In SGL Out = Y
RSA PRIV OP KEY QT = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of 'octeontx' crypto driver.
OOP SGL In LB Out = Y
OOP SGL In SGL Out = Y
RSA PRIV OP KEY QT = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of 'octeontx2' crypto driver.
Asymmetric crypto = Y
RSA PRIV OP KEY EXP = Y
RSA PRIV OP KEY QT = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'openssl' crypto driver.
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'snow3g' crypto driver.
;
; Supported Asymmetric algorithms of the 'snow3g' crypto driver.
;
-[Asymmetric]
\ No newline at end of file
+[Asymmetric]
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
+Symmetric sessionless = Y
;
; Supported crypto algorithms of the 'zuc' crypto driver.
RTE_CRYPTODEV_FF_IN_PLACE_SGL |
RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
- RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO;
+ RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
/* Check CPU for support for AES instruction set */
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
- RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO;
+ RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
/* Check CPU for support for AES instruction set */
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_CPU_NEON |
- RTE_CRYPTODEV_FF_CPU_ARM_CE;
+ RTE_CRYPTODEV_FF_CPU_ARM_CE |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
internals = dev->data->dev_private;
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_HW_ACCELERATED |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
internals = dev->data->dev_private;
dev->enqueue_burst = kasumi_pmd_enqueue_burst;
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
mgr = alloc_mb_mgr(0);
if (mgr == NULL)
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
- RTE_CRYPTODEV_FF_IN_PLACE_SGL;
+ RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
internals = dev->data->dev_private;
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_IN_PLACE_SGL |
RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
+ RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
break;
default:
/* Feature not supported. Abort */
RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
+ RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
return 0;
RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP |
- RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
+ RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
internals = dev->data->dev_private;
dev->enqueue_burst = snow3g_pmd_enqueue_burst;
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
mgr = alloc_mb_mgr(0);
if (mgr == NULL)
}
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
mb_mgr = alloc_mb_mgr(0);
if (mb_mgr == NULL)
return "SYM_CPU_CRYPTO";
case RTE_CRYPTODEV_FF_ASYM_SESSIONLESS:
return "ASYM_SESSIONLESS";
+ case RTE_CRYPTODEV_FF_SYM_SESSIONLESS:
+ return "SYM_SESSIONLESS";
default:
return NULL;
}
/**< Support asymmetric session-less operations */
#define RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO (1ULL << 21)
/**< Support symmetric cpu-crypto processing */
+#define RTE_CRYPTODEV_FF_SYM_SESSIONLESS (1ULL << 22)
+/**< Support symmetric session-less operations */
/**