Add memory write barriers for read and wait status functions
in ddm, udm and mpu.
Signed-off-by: John Miller <john.miller@atomicrules.com>
int cnt = 0;
ddm->cfg.command = 2;
+ rte_wmb();
while (wait && (ddm->cfg.stop_flushed & 0x01) == 0) {
if (cnt++ > 1000)
return 1;
int cnt = 0;
mpu->cfg.command = MPU_CMD_RESET;
+ rte_wmb();
while (mpu->cfg.command != MPU_CMD_IDLE) {
if (cnt++ > 1000)
int cnt = 0;
udm->cfg.command = 2;
+ rte_wmb();
while (wait && (udm->cfg.stop_flushed & 0x01) == 0) {
if (cnt++ > 1000)