net/fm10k: support descriptor status API
authorWei Zhao <wei.zhao1@intel.com>
Mon, 2 Jul 2018 07:15:58 +0000 (15:15 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 2 Jul 2018 23:35:58 +0000 (01:35 +0200)
rte_eth_rx_descritpr_status and rte_eth_tx_descriptor_status
are supported by fm10K.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
doc/guides/nics/features/fm10k.ini
doc/guides/rel_notes/release_18_08.rst
drivers/net/fm10k/fm10k.h
drivers/net/fm10k/fm10k_ethdev.c
drivers/net/fm10k/fm10k_rxtx.c

index 58f58b9..0acdf0d 100644 (file)
@@ -26,6 +26,8 @@ VLAN offload         = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
 Packet type parsing  = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats          = Y
 Extended stats       = Y
 Stats per queue      = Y
index cfce71c..882f82b 100644 (file)
@@ -54,6 +54,11 @@ New Features
   PMD does not provide any. The provision of such tuned values now includes
   the ixgbe PMD.
 
+* **Added descriptor status check support for fm10k.**
+
+  ``rte_eth_rx_descritpr_status`` and ``rte_eth_tx_descriptor_status``
+  are supported by fm10K.
+
 
 API Changes
 -----------
index ef30780..1bc2c18 100644 (file)
@@ -329,6 +329,13 @@ uint16_t fm10k_recv_scattered_pkts(void *rx_queue,
 int
 fm10k_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
 
+int
+fm10k_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+
+int
+fm10k_dev_tx_descriptor_status(void *rx_queue, uint16_t offset);
+
+
 uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
        uint16_t nb_pkts);
 
index edecc28..af9b503 100644 (file)
@@ -2839,6 +2839,8 @@ static const struct eth_dev_ops fm10k_eth_dev_ops = {
        .tx_queue_setup         = fm10k_tx_queue_setup,
        .tx_queue_release       = fm10k_tx_queue_release,
        .rx_descriptor_done     = fm10k_dev_rx_descriptor_done,
+       .rx_descriptor_status = fm10k_dev_rx_descriptor_status,
+       .tx_descriptor_status = fm10k_dev_tx_descriptor_status,
        .rx_queue_intr_enable   = fm10k_dev_rx_queue_intr_enable,
        .rx_queue_intr_disable  = fm10k_dev_rx_queue_intr_disable,
        .reta_update            = fm10k_reta_update,
index 9320748..4a5b46e 100644 (file)
@@ -389,6 +389,84 @@ fm10k_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)
        return ret;
 }
 
+int
+fm10k_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)
+{
+       volatile union fm10k_rx_desc *rxdp;
+       struct fm10k_rx_queue *rxq = rx_queue;
+       uint16_t nb_hold, trigger_last;
+       uint16_t desc;
+       int ret;
+
+       if (unlikely(offset >= rxq->nb_desc)) {
+               PMD_DRV_LOG(ERR, "Invalid RX descriptor offset %u", offset);
+               return 0;
+       }
+
+       if (rxq->next_trigger < rxq->alloc_thresh)
+               trigger_last = rxq->next_trigger +
+                                       rxq->nb_desc - rxq->alloc_thresh;
+       else
+               trigger_last = rxq->next_trigger - rxq->alloc_thresh;
+
+       if (rxq->next_dd < trigger_last)
+               nb_hold = rxq->next_dd + rxq->nb_desc - trigger_last;
+       else
+               nb_hold = rxq->next_dd - trigger_last;
+
+       if (offset >= rxq->nb_desc - nb_hold)
+               return RTE_ETH_RX_DESC_UNAVAIL;
+
+       desc = rxq->next_dd + offset;
+       if (desc >= rxq->nb_desc)
+               desc -= rxq->nb_desc;
+
+       rxdp = &rxq->hw_ring[desc];
+
+       ret = !!(rxdp->w.status &
+                       rte_cpu_to_le_16(FM10K_RXD_STATUS_DD));
+
+       return ret;
+}
+
+int
+fm10k_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
+{
+       volatile struct fm10k_tx_desc *txdp;
+       struct fm10k_tx_queue *txq = tx_queue;
+       uint16_t desc;
+       uint16_t next_rs = txq->nb_desc;
+       struct fifo rs_tracker = txq->rs_tracker;
+       struct fifo *r = &rs_tracker;
+
+       if (unlikely(offset >= txq->nb_desc))
+               return -EINVAL;
+
+       desc = txq->next_free + offset;
+       /* go to next desc that has the RS bit */
+       desc = (desc / txq->rs_thresh + 1) *
+               txq->rs_thresh - 1;
+
+       if (desc >= txq->nb_desc) {
+               desc -= txq->nb_desc;
+               if (desc >= txq->nb_desc)
+                       desc -= txq->nb_desc;
+       }
+
+       r->head = r->list;
+       for ( ; r->head != r->endp; ) {
+               if (*r->head >= desc && *r->head < next_rs)
+                       next_rs = *r->head;
+               ++r->head;
+       }
+
+       txdp = &txq->hw_ring[next_rs];
+       if (txdp->flags & FM10K_TXD_FLAG_DONE)
+               return RTE_ETH_TX_DESC_DONE;
+
+       return RTE_ETH_TX_DESC_FULL;
+}
+
 /*
  * Free multiple TX mbuf at a time if they are in the same pool
  *