Fix typo in piece of code of NVM access for SPT.
And cleans up the remaining instances in the shared code
where it was not adhering to the Linux code standard.
Wrong description was found in the mentioned file, so fix them.
Remove shadowing variable declarations.
Relating to operands in bitwise operations having different sizes.
Unreachable code since *clock_in_i2c_* always return success.
Don't return unused s32 and don't check for constants.
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Signed-off-by: Robert Konklewski <robertx.konklewski@intel.com>
Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
/**
* e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
* @hw: pointer to the HW structure
- * @duplex: current duplex setting
*
* Configure the KMRN interface by applying last minute quirks for
* 10/100 operation.
STATIC void e1000_i2c_start(struct e1000_hw *hw);
STATIC void e1000_i2c_stop(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
; /* Empty */
swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
- swfw_sync &= ~mask;
+ swfw_sync &= (u32)~mask;
E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
e1000_put_hw_semaphore_generic(hw);
if (status != E1000_SUCCESS)
goto fail;
- status = e1000_clock_in_i2c_byte(hw, data);
- if (status != E1000_SUCCESS)
- goto fail;
+ e1000_clock_in_i2c_byte(hw, data);
status = e1000_clock_out_i2c_bit(hw, nack);
if (status != E1000_SUCCESS)
*
* Clocks in one byte data via I2C data/clock
**/
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
{
s32 i;
bool bit = 0;
e1000_clock_in_i2c_bit(hw, &bit);
*data |= bit << i;
}
-
- return E1000_SUCCESS;
}
/**
*
* Clocks in one bit via I2C data/clock
**/
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
{
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
/* Minimum low period of clock is 4.7 us */
usec_delay(E1000_I2C_T_LOW);
-
- return E1000_SUCCESS;
}
/**
; /* Empty */
swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
- swfw_sync &= ~mask;
+ swfw_sync &= (u32)~mask;
E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
e1000_put_hw_semaphore_generic(hw);
}
for (i = 0; i < words; i++) {
- eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
+ eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
(data[i] << E1000_NVM_RW_REG_DATA) |
E1000_NVM_RW_REG_START;
switch (offset) {
case NVM_MAC_ADDR:
ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
- ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
+ ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
&data[1]);
- ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
+ ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
&data[2]);
if (ret_val != E1000_SUCCESS)
DEBUGOUT("MAC Addr not found in iNVM\n");
{
e1000_init_function_pointers_82575(hw);
hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
-
- return;
}
/**
/**
* __e1000_access_emi_reg_locked - Read/write EMI register
* @hw: pointer to the HW structure
- * @addr: EMI address to program
+ * @address: EMI address to program
* @data: pointer to value to read/write from/to the EMI address
* @read: boolean flag to indicate read or write
*
if (hw->mac.type >= e1000_pch_lpt) {
- u16 phy_reg;
-
hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,
&phy_reg);
phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;
/**
* e1000_configure_k1_ich8lan - Configure K1 power state
* @hw: pointer to the HW structure
- * @enable: K1 state to configure
+ * @k1_enable: K1 state to configure
*
* Configure the K1 power state based on the provided parameter.
* Assumes semaphore already acquired.
/**
* e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
* done after every PHY reset.
+ * @hw: pointer to the HW structure
**/
STATIC s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
{
/**
* e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be
* done after every PHY reset.
+ * @hw: pointer to the HW structure
**/
STATIC s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
{
for (i = 0; i < words; i += 2) {
if (words - i == 1) {
- if (dev_spec->shadow_ram[offset+i].modified) {
- data[i] = dev_spec->shadow_ram[offset+i].value;
+ if (dev_spec->shadow_ram[offset + i].modified) {
+ data[i] =
+ dev_spec->shadow_ram[offset + i].value;
} else {
offset_to_read = act_offset + i -
((act_offset + i) % 2);
}
} else {
offset_to_read = act_offset + i;
- if (!(dev_spec->shadow_ram[offset+i].modified) ||
- !(dev_spec->shadow_ram[offset+i+1].modified)) {
+ if (!(dev_spec->shadow_ram[offset + i].modified) ||
+ !(dev_spec->shadow_ram[offset + i + 1].modified)) {
ret_val =
e1000_read_flash_dword_ich8lan(hw,
offset_to_read,
if (ret_val)
break;
}
- if (dev_spec->shadow_ram[offset+i].modified)
- data[i] = dev_spec->shadow_ram[offset+i].value;
+ if (dev_spec->shadow_ram[offset + i].modified)
+ data[i] =
+ dev_spec->shadow_ram[offset + i].value;
else
- data[i] = (u16) (dword & 0xFFFF);
- if (dev_spec->shadow_ram[offset+i].modified)
- data[i+1] =
- dev_spec->shadow_ram[offset+i+1].value;
+ data[i] = (u16)(dword & 0xFFFF);
+ if (dev_spec->shadow_ram[offset + i + 1].modified)
+ data[i + 1] =
+ dev_spec->shadow_ram[offset + i + 1].value;
else
- data[i+1] = (u16) (dword >> 16 & 0xFFFF);
+ data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
}
}
ret_val = E1000_SUCCESS;
for (i = 0; i < words; i++) {
- if (dev_spec->shadow_ram[offset+i].modified) {
- data[i] = dev_spec->shadow_ram[offset+i].value;
+ if (dev_spec->shadow_ram[offset + i].modified) {
+ data[i] = dev_spec->shadow_ram[offset + i].value;
} else {
ret_val = e1000_read_flash_word_ich8lan(hw,
act_offset + i,
nvm->ops.acquire(hw);
for (i = 0; i < words; i++) {
- dev_spec->shadow_ram[offset+i].modified = true;
- dev_spec->shadow_ram[offset+i].value = data[i];
+ dev_spec->shadow_ram[offset + i].modified = true;
+ dev_spec->shadow_ram[offset + i].value = data[i];
}
nvm->ops.release(hw);
}
for (i = 0; i < words; i++) {
- eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+ eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
E1000_NVM_RW_REG_START;
E1000_WRITE_REG(hw, E1000_EERD, eerd);
* lane and update whole word
*/
data_local = i2ccmd & 0xFF00;
- data_local |= data;
+ data_local |= (u32)data;
i2ccmd = ((offset <<
E1000_I2CCMD_REG_ADDR_SHIFT) |
E1000_I2CCMD_OPCODE_WRITE | data_local);
/**
* e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
* @page: page to access
+ * @reg: register to access
*
* Returns the phy address for the page requested.
**/
* @offset: register offset to be read
* @data: pointer to the read data
* @locked: semaphore has already been acquired or not
+ * @page_set: BM_WUC_PAGE already set and access enabled
*
* Acquires semaphore, if necessary, then reads the PHY register at offset
* and stores the retrieved information in data. Release any acquired
* @offset: register offset to write to
* @data: data to write at register offset
* @locked: semaphore has already been acquired or not
+ * @page_set: BM_WUC_PAGE already set and access enabled
*
* Acquires semaphore, if necessary, then writes the data to PHY register
* at the offset. Release any acquired semaphores before exiting.