net/iavf: fix Rx function selection

A performance drop is caused by that the RX scalar path
is selected when AVX512 is disabled and some HW offload
is enabled.
Actually, the HW offload is supported by AVX2 and SSE.
In this scenario AVX2 path should be chosen.

This patch removes the offload related check for SSE and AVX2
as SSE and AVX2 do support the offload features.
No implementation change about the data path.

Fixes: eff56a7b9f97 ("net/iavf: add offload path for Rx AVX512")
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 232516c414fcce056320903ec3842265f71b92a6..87f7eebc650b58ae617e25400b473bcf3dd90c3a 100644 (file)
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -2401,13 +2401,11 @@ iavf_set_rx_function(struct rte_eth_dev *dev)
        check_ret = iavf_rx_vec_dev_check(dev);
        if (check_ret >= 0 &&
            rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
-               if (check_ret == IAVF_VECTOR_PATH) {
-                       use_sse = true;
-                       if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
-                            rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
-                           rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
-                               use_avx2 = true;
-               }
+               use_sse = true;
+               if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
+                    rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
+                   rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
+                       use_avx2 = true;
 
 #ifdef CC_AVX512_SUPPORT
                if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&