uint8_t *byte;
} h;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* Receive a burst of packets and forward them.
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_rx);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine five_tuple_swap_fwd_engine = {
" Set the option to hide the zero values"
" for xstats display.\n"
+ "set record-core-cycles on|off\n"
+ " Set the option to enable measurement of CPU cycles.\n"
+
"set port (port_id) vf (vf_id) rx|tx on|off\n"
" Enable/Disable a VF receive/tranmit from a port\n\n"
},
};
+/* *** SET OPTION TO ENABLE MEASUREMENT OF CPU CYCLES *** */
+struct cmd_set_record_core_cycles_result {
+ cmdline_fixed_string_t keyword;
+ cmdline_fixed_string_t name;
+ cmdline_fixed_string_t on_off;
+};
+
+static void
+cmd_set_record_core_cycles_parsed(void *parsed_result,
+ __rte_unused struct cmdline *cl,
+ __rte_unused void *data)
+{
+ struct cmd_set_record_core_cycles_result *res;
+ uint16_t on_off = 0;
+
+ res = parsed_result;
+ on_off = !strcmp(res->on_off, "on") ? 1 : 0;
+ set_record_core_cycles(on_off);
+}
+
+cmdline_parse_token_string_t cmd_set_record_core_cycles_keyword =
+ TOKEN_STRING_INITIALIZER(struct cmd_set_record_core_cycles_result,
+ keyword, "set");
+cmdline_parse_token_string_t cmd_set_record_core_cycles_name =
+ TOKEN_STRING_INITIALIZER(struct cmd_set_record_core_cycles_result,
+ name, "record-core-cycles");
+cmdline_parse_token_string_t cmd_set_record_core_cycles_on_off =
+ TOKEN_STRING_INITIALIZER(struct cmd_set_record_core_cycles_result,
+ on_off, "on#off");
+
+cmdline_parse_inst_t cmd_set_record_core_cycles = {
+ .f = cmd_set_record_core_cycles_parsed,
+ .data = NULL,
+ .help_str = "set record-core-cycles on|off",
+ .tokens = {
+ (void *)&cmd_set_record_core_cycles_keyword,
+ (void *)&cmd_set_record_core_cycles_name,
+ (void *)&cmd_set_record_core_cycles_on_off,
+ NULL,
+ },
+};
+
/* *** CONFIGURE UNICAST HASH TABLE *** */
struct cmd_set_uc_hash_table {
cmdline_fixed_string_t set;
(cmdline_parse_inst_t *)&cmd_set_fwd_eth_peer,
(cmdline_parse_inst_t *)&cmd_set_qmap,
(cmdline_parse_inst_t *)&cmd_set_xstats_hide_zero,
+ (cmdline_parse_inst_t *)&cmd_set_record_core_cycles,
(cmdline_parse_inst_t *)&cmd_operate_port,
(cmdline_parse_inst_t *)&cmd_operate_specific_port,
(cmdline_parse_inst_t *)&cmd_operate_attach_port,
xstats_hide_zero = on_off;
}
+void
+set_record_core_cycles(uint8_t on_off)
+{
+ record_core_cycles = on_off;
+}
+
static inline void
print_fdir_mask(struct rte_eth_fdir_masks *mask)
{
uint16_t nb_segments = 0;
int ret;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/* receive a burst of packet */
nb_rx = rte_eth_rx_burst(fs->rx_port, fs->rx_queue, pkts_burst,
} while (++nb_tx < nb_rx);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine csum_fwd_engine = {
uint16_t i;
uint32_t retry;
uint64_t tx_offloads;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
static int next_flow = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/* Receive a burst of packets and discard them. */
nb_rx = rte_eth_rx_burst(fs->rx_port, fs->rx_queue, pkts_burst,
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_pkt);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine flow_gen_engine = {
uint32_t cksum;
uint8_t i;
int l2_len;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* First, receive a burst of packets.
}
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine icmp_echo_engine = {
uint16_t nb_rx;
uint16_t nb_tx;
uint32_t retry;
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
-
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* Receive a burst of packets and forward them.
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_rx);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine io_fwd_engine = {
uint16_t i;
uint64_t ol_flags = 0;
uint64_t tx_offloads;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* Receive a burst of packets and forward them.
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_rx);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine mac_fwd_engine = {
uint16_t nb_rx;
uint16_t nb_tx;
uint32_t retry;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* Receive a burst of packets and forward them.
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_rx);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine mac_swap_engine = {
"--rxpt= | --rxht= | --rxwt= | --rxfreet= | "
"--txpt= | --txht= | --txwt= | --txfreet= | "
"--txrst= | --tx-offloads= | | --rx-offloads= | "
- "--vxlan-gpe-port= ]\n",
+ "--vxlan-gpe-port= | --record-core-cycles]\n",
progname);
#ifdef RTE_LIBRTE_CMDLINE
printf(" --interactive: run in interactive mode.\n");
"valid only with --mp-alloc=anon\n");
printf(" --rx-mq-mode=0xX: hexadecimal bitmask of RX mq mode can be "
"enabled\n");
+ printf(" --record-core-cycles: enable measurement of CPU cycles.\n");
}
#ifdef RTE_LIBRTE_CMDLINE
{ "noisy-lkup-num-reads-writes", 1, 0, 0 },
{ "no-iova-contig", 0, 0, 0 },
{ "rx-mq-mode", 1, 0, 0 },
+ { "record-core-cycles", 0, 0, 0 },
{ 0, 0, 0, 0 },
};
"rx-mq-mode must be >= 0 and <= %d\n",
ETH_MQ_RX_VMDQ_DCB_RSS);
}
+ if (!strcmp(lgopts[opt_idx].name, "record-core-cycles"))
+ record_core_cycles = 1;
break;
case 'h':
usage(argv[0]);
struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
uint16_t nb_rx;
uint16_t i;
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
/*
* Receive a burst of packets.
for (i = 0; i < nb_rx; i++)
rte_pktmbuf_free(pkts_burst[i]);
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
struct fwd_engine rx_only_engine = {
*/
uint8_t xstats_hide_zero;
+/*
+ * Measure of CPU cycles disabled by default
+ */
+uint8_t record_core_cycles;
+
unsigned int num_sockets = 0;
unsigned int socket_ids[RTE_MAX_NUMA_NODES];
uint64_t total_tx_dropped = 0;
uint64_t total_rx_nombuf = 0;
struct rte_eth_stats stats;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
uint64_t fwd_cycles = 0;
-#endif
uint64_t total_recv = 0;
uint64_t total_xmit = 0;
struct rte_port *port;
ports_stats[fs->rx_port].rx_bad_outer_l4_csum +=
fs->rx_bad_outer_l4_csum;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- fwd_cycles += fs->core_cycles;
-#endif
+ if (record_core_cycles)
+ fwd_cycles += fs->core_cycles;
}
for (i = 0; i < cur_fwd_config.nb_fwd_ports; i++) {
uint8_t j;
printf(" %s++++++++++++++++++++++++++++++++++++++++++++++"
"%s\n",
acc_stats_border, acc_stats_border);
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
+ if (record_core_cycles) {
#define CYC_PER_MHZ 1E6
- if (total_recv > 0 || total_xmit > 0) {
- uint64_t total_pkts = 0;
- if (strcmp(cur_fwd_eng->fwd_mode_name, "txonly") == 0 ||
- strcmp(cur_fwd_eng->fwd_mode_name, "flowgen") == 0)
- total_pkts = total_xmit;
- else
- total_pkts = total_recv;
+ if (total_recv > 0 || total_xmit > 0) {
+ uint64_t total_pkts = 0;
+ if (strcmp(cur_fwd_eng->fwd_mode_name, "txonly") == 0 ||
+ strcmp(cur_fwd_eng->fwd_mode_name, "flowgen") == 0)
+ total_pkts = total_xmit;
+ else
+ total_pkts = total_recv;
- printf("\n CPU cycles/packet=%.2F (total cycles="
- "%"PRIu64" / total %s packets=%"PRIu64") at %"PRIu64
- " MHz Clock\n",
- (double) fwd_cycles / total_pkts,
- fwd_cycles, cur_fwd_eng->fwd_mode_name, total_pkts,
- (uint64_t)(rte_get_tsc_hz() / CYC_PER_MHZ));
+ printf("\n CPU cycles/packet=%.2F (total cycles="
+ "%"PRIu64" / total %s packets=%"PRIu64") at %"PRIu64
+ " MHz Clock\n",
+ (double) fwd_cycles / total_pkts,
+ fwd_cycles, cur_fwd_eng->fwd_mode_name, total_pkts,
+ (uint64_t)(rte_get_tsc_hz() / CYC_PER_MHZ));
+ }
}
-#endif
}
void
memset(&fs->rx_burst_stats, 0, sizeof(fs->rx_burst_stats));
memset(&fs->tx_burst_stats, 0, sizeof(fs->tx_burst_stats));
#endif
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
fs->core_cycles = 0;
-#endif
}
}
uint64_t rx_bad_outer_l4_csum;
/**< received packets has bad outer l4 checksum */
unsigned int gro_times; /**< GRO operation times */
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
uint64_t core_cycles; /**< used for RX and TX processing */
-#endif
#ifdef RTE_TEST_PMD_RECORD_BURST_STATS
struct pkt_burst_stats rx_burst_stats;
struct pkt_burst_stats tx_burst_stats;
extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */
/* globals used for configuration */
+extern uint8_t record_core_cycles; /**< Enables measurement of CPU cycles */
extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */
extern int testpmd_logtype; /**< Log type for testpmd logs */
extern uint8_t interactive;
#define port_id_pci_reg_write(pt_id, reg_off, reg_value) \
port_pci_reg_write(&ports[(pt_id)], (reg_off), (reg_value))
+static inline void
+get_start_cycles(uint64_t *start_tsc)
+{
+ if (record_core_cycles)
+ *start_tsc = rte_rdtsc();
+}
+
+static inline void
+get_end_cycles(struct fwd_stream *fs, uint64_t start_tsc)
+{
+ if (record_core_cycles)
+ fs->core_cycles += rte_rdtsc() - start_tsc;
+}
+
/* Prototypes */
unsigned int parse_item_list(char* str, const char* item_name,
unsigned int max_items,
void set_xstats_hide_zero(uint8_t on_off);
+void set_record_core_cycles(uint8_t on_off);
void set_verbose_level(uint16_t vb_level);
void set_tx_pkt_segments(unsigned *seg_lengths, unsigned nb_segs);
void show_tx_pkt_segments(void);
uint32_t retry;
uint64_t ol_flags = 0;
uint64_t tx_offloads;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- uint64_t start_tsc;
- uint64_t end_tsc;
- uint64_t core_cycles;
-#endif
+ uint64_t start_tsc = 0;
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- start_tsc = rte_rdtsc();
-#endif
+ get_start_cycles(&start_tsc);
mbp = current_fwd_lcore()->mbp;
txp = &ports[fs->tx_port];
} while (++nb_tx < nb_pkt);
}
-#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
- end_tsc = rte_rdtsc();
- core_cycles = (end_tsc - start_tsc);
- fs->core_cycles = (uint64_t) (fs->core_cycles + core_cycles);
-#endif
+ get_end_cycles(fs, start_tsc);
}
static void
The default value is 0x7::
ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_DCB_FLAG | ETH_MQ_RX_VMDQ_FLAG
+
+* ``--record-core-cycles``
+
+ Enable measurement of CPU cycles per packet.
This is equivalent to the ``--portmask`` command-line option.
+set record-core-cycles
+~~~~~~~~~~~~~~~~~~~~~~
+
+Set the recording of CPU cycles::
+
+ testpmd> set record-core-cycles (on|off)
+
+Where:
+
+* ``on`` enables measurement of CPU cycles per packet.
+
+* ``off`` disables measurement of CPU cycles per packet.
+
+This is equivalent to the ``--record-core-cycles command-line`` option.
+
set burst
~~~~~~~~~