CONFIG_RTE_PKTMBUF_HEADROOM=128
# Enable IEEE1588, Keep it disable by default
-CONFIG_RTE_LIBRTE_IEEE1588=n
+CONFIG_RTE_LIBRTE_IEEE1588=y
# Doesn't support NUMA
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
dev->dev_type = DPAA2_QDMA;
else if (!strncmp("dpdmux", t_ptr, 6))
dev->dev_type = DPAA2_MUX;
+ else if (!strncmp("dprtc", t_ptr, 5))
+ dev->dev_type = DPAA2_DPRTC;
else
dev->dev_type = DPAA2_UNKNOWN;
case DPAA2_IO:
case DPAA2_CI:
case DPAA2_BPOOL:
+ case DPAA2_DPRTC:
case DPAA2_MUX:
TAILQ_FOREACH(object, &dpaa2_obj_list, next) {
if (dev->dev_type == object->dev_type)
case DPAA2_CON:
case DPAA2_CI:
case DPAA2_BPOOL:
+ case DPAA2_DPRTC:
case DPAA2_MUX:
/* IN case of secondary processes, all control objects
* like dpbp, dpcon, dpci are not initialized/required
DPAA2_MPORTAL, /**< DPMCP type device */
DPAA2_QDMA, /**< DPDMAI type device */
DPAA2_MUX, /**< DPDMUX type device */
+ DPAA2_DPRTC, /**< DPRTC type device */
/* Unknown device placeholder */
DPAA2_UNKNOWN,
DPAA2_DEVTYPE_MAX,
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588) += mc/dprtc.c
+SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588) += dpaa2_ptp.c
LDLIBS += -lrte_bus_fslmc
LDLIBS += -lrte_mempool_dpaa2
#define DPAA2_ETH_FAS_DISC 0x80000000
/* MACSEC frame */
#define DPAA2_ETH_FAS_MS 0x40000000
-#define DPAA2_ETH_FAS_PTP 0x08000000
+#define DPAA2_ETH_FAS_PTP BIT_POS(59)
/* Ethernet multicast frame */
#define DPAA2_ETH_FAS_MC 0x04000000
/* Ethernet broadcast frame */
.rss_hash_update = dpaa2_dev_rss_hash_update,
.rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
.filter_ctrl = dpaa2_dev_flow_ctrl,
+#if defined(RTE_LIBRTE_IEEE1588)
+ .timesync_enable = dpaa2_timesync_enable,
+ .timesync_disable = dpaa2_timesync_disable,
+ .timesync_read_time = dpaa2_timesync_read_time,
+ .timesync_write_time = dpaa2_timesync_write_time,
+ .timesync_adjust_time = dpaa2_timesync_adjust_time,
+ .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
+ .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
+#endif
};
/* Populate the mac address from physically available (u-boot/firmware) and/or
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016 NXP
+ * Copyright 2016-2019 NXP
*
*/
uint64_t qos_extract_param;
uint64_t fs_extract_param[MAX_TCS];
} extract;
+
+#if defined(RTE_LIBRTE_IEEE1588)
+ /*stores timestamp of last received packet on dev*/
+ uint64_t rx_timestamp;
+ /*stores timestamp of last received tx confirmation packet on dev*/
+ uint64_t tx_timestamp;
+ /* stores pointer to next tx_conf queue that should be processed,
+ * it corresponds to last packet transmitted
+ */
+ struct dpaa2_queue *next_tx_conf_queue;
+#endif
LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
};
void dpaa2_flow_clean(struct rte_eth_dev *dev);
uint16_t dpaa2_dev_tx_conf(void *queue) __attribute__((unused));
+#if defined(RTE_LIBRTE_IEEE1588)
+int dpaa2_timesync_enable(struct rte_eth_dev *dev);
+int dpaa2_timesync_disable(struct rte_eth_dev *dev);
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+ const struct timespec *timestamp);
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp,
+ uint32_t flags __rte_unused);
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+#endif
#endif /* _DPAA2_ETHDEV_H */
--- /dev/null
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ */
+
+#include <sys/queue.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdarg.h>
+
+#include <rte_ethdev.h>
+#include <rte_log.h>
+#include <rte_eth_ctrl.h>
+#include <rte_malloc.h>
+#include <rte_time.h>
+
+#include <rte_fslmc.h>
+#include <fsl_dprtc.h>
+#include <fsl_dpkg.h>
+
+#include <dpaa2_ethdev.h>
+#include <dpaa2_pmd_logs.h>
+
+struct dpaa2_dprtc_dev {
+ struct fsl_mc_io dprtc; /** handle to DPRTC portal object */
+ uint16_t token;
+ uint32_t dprtc_id; /*HW ID for DPRTC object */
+};
+static struct dpaa2_dprtc_dev *dprtc_dev;
+
+int dpaa2_timesync_enable(struct rte_eth_dev *dev __rte_unused)
+{
+ return 0;
+}
+
+int dpaa2_timesync_disable(struct rte_eth_dev *dev __rte_unused)
+{
+ return 0;
+}
+
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+ struct timespec *timestamp)
+{
+ uint64_t ns;
+ int ret = 0;
+
+ RTE_SET_USED(dev);
+
+ ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+ dprtc_dev->token, &ns);
+ if (ret) {
+ DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+ return ret;
+ }
+
+ *timestamp = rte_ns_to_timespec(ns);
+
+ return 0;
+}
+
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+ const struct timespec *ts)
+{
+ uint64_t ns;
+ int ret = 0;
+
+ RTE_SET_USED(dev);
+
+ ns = rte_timespec_to_ns(ts);
+
+ ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+ dprtc_dev->token, ns);
+ if (ret) {
+ DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
+{
+ uint64_t ns;
+ int ret = 0;
+
+ RTE_SET_USED(dev);
+
+ ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+ dprtc_dev->token, &ns);
+ if (ret) {
+ DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+ return ret;
+ }
+
+ ns += delta;
+
+ ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+ dprtc_dev->token, ns);
+ if (ret) {
+ DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+
+ if (priv->next_tx_conf_queue)
+ dpaa2_dev_tx_conf(priv->next_tx_conf_queue);
+ else
+ return -1;
+ *timestamp = rte_ns_to_timespec(priv->tx_timestamp);
+
+ return 0;
+}
+
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+ struct timespec *timestamp,
+ uint32_t flags __rte_unused)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ *timestamp = rte_ns_to_timespec(priv->rx_timestamp);
+ return 0;
+}
+
+static int
+dpaa2_create_dprtc_device(int vdev_fd __rte_unused,
+ struct vfio_device_info *obj_info __rte_unused,
+ int dprtc_id)
+{
+ struct dprtc_attr attr;
+ int ret;
+
+ PMD_INIT_FUNC_TRACE();
+
+ /* Allocate DPAA2 dprtc handle */
+ dprtc_dev = rte_malloc(NULL, sizeof(struct dpaa2_dprtc_dev), 0);
+ if (!dprtc_dev) {
+ DPAA2_PMD_ERR("Memory allocation failed for DPRTC Device");
+ return -1;
+ }
+
+ /* Open the dprtc object */
+ dprtc_dev->dprtc.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX];
+ ret = dprtc_open(&dprtc_dev->dprtc, CMD_PRI_LOW, dprtc_id,
+ &dprtc_dev->token);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to open dprtc object: err(%d)", ret);
+ goto init_err;
+ }
+
+ ret = dprtc_get_attributes(&dprtc_dev->dprtc, CMD_PRI_LOW,
+ dprtc_dev->token, &attr);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to get dprtc attr: err(%d)", ret);
+ goto init_err;
+ }
+
+ dprtc_dev->dprtc_id = dprtc_id;
+
+ return 0;
+
+init_err:
+ if (dprtc_dev)
+ rte_free(dprtc_dev);
+
+ return -1;
+}
+
+static struct rte_dpaa2_object rte_dpaa2_dprtc_obj = {
+ .dev_type = DPAA2_DPRTC,
+ .create = dpaa2_create_dprtc_device,
+};
+
+RTE_PMD_REGISTER_DPAA2_OBJECT(dprtc, rte_dpaa2_dprtc_obj);
if dpdk_conf.has('RTE_LIBRTE_IEEE1588')
sources += files('mc/dprtc.c')
+ sources += files('dpaa2_ptp.c')
endif
includes += include_directories('base', 'mc')
git.droids-corp.org / dpdk.git / commitdiff