]> git.droids-corp.org - protos/xbee-elec.git/commitdiff
new mainboard without xmega
authorOlivier Matz <zer0@droids-corp.org>
Thu, 4 Jul 2013 18:03:52 +0000 (20:03 +0200)
committerOlivier Matz <zer0@droids-corp.org>
Thu, 4 Jul 2013 18:05:13 +0000 (20:05 +0200)
26 files changed:
atmel.l#1 [new file with mode: 0644]
atmel.l#2 [new file with mode: 0644]
atmel.lbr [new file with mode: 0644]
maxstream.lbr [new file with mode: 0644]
xbee_mainboard/eagle.epf
xbee_mainboard/mainboard.b#1
xbee_mainboard/mainboard.b#2
xbee_mainboard/mainboard.b#3
xbee_mainboard/mainboard.b#4
xbee_mainboard/mainboard.b#5
xbee_mainboard/mainboard.b#6
xbee_mainboard/mainboard.b#7
xbee_mainboard/mainboard.b#8
xbee_mainboard/mainboard.b#9
xbee_mainboard/mainboard.brd
xbee_mainboard/mainboard.s#1
xbee_mainboard/mainboard.s#2
xbee_mainboard/mainboard.s#3
xbee_mainboard/mainboard.s#4
xbee_mainboard/mainboard.s#5
xbee_mainboard/mainboard.s#6
xbee_mainboard/mainboard.s#7
xbee_mainboard/mainboard.s#8
xbee_mainboard/mainboard.s#9
xbee_mainboard/mainboard.sch
xbee_mainboard/partlist.txt [deleted file]

diff --git a/atmel.l#1 b/atmel.l#1
new file mode 100644 (file)
index 0000000..7d58790
--- /dev/null
+++ b/atmel.l#1
@@ -0,0 +1,20777 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="yes" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="yes" active="yes"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="yes" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="yes" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>
+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>
+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
+<layer number="51" name="tDocu" color="6" fill="9" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+</layers>
+<library>
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL08">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-5.08" y1="-0.635" x2="-5.08" y2="0.635" width="0.1524" layer="21" curve="180"/>
+<wire x1="-5.08" y1="-0.635" x2="-5.08" y2="-2.794" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-2.794" x2="5.08" y2="-2.794" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="-2.794" x2="5.08" y2="2.794" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="2.794" x2="-5.08" y2="2.794" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="2.794" x2="-5.08" y2="0.635" width="0.1524" layer="21"/>
+<pad name="1" x="-3.81" y="-3.81" drill="0.8128" shape="long" rot="R90"/>
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+<pad name="8" x="-3.81" y="3.81" drill="0.8128" shape="long" rot="R90"/>
+<text x="-5.3594" y="-2.54" size="1.27" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-3.81" y="-0.9906" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL20">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-13.208" y1="-0.635" x2="-13.208" y2="-2.794" width="0.1524" layer="21"/>
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+<text x="-10.16" y="-0.762" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL28-3">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt; 0.3 inch</description>
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+</package>
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+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
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+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.&lt;br&gt;
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+Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF)&lt;br&gt;
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+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
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+</symbol>
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+</symbol>
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+<pin name="AVCC" x="-15.24" y="27.94" length="short" direction="pwr" rot="R270"/>
+</symbol>
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+<pin name="!RESET" x="-12.7" y="7.62" length="short" direction="in"/>
+<pin name="RDY/!BUSY" x="-12.7" y="-2.54" length="short" direction="out"/>
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+<symbol name="ATMEGA644-20PU">
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+<pin name="XTAL1" x="-30.48" y="-7.62" length="short" direction="in"/>
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+<pin name="PCINT6/ADC6_PA6" x="30.48" y="7.62" length="short" rot="R180"/>
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+<pin name="PCINT2/ADC2_PA2" x="30.48" y="17.78" length="short" rot="R180"/>
+<pin name="PCINT1/ADC1_PA1" x="30.48" y="20.32" length="short" rot="R180"/>
+<pin name="PCINT0/ADC0_PA0" x="30.48" y="22.86" length="short" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161D">
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+<pin name="!WP" x="-10.16" y="-7.62" length="short" direction="in"/>
+<pin name="RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="RDY/!BUSY" x="12.7" y="0" length="short" direction="out" rot="R180"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-7.62" length="short" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161VFN8">
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+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
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+<pin name="!WP" x="-10.16" y="0" length="short" direction="in"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AT90*4434P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*4434" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (LS)&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="44"/>
+<connect gate="G$1" pin="VCC2" pad="11"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4414" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J1" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J2" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J3" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515-A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="22"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4433" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="3-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2343" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2313" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S1200" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Y" package="SSOP20D8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY10" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes ROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY11*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY12*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY22" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1K ROM&lt;p&gt;
+128 bytes RAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;br&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+UART&lt;br&gt;
+RTC&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AC+)PE2" pad="4"/>
+<connect gate="G$1" pin="(AC-)PE3" pad="5"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PE1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7)" pad="54"/>
+<connect gate="G$1" pin="RD" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="WR" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90C8534" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+6-channel&lt;p&gt;
+10-bit A/D</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP48">
+<connects>
+<connect gate="G$1" pin="ADIN0" pad="1"/>
+<connect gate="G$1" pin="ADIN1" pad="13"/>
+<connect gate="G$1" pin="ADIN2" pad="14"/>
+<connect gate="G$1" pin="ADIN3" pad="15"/>
+<connect gate="G$1" pin="ADIN4" pad="16"/>
+<connect gate="G$1" pin="ADIN5" pad="17"/>
+<connect gate="G$1" pin="AGND" pad="11"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="31"/>
+<connect gate="G$1" pin="INT0" pad="35"/>
+<connect gate="G$1" pin="INT1" pad="34"/>
+<connect gate="G$1" pin="NC1" pad="2"/>
+<connect gate="G$1" pin="NC10" pad="12"/>
+<connect gate="G$1" pin="NC11" pad="19"/>
+<connect gate="G$1" pin="NC12" pad="21"/>
+<connect gate="G$1" pin="NC13" pad="25"/>
+<connect gate="G$1" pin="NC14" pad="26"/>
+<connect gate="G$1" pin="NC15" pad="27"/>
+<connect gate="G$1" pin="NC16" pad="28"/>
+<connect gate="G$1" pin="NC17" pad="29"/>
+<connect gate="G$1" pin="NC18" pad="30"/>
+<connect gate="G$1" pin="NC19" pad="32"/>
+<connect gate="G$1" pin="NC2" pad="3"/>
+<connect gate="G$1" pin="NC20" pad="36"/>
+<connect gate="G$1" pin="NC21" pad="37"/>
+<connect gate="G$1" pin="NC22" pad="40"/>
+<connect gate="G$1" pin="NC23" pad="41"/>
+<connect gate="G$1" pin="NC24" pad="42"/>
+<connect gate="G$1" pin="NC25" pad="43"/>
+<connect gate="G$1" pin="NC26" pad="48"/>
+<connect gate="G$1" pin="NC3" pad="4"/>
+<connect gate="G$1" pin="NC4" pad="5"/>
+<connect gate="G$1" pin="NC5" pad="6"/>
+<connect gate="G$1" pin="NC6" pad="7"/>
+<connect gate="G$1" pin="NC7" pad="8"/>
+<connect gate="G$1" pin="NC8" pad="9"/>
+<connect gate="G$1" pin="NC9" pad="10"/>
+<connect gate="G$1" pin="PA0" pad="47"/>
+<connect gate="G$1" pin="PA1" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="45"/>
+<connect gate="G$1" pin="PA3" pad="44"/>
+<connect gate="G$1" pin="PA4" pad="39"/>
+<connect gate="G$1" pin="PA5" pad="38"/>
+<connect gate="G$1" pin="PA6" pad="33"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="22"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="30"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="31"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="29"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="10"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="3"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="14"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="15"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="11"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="4"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="27"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="29"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="26"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="5"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="42"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="10"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="7"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="43"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY15L" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2.7 V&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM&lt;p&gt;
+4-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes &lt;B&gt;EEPROM&lt;/B&gt;&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-5" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="21"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="14"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="15"/>
+<connect gate="G$1" pin="PB2(T0)" pad="16"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="17"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="18"/>
+<connect gate="G$1" pin="PB5" pad="19"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD2" pad="4"/>
+<connect gate="G$1" pin="PD3" pad="5"/>
+<connect gate="G$1" pin="PD4" pad="6"/>
+<connect gate="G$1" pin="PD5" pad="11"/>
+<connect gate="G$1" pin="PD6" pad="12"/>
+<connect gate="G$1" pin="PD7" pad="13"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="VCC1" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND1" pad="21"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="20"/>
+<connect gate="G$1" pin="NC5" pad="22"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="13"/>
+<connect gate="G$1" pin="PB2(T0)" pad="14"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="15"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="16"/>
+<connect gate="G$1" pin="PB5" pad="17"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="30"/>
+<connect gate="G$1" pin="PD1" pad="31"/>
+<connect gate="G$1" pin="PD2" pad="32"/>
+<connect gate="G$1" pin="PD3" pad="1"/>
+<connect gate="G$1" pin="PD4" pad="2"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="10"/>
+<connect gate="G$1" pin="PD7" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="VCC1" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT25*" prefix="IC">
+<description>SPI bus serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="250X0" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS/" pad="1"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="HOLD/" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="6"/>
+<connect gate="G$1" pin="SI" pad="5"/>
+<connect gate="G$1" pin="SO" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP/" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="CAT25040LI-G" constant="no"/>
+<attribute name="OC_FARNELL" value="1718045" constant="no"/>
+<attribute name="OC_NEWARK" value="06R0588" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT24C*" prefix="IC">
+<description>2-wire serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="24CXX" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="A0" pad="1"/>
+<connect gate="G$1" pin="A1" pad="2"/>
+<connect gate="G$1" pin="A2" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="SCL" pad="6"/>
+<connect gate="G$1" pin="SDA" pad="5"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT24C1024BW-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1362646" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2044" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SDE2506" prefix="IC">
+<description>I2C/MicroWire &lt;B&gt;EEPROM&lt;/B&gt; (24xxx)</description>
+<gates>
+<gate name="G$1" symbol="SDE2506" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CE/" pad="2"/>
+<connect gate="G$1" pin="CLK" pad="5"/>
+<connect gate="G$1" pin="D" pad="4"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="TG" pad="8"/>
+<connect gate="G$1" pin="TP" pad="7"/>
+<connect gate="G$1" pin="VCC" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C*6" prefix="IC">
+<description>3-wire serial EEPROM</description>
+<gates>
+<gate name="G$1" symbol="93CX6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="ORG" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46D-PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1362666" constant="no"/>
+<attribute name="OC_NEWARK" value="50M3339" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C2051" prefix="IC">
+<description>80C31 &lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+2.7 V</description>
+<gates>
+<gate name="G$1" symbol="89C2051" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699389" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3687" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC20S">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699390" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3688" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;p&gt;
+128 Kbytes FLASH&lt;p&gt;
+4 Kbytes SRAM&lt;p&gt;
+2 Kbytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+RTC&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="01" pad="21"/>
+<connect gate="G$1" pin="02" pad="22"/>
+<connect gate="G$1" pin="A10-PC2" pad="37"/>
+<connect gate="G$1" pin="A11-PC3" pad="38"/>
+<connect gate="G$1" pin="A12-PC4" pad="39"/>
+<connect gate="G$1" pin="A13-PC5" pad="40"/>
+<connect gate="G$1" pin="A14-PC6" pad="41"/>
+<connect gate="G$1" pin="A15-PC7" pad="42"/>
+<connect gate="G$1" pin="A8-PC0" pad="35"/>
+<connect gate="G$1" pin="A9-PC1" pad="36"/>
+<connect gate="G$1" pin="AC+_PE2" pad="4"/>
+<connect gate="G$1" pin="AC-_PE3" pad="5"/>
+<connect gate="G$1" pin="AD0-PA0" pad="51"/>
+<connect gate="G$1" pin="AD1-PA1" pad="50"/>
+<connect gate="G$1" pin="AD2-PA2" pad="49"/>
+<connect gate="G$1" pin="AD3-PA3" pad="48"/>
+<connect gate="G$1" pin="AD4-PA4" pad="47"/>
+<connect gate="G$1" pin="AD5-PA5" pad="46"/>
+<connect gate="G$1" pin="AD6-PA6" pad="45"/>
+<connect gate="G$1" pin="AD7-PA7" pad="44"/>
+<connect gate="G$1" pin="ADC0-PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1-PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2-PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3-PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4-PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5-PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6-PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7-PF7" pad="54"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="AVREF" pad="62"/>
+<connect gate="G$1" pin="GND" pad="53"/>
+<connect gate="G$1" pin="INT4-PE4" pad="6"/>
+<connect gate="G$1" pin="INT5-PE5" pad="7"/>
+<connect gate="G$1" pin="INT6-PE6" pad="8"/>
+<connect gate="G$1" pin="INT7-PE7" pad="9"/>
+<connect gate="G$1" pin="MISO-PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI-PB2" pad="12"/>
+<connect gate="G$1" pin="OC0-PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A-PB5" pad="15"/>
+<connect gate="G$1" pin="OC1B-PB6" pad="16"/>
+<connect gate="G$1" pin="OC2-PB7" pad="17"/>
+<connect gate="G$1" pin="PD0-INT0" pad="25"/>
+<connect gate="G$1" pin="PD1-INT1" pad="26"/>
+<connect gate="G$1" pin="PD2-INT2" pad="27"/>
+<connect gate="G$1" pin="PD3-INT3" pad="28"/>
+<connect gate="G$1" pin="PD4-IC1" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6-T1" pad="31"/>
+<connect gate="G$1" pin="PD7-T2" pad="32"/>
+<connect gate="G$1" pin="PEN/" pad="1"/>
+<connect gate="G$1" pin="RD/" pad="34"/>
+<connect gate="G$1" pin="RESET/" pad="20"/>
+<connect gate="G$1" pin="RXD-PE0" pad="2"/>
+<connect gate="G$1" pin="SCK-PB1" pad="11"/>
+<connect gate="G$1" pin="SS-PB0" pad="10"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="TXD-PE1" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="52"/>
+<connect gate="G$1" pin="WR/" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C*52" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH; 2K Bytes EEPROM&lt;br&gt;
+Compatible with MCS-51 Products&lt;br&gt;
+at89s8252.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C52" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="33.02" y="5.08" addlevel="request"/>
+</gates>
+<devices>
+<device name="P6" package="DIL40">
+<connects>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="EA" pad="31"/>
+<connect gate="G$1" pin="P0.0AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0_T2" pad="1"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0" pad="10"/>
+<connect gate="G$1" pin="P3.1" pad="11"/>
+<connect gate="G$1" pin="P3.2" pad="12"/>
+<connect gate="G$1" pin="P3.3" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/RD" pad="17"/>
+<connect gate="G$1" pin="PSEN" pad="29"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="VCC" pad="40"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="EA" pad="35"/>
+<connect gate="G$1" pin="P0.0AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0_T2" pad="2"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0" pad="11"/>
+<connect gate="G$1" pin="P3.1" pad="13"/>
+<connect gate="G$1" pin="P3.2" pad="14"/>
+<connect gate="G$1" pin="P3.3" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/RD" pad="19"/>
+<connect gate="G$1" pin="PSEN" pad="32"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="VCC" pad="44"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Q" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="27C080" prefix="IC">
+<description>&lt;b&gt;8-Megabit (1Mx8) OTP EPROM&lt;/b&gt;</description>
+<gates>
+<gate name="G$1" symbol="27C080" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="15.24" y="-10.16" addlevel="request"/>
+</gates>
+<devices>
+<device name="32P6" package="DIL32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455026" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3824" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="SO32X">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC32R">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455025" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3823" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSOP32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="30"/>
+<connect gate="G$1" pin="!OE!VPP" pad="32"/>
+<connect gate="G$1" pin="A0" pad="20"/>
+<connect gate="G$1" pin="A1" pad="19"/>
+<connect gate="G$1" pin="A10" pad="31"/>
+<connect gate="G$1" pin="A11" pad="1"/>
+<connect gate="G$1" pin="A12" pad="12"/>
+<connect gate="G$1" pin="A13" pad="4"/>
+<connect gate="G$1" pin="A14" pad="5"/>
+<connect gate="G$1" pin="A15" pad="11"/>
+<connect gate="G$1" pin="A16" pad="10"/>
+<connect gate="G$1" pin="A17" pad="6"/>
+<connect gate="G$1" pin="A18" pad="7"/>
+<connect gate="G$1" pin="A19" pad="9"/>
+<connect gate="G$1" pin="A2" pad="18"/>
+<connect gate="G$1" pin="A3" pad="17"/>
+<connect gate="G$1" pin="A4" pad="16"/>
+<connect gate="G$1" pin="A5" pad="15"/>
+<connect gate="G$1" pin="A6" pad="14"/>
+<connect gate="G$1" pin="A7" pad="13"/>
+<connect gate="G$1" pin="A8" pad="3"/>
+<connect gate="G$1" pin="A9" pad="2"/>
+<connect gate="G$1" pin="O0" pad="21"/>
+<connect gate="G$1" pin="O1" pad="22"/>
+<connect gate="G$1" pin="O2" pad="23"/>
+<connect gate="G$1" pin="O3" pad="25"/>
+<connect gate="G$1" pin="O4" pad="26"/>
+<connect gate="G$1" pin="O5" pad="27"/>
+<connect gate="G$1" pin="O6" pad="28"/>
+<connect gate="G$1" pin="O7" pad="29"/>
+<connect gate="P" pin="GND" pad="24"/>
+<connect gate="P" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91R4008" prefix="IC">
+<description>&lt;b&gt;AT91 ARM® Thumb® RISC-Controller&lt;/b&gt;&lt;p&gt;
+Microcontroller AT91R40008</description>
+<gates>
+<gate name="A" symbol="AT91R4008" x="-25.4" y="2.54" addlevel="always"/>
+<gate name="B" symbol="AT91R4008-PARPORT" x="0" y="-7.62" addlevel="always"/>
+<gate name="C" symbol="AT91R4008-ADR" x="27.94" y="-7.62" addlevel="always"/>
+<gate name="D" symbol="D0-15" x="53.34" y="2.54" addlevel="always"/>
+<gate name="P1" symbol="GND" x="-38.1" y="-58.42" addlevel="always"/>
+<gate name="P2" symbol="GND" x="-35.56" y="-58.42" addlevel="always"/>
+<gate name="P3" symbol="GND" x="-33.02" y="-58.42" addlevel="always"/>
+<gate name="P4" symbol="GND" x="-30.48" y="-58.42" addlevel="always"/>
+<gate name="P5" symbol="GND" x="-27.94" y="-58.42" addlevel="always"/>
+<gate name="P15" symbol="VDDIO" x="-38.1" y="-35.56" addlevel="always"/>
+<gate name="P16" symbol="VDDIO" x="-35.56" y="-35.56" addlevel="always"/>
+<gate name="P17" symbol="VDDIO" x="-33.02" y="-35.56" addlevel="always"/>
+<gate name="P6" symbol="GND" x="-25.4" y="-58.42" addlevel="always"/>
+<gate name="P7" symbol="GND" x="-22.86" y="-58.42" addlevel="always"/>
+<gate name="P8" symbol="GND" x="-20.32" y="-58.42" addlevel="always"/>
+<gate name="P9" symbol="GND" x="-17.78" y="-58.42" addlevel="always"/>
+<gate name="P10" symbol="VDDIO" x="-30.48" y="-35.56" addlevel="always"/>
+<gate name="P11" symbol="VDDIO" x="-27.94" y="-35.56" addlevel="always"/>
+<gate name="P12" symbol="VDDCORE" x="-20.32" y="-35.56" addlevel="always"/>
+<gate name="P13" symbol="VDDCORE" x="-17.78" y="-35.56" addlevel="always"/>
+<gate name="P14" symbol="VDDCORE" x="-15.24" y="-35.56" addlevel="always"/>
+<gate name="P18" symbol="VDDIO" x="-25.4" y="-35.56" addlevel="always"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="A" pin="GND" pad="78"/>
+<connect gate="A" pin="MCKI" pad="82"/>
+<connect gate="A" pin="NCS0" pad="97"/>
+<connect gate="A" pin="NCS1" pad="98"/>
+<connect gate="A" pin="NRD/NOE" pad="92"/>
+<connect gate="A" pin="NRST" pad="79"/>
+<connect gate="A" pin="NRW0/NWE" pad="93"/>
+<connect gate="A" pin="NRW1/NUB" pad="77"/>
+<connect gate="A" pin="NWAIT" pad="96"/>
+<connect gate="A" pin="NWDOVF" pad="80"/>
+<connect gate="A" pin="TCK" pad="91"/>
+<connect gate="A" pin="TDI" pad="89"/>
+<connect gate="A" pin="TDO" pad="90"/>
+<connect gate="A" pin="TMS" pad="88"/>
+<connect gate="B" pin="P0/TCLK0" pad="49"/>
+<connect gate="B" pin="P1/TIOA0" pad="50"/>
+<connect gate="B" pin="P10/IRQ1" pad="63"/>
+<connect gate="B" pin="P11/IRQ2" pad="64"/>
+<connect gate="B" pin="P12/FIQ" pad="66"/>
+<connect gate="B" pin="P13/SCK0" pad="67"/>
+<connect gate="B" pin="P14/TXD0" pad="68"/>
+<connect gate="B" pin="P15/RXD0" pad="69"/>
+<connect gate="B" pin="P16" pad="70"/>
+<connect gate="B" pin="P17" pad="71"/>
+<connect gate="B" pin="P18" pad="72"/>
+<connect gate="B" pin="P19" pad="73"/>
+<connect gate="B" pin="P2/TIOB0" pad="51"/>
+<connect gate="B" pin="P20/SCK1" pad="74"/>
+<connect gate="B" pin="P21/TXD1/NTRI" pad="75"/>
+<connect gate="B" pin="P22/RXD1" pad="76"/>
+<connect gate="B" pin="P23" pad="83"/>
+<connect gate="B" pin="P24/BMS" pad="84"/>
+<connect gate="B" pin="P25/MCKO" pad="85"/>
+<connect gate="B" pin="P26/NCS2" pad="99"/>
+<connect gate="B" pin="P27/NCS3" pad="100"/>
+<connect gate="B" pin="P3/TCLK1" pad="54"/>
+<connect gate="B" pin="P4/TIOA1" pad="55"/>
+<connect gate="B" pin="P5/TIOB1" pad="56"/>
+<connect gate="B" pin="P6/TCLK2" pad="57"/>
+<connect gate="B" pin="P7/TIOA2" pad="58"/>
+<connect gate="B" pin="P8/TIOB2" pad="59"/>
+<connect gate="B" pin="P9/IRQ0" pad="60"/>
+<connect gate="C" pin="A1" pad="3"/>
+<connect gate="C" pin="A10" pad="13"/>
+<connect gate="C" pin="A11" pad="14"/>
+<connect gate="C" pin="A12" pad="15"/>
+<connect gate="C" pin="A13" pad="16"/>
+<connect gate="C" pin="A14" pad="17"/>
+<connect gate="C" pin="A15" pad="20"/>
+<connect gate="C" pin="A16" pad="21"/>
+<connect gate="C" pin="A17" pad="22"/>
+<connect gate="C" pin="A18" pad="23"/>
+<connect gate="C" pin="A19" pad="24"/>
+<connect gate="C" pin="A2" pad="4"/>
+<connect gate="C" pin="A3" pad="5"/>
+<connect gate="C" pin="A4" pad="6"/>
+<connect gate="C" pin="A5" pad="7"/>
+<connect gate="C" pin="A6" pad="8"/>
+<connect gate="C" pin="A7" pad="9"/>
+<connect gate="C" pin="A8" pad="11"/>
+<connect gate="C" pin="A9" pad="12"/>
+<connect gate="C" pin="NLB/A0" pad="1"/>
+<connect gate="C" pin="P28/CS7/A20" pad="25"/>
+<connect gate="C" pin="P29/CS6/A21" pad="26"/>
+<connect gate="C" pin="P30/CS5/A22" pad="29"/>
+<connect gate="C" pin="P31/CS4/A23" pad="30"/>
+<connect gate="D" pin="D0" pad="31"/>
+<connect gate="D" pin="D1" pad="32"/>
+<connect gate="D" pin="D10" pad="42"/>
+<connect gate="D" pin="D11" pad="43"/>
+<connect gate="D" pin="D12" pad="45"/>
+<connect gate="D" pin="D13" pad="46"/>
+<connect gate="D" pin="D14" pad="47"/>
+<connect gate="D" pin="D15" pad="48"/>
+<connect gate="D" pin="D2" pad="33"/>
+<connect gate="D" pin="D3" pad="34"/>
+<connect gate="D" pin="D4" pad="35"/>
+<connect gate="D" pin="D5" pad="37"/>
+<connect gate="D" pin="D6" pad="38"/>
+<connect gate="D" pin="D7" pad="39"/>
+<connect gate="D" pin="D8" pad="40"/>
+<connect gate="D" pin="D9" pad="41"/>
+<connect gate="P1" pin="GND" pad="2"/>
+<connect gate="P10" pin="VDDIO" pad="62"/>
+<connect gate="P11" pin="VDDIO" pad="81"/>
+<connect gate="P12" pin="VDDCORE" pad="27"/>
+<connect gate="P13" pin="VDDCORE" pad="61"/>
+<connect gate="P14" pin="VDDCORE" pad="94"/>
+<connect gate="P15" pin="VDDIO" pad="10"/>
+<connect gate="P16" pin="VDDIO" pad="28"/>
+<connect gate="P17" pin="VDDIO" pad="44"/>
+<connect gate="P18" pin="VDDIO" pad="95"/>
+<connect gate="P2" pin="GND" pad="18"/>
+<connect gate="P3" pin="GND" pad="19"/>
+<connect gate="P4" pin="GND" pad="36"/>
+<connect gate="P5" pin="GND" pad="52"/>
+<connect gate="P6" pin="GND" pad="53"/>
+<connect gate="P7" pin="GND" pad="65"/>
+<connect gate="P8" pin="GND" pad="86"/>
+<connect gate="P9" pin="GND" pad="87"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455146" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3782" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171657" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6920" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455147" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3783" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171665" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6921" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="MLF32">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SAM9708" prefix="SAM9708">
+<description>&lt;b&gt;128-voice Integrated Sound Synthesizer&lt;/b&gt;</description>
+<gates>
+<gate name="A" symbol="SAM9708" x="-45.72" y="17.78" addlevel="always"/>
+<gate name="C" symbol="SAM9708-SND" x="15.24" y="30.48" addlevel="always"/>
+<gate name="B" symbol="D0-15" x="-25.4" y="27.94" addlevel="always"/>
+<gate name="D" symbol="WA27" x="50.8" y="17.78" addlevel="always"/>
+<gate name="E" symbol="WD15" x="68.58" y="30.48" addlevel="always"/>
+<gate name="G1" symbol="GND" x="-27.94" y="-25.4"/>
+<gate name="G2" symbol="GND" x="-25.4" y="-25.4"/>
+<gate name="G3" symbol="GND" x="-22.86" y="-25.4"/>
+<gate name="G4" symbol="GND" x="-20.32" y="-25.4"/>
+<gate name="G5" symbol="GND" x="-17.78" y="-25.4"/>
+<gate name="G6" symbol="GND" x="-15.24" y="-25.4"/>
+<gate name="G7" symbol="GND" x="-12.7" y="-25.4"/>
+<gate name="G8" symbol="GND" x="-10.16" y="-25.4"/>
+<gate name="G9" symbol="GND" x="-7.62" y="-25.4"/>
+<gate name="G10" symbol="GND" x="-5.08" y="-25.4"/>
+<gate name="G11" symbol="GND" x="-2.54" y="-25.4"/>
+<gate name="G12" symbol="GND" x="0" y="-25.4"/>
+<gate name="G13" symbol="GND" x="2.54" y="-25.4"/>
+<gate name="G14" symbol="GND" x="5.08" y="-25.4"/>
+<gate name="G15" symbol="GND" x="7.62" y="-25.4"/>
+<gate name="G16" symbol="GND" x="10.16" y="-25.4"/>
+<gate name="G17" symbol="GND" x="12.7" y="-25.4"/>
+<gate name="G18" symbol="GND" x="15.24" y="-25.4"/>
+<gate name="G19" symbol="GND" x="17.78" y="-25.4"/>
+<gate name="V1" symbol="VCC1" x="-27.94" y="-7.62"/>
+<gate name="V2" symbol="VCC1" x="-25.4" y="-7.62"/>
+<gate name="V3" symbol="VCC1" x="-22.86" y="-7.62"/>
+<gate name="V4" symbol="VCC1" x="-20.32" y="-7.62"/>
+<gate name="V5" symbol="VCC1" x="-17.78" y="-7.62"/>
+<gate name="V6" symbol="VCC2" x="-12.7" y="-7.62"/>
+<gate name="V7" symbol="VCC2" x="-10.16" y="-7.62"/>
+<gate name="V8" symbol="VCC2" x="-7.62" y="-7.62"/>
+<gate name="V9" symbol="VCC2" x="-5.08" y="-7.62"/>
+<gate name="V10" symbol="VCC2" x="-2.54" y="-7.62"/>
+<gate name="V11" symbol="VC3" x="2.54" y="-7.62"/>
+<gate name="V12" symbol="VC3" x="5.08" y="-7.62"/>
+<gate name="V13" symbol="VC3" x="7.62" y="-7.62"/>
+<gate name="V14" symbol="VC3" x="10.16" y="-7.62"/>
+<gate name="V15" symbol="VC3" x="12.7" y="-7.62"/>
+<gate name="V16" symbol="VC3" x="15.24" y="-7.62"/>
+<gate name="V17" symbol="VC3" x="17.78" y="-7.62"/>
+<gate name="V18" symbol="VC3" x="20.32" y="-7.62"/>
+</gates>
+<devices>
+<device name="" package="TQFP144">
+<connects>
+<connect gate="A" pin="!CAS" pad="104"/>
+<connect gate="A" pin="!CS" pad="16"/>
+<connect gate="A" pin="!IO16" pad="4"/>
+<connect gate="A" pin="!PWDN" pad="137"/>
+<connect gate="A" pin="!RAS" pad="103"/>
+<connect gate="A" pin="!RD" pad="10"/>
+<connect gate="A" pin="!REFRESH" pad="105"/>
+<connect gate="A" pin="!RESET" pad="134"/>
+<connect gate="A" pin="!WR" pad="11"/>
+<connect gate="A" pin="A0" pad="12"/>
+<connect gate="A" pin="A1" pad="13"/>
+<connect gate="A" pin="A2" pad="15"/>
+<connect gate="A" pin="CK_OUT" pad="91"/>
+<connect gate="A" pin="IRQ" pad="14"/>
+<connect gate="A" pin="LDTEST" pad="136"/>
+<connect gate="A" pin="OVCK-OUT" pad="47"/>
+<connect gate="A" pin="RBS" pad="92"/>
+<connect gate="A" pin="READY" pad="7"/>
+<connect gate="A" pin="TEST" pad="135"/>
+<connect gate="A" pin="X1" pad="61"/>
+<connect gate="A" pin="X2" pad="62"/>
+<connect gate="B" pin="D0" pad="19"/>
+<connect gate="B" pin="D1" pad="22"/>
+<connect gate="B" pin="D10" pad="1"/>
+<connect gate="B" pin="D11" pad="144"/>
+<connect gate="B" pin="D12" pad="141"/>
+<connect gate="B" pin="D13" pad="140"/>
+<connect gate="B" pin="D14" pad="139"/>
+<connect gate="B" pin="D15" pad="138"/>
+<connect gate="B" pin="D2" pad="23"/>
+<connect gate="B" pin="D3" pad="24"/>
+<connect gate="B" pin="D4" pad="25"/>
+<connect gate="B" pin="D5" pad="26"/>
+<connect gate="B" pin="D6" pad="27"/>
+<connect gate="B" pin="D7" pad="28"/>
+<connect gate="B" pin="D8" pad="3"/>
+<connect gate="B" pin="D9" pad="2"/>
+<connect gate="C" pin="!WCS0" pad="89"/>
+<connect gate="C" pin="!WCS1" pad="90"/>
+<connect gate="C" pin="!WOE" pad="88"/>
+<connect gate="C" pin="!WWE" pad="87"/>
+<connect gate="C" pin="BCK-OUT" pad="46"/>
+<connect gate="C" pin="LFT" pad="60"/>
+<connect gate="C" pin="MIDI1_IN" pad="29"/>
+<connect gate="C" pin="MIDI1_OUT" pad="31"/>
+<connect gate="C" pin="MIDI2_IN" pad="30"/>
+<connect gate="C" pin="MIDI2_OUT" pad="32"/>
+<connect gate="C" pin="SD-IN0" pad="33"/>
+<connect gate="C" pin="SD-IN1" pad="34"/>
+<connect gate="C" pin="SD-IN2" pad="37"/>
+<connect gate="C" pin="SD-IN3" pad="38"/>
+<connect gate="C" pin="SD-IN4" pad="48"/>
+<connect gate="C" pin="SD-IN5" pad="49"/>
+<connect gate="C" pin="SD-IN6" pad="50"/>
+<connect gate="C" pin="SD-IN7" pad="53"/>
+<connect gate="C" pin="SD-OUT0" pad="39"/>
+<connect gate="C" pin="SD-OUT1" pad="40"/>
+<connect gate="C" pin="SD-OUT2" pad="43"/>
+<connect gate="C" pin="SD-OUT3" pad="44"/>
+<connect gate="C" pin="SD-OUT4" pad="54"/>
+<connect gate="C" pin="SD-OUT5" pad="55"/>
+<connect gate="C" pin="SD-OUT6" pad="56"/>
+<connect gate="C" pin="SD-OUT7" pad="57"/>
+<connect gate="C" pin="WS-OUT" pad="45"/>
+<connect gate="D" pin="WA0" pad="93"/>
+<connect gate="D" pin="WA1" pad="94"/>
+<connect gate="D" pin="WA10" pad="114"/>
+<connect gate="D" pin="WA11" pad="115"/>
+<connect gate="D" pin="WA12" pad="116"/>
+<connect gate="D" pin="WA13" pad="117"/>
+<connect gate="D" pin="WA14" pad="118"/>
+<connect gate="D" pin="WA15" pad="119"/>
+<connect gate="D" pin="WA16" pad="120"/>
+<connect gate="D" pin="WA17" pad="121"/>
+<connect gate="D" pin="WA18" pad="122"/>
+<connect gate="D" pin="WA19" pad="123"/>
+<connect gate="D" pin="WA2" pad="95"/>
+<connect gate="D" pin="WA20" pad="126"/>
+<connect gate="D" pin="WA21" pad="127"/>
+<connect gate="D" pin="WA22" pad="128"/>
+<connect gate="D" pin="WA23" pad="129"/>
+<connect gate="D" pin="WA24" pad="130"/>
+<connect gate="D" pin="WA25" pad="131"/>
+<connect gate="D" pin="WA26" pad="132"/>
+<connect gate="D" pin="WA3" pad="96"/>
+<connect gate="D" pin="WA4" pad="101"/>
+<connect gate="D" pin="WA5" pad="102"/>
+<connect gate="D" pin="WA6" pad="106"/>
+<connect gate="D" pin="WA7" pad="107"/>
+<connect gate="D" pin="WA8" pad="108"/>
+<connect gate="D" pin="WA9" pad="111"/>
+<connect gate="E" pin="WD0" pad="86"/>
+<connect gate="E" pin="WD1" pad="85"/>
+<connect gate="E" pin="WD10" pad="72"/>
+<connect gate="E" pin="WD11" pad="71"/>
+<connect gate="E" pin="WD12" pad="68"/>
+<connect gate="E" pin="WD13" pad="67"/>
+<connect gate="E" pin="WD14" pad="66"/>
+<connect gate="E" pin="WD15" pad="65"/>
+<connect gate="E" pin="WD2" pad="84"/>
+<connect gate="E" pin="WD3" pad="79"/>
+<connect gate="E" pin="WD4" pad="78"/>
+<connect gate="E" pin="WD5" pad="77"/>
+<connect gate="E" pin="WD6" pad="76"/>
+<connect gate="E" pin="WD7" pad="75"/>
+<connect gate="E" pin="WD8" pad="74"/>
+<connect gate="E" pin="WD9" pad="73"/>
+<connect gate="G1" pin="GND" pad="6"/>
+<connect gate="G10" pin="GND" pad="70"/>
+<connect gate="G11" pin="GND" pad="82"/>
+<connect gate="G12" pin="GND" pad="83"/>
+<connect gate="G13" pin="GND" pad="98"/>
+<connect gate="G14" pin="GND" pad="100"/>
+<connect gate="G15" pin="GND" pad="110"/>
+<connect gate="G16" pin="GND" pad="113"/>
+<connect gate="G17" pin="GND" pad="125"/>
+<connect gate="G18" pin="GND" pad="133"/>
+<connect gate="G19" pin="GND" pad="143"/>
+<connect gate="G2" pin="GND" pad="9"/>
+<connect gate="G3" pin="GND" pad="18"/>
+<connect gate="G4" pin="GND" pad="21"/>
+<connect gate="G5" pin="GND" pad="36"/>
+<connect gate="G6" pin="GND" pad="42"/>
+<connect gate="G7" pin="GND" pad="51"/>
+<connect gate="G8" pin="GND" pad="59"/>
+<connect gate="G9" pin="GND" pad="64"/>
+<connect gate="V1" pin="VCC1" pad="5"/>
+<connect gate="V10" pin="VCC2" pad="124"/>
+<connect gate="V11" pin="VC3" pad="8"/>
+<connect gate="V12" pin="VC3" pad="17"/>
+<connect gate="V13" pin="VC3" pad="41"/>
+<connect gate="V14" pin="VC3" pad="58"/>
+<connect gate="V15" pin="VC3" pad="63"/>
+<connect gate="V16" pin="VC3" pad="80"/>
+<connect gate="V17" pin="VC3" pad="99"/>
+<connect gate="V18" pin="VC3" pad="112"/>
+<connect gate="V2" pin="VCC1" pad="20"/>
+<connect gate="V3" pin="VCC1" pad="35"/>
+<connect gate="V4" pin="VCC1" pad="52"/>
+<connect gate="V5" pin="VCC1" pad="142"/>
+<connect gate="V6" pin="VCC2" pad="69"/>
+<connect gate="V7" pin="VCC2" pad="81"/>
+<connect gate="V8" pin="VCC2" pad="97"/>
+<connect gate="V9" pin="VCC2" pad="109"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8*C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.</description>
+<gates>
+<gate name="G$1" symbol="T8XC5121" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SSOP24">
+<connects>
+<connect gate="G$1" pin="CVCC" pad="3"/>
+<connect gate="G$1" pin="CVSS" pad="1"/>
+<connect gate="G$1" pin="DVCC" pad="22"/>
+<connect gate="G$1" pin="EVCC" pad="23"/>
+<connect gate="G$1" pin="LI" pad="2"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="9"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="8"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="7"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="6"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="5"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="4"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="19"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="16"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="18"/>
+<connect gate="G$1" pin="P3.4/T0" pad="17"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="15"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="14"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="13"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VSS" pad="21"/>
+<connect gate="G$1" pin="XTAL1" pad="12"/>
+<connect gate="G$1" pin="XTAL2" pad="11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8?C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/...doc4164.pdf</description>
+<gates>
+<gate name="G$1" symbol="T8X5121-PLCC52" x="0" y="0"/>
+</gates>
+<devices>
+<device name="3" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="5" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="9" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT8*C51SND1C" prefix="IC">
+<description>&lt;b&gt;Single-Chip Flash Microcontroller&lt;/b&gt;&lt;p&gt;
+with MP3 Decoder and Human Interface&lt;br&gt;
+Source: www.atmel.com .. doc4109.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C51SND1C" x="0" y="0"/>
+<gate name="P" symbol="P-AT89C51SND1C" x="40.64" y="-7.62" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DESL" pad="58"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0/A8" pad="78"/>
+<connect gate="G$1" pin="P2.1/A9" pad="77"/>
+<connect gate="G$1" pin="P2.2/A10" pad="71"/>
+<connect gate="G$1" pin="P2.3/A11" pad="70"/>
+<connect gate="G$1" pin="P2.4/A12" pad="69"/>
+<connect gate="G$1" pin="P2.5/A13" pad="68"/>
+<connect gate="G$1" pin="P2.6/A14" pad="67"/>
+<connect gate="G$1" pin="P2.7/A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+<connect gate="P" pin="PVDD" pad="23"/>
+<connect gate="P" pin="PVSS" pad="25"/>
+<connect gate="P" pin="UVDD" pad="31"/>
+<connect gate="P" pin="UVSS" pad="32"/>
+<connect gate="P" pin="VDD@1" pad="1"/>
+<connect gate="P" pin="VDD@2" pad="22"/>
+<connect gate="P" pin="VDD@3" pad="35"/>
+<connect gate="P" pin="VDD@4" pad="54"/>
+<connect gate="P" pin="VDD@5" pad="64"/>
+<connect gate="P" pin="VSS@1" pad="2"/>
+<connect gate="P" pin="VSS@2" pad="26"/>
+<connect gate="P" pin="VSS@3" pad="36"/>
+<connect gate="P" pin="VSS@4" pad="55"/>
+<connect gate="P" pin="VSS@5" pad="65"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-RO" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DESL" pad="45"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0/A8" pad="64"/>
+<connect gate="G$1" pin="P2.1/A9" pad="63"/>
+<connect gate="G$1" pin="P2.2/A10" pad="58"/>
+<connect gate="G$1" pin="P2.3/A11" pad="57"/>
+<connect gate="G$1" pin="P2.4/A12" pad="56"/>
+<connect gate="G$1" pin="P2.5/A13" pad="55"/>
+<connect gate="G$1" pin="P2.6/A14" pad="54"/>
+<connect gate="G$1" pin="P2.7/A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+<connect gate="P" pin="PVDD" pad="51"/>
+<connect gate="P" pin="PVSS" pad="14"/>
+<connect gate="P" pin="UVDD" pad="19"/>
+<connect gate="P" pin="UVSS" pad="20"/>
+<connect gate="P" pin="VDD@1" pad="11"/>
+<connect gate="P" pin="VDD@2" pad="12"/>
+<connect gate="P" pin="VDD@3" pad="23"/>
+<connect gate="P" pin="VDD@4" pad="41"/>
+<connect gate="P" pin="VDD@5" pad="71"/>
+<connect gate="P" pin="VSS@1" pad="15"/>
+<connect gate="P" pin="VSS@2" pad="24"/>
+<connect gate="P" pin="VSS@3" pad="42"/>
+<connect gate="P" pin="VSS@4" pad="52"/>
+<connect gate="P" pin="VSS@5" pad="72"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-7H" package="BGA81">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="B2"/>
+<connect gate="G$1" pin="!TST" pad="G2"/>
+<connect gate="G$1" pin="AIN0" pad="H5"/>
+<connect gate="G$1" pin="AIN1" pad="H7"/>
+<connect gate="G$1" pin="ALE" pad="A1"/>
+<connect gate="G$1" pin="AREFN" pad="J6"/>
+<connect gate="G$1" pin="AREFP" pad="J7"/>
+<connect gate="G$1" pin="AVDD" pad="F5"/>
+<connect gate="G$1" pin="AVSS" pad="H6"/>
+<connect gate="G$1" pin="D+" pad="J1"/>
+<connect gate="G$1" pin="D-" pad="H2"/>
+<connect gate="G$1" pin="DCLK" pad="H9"/>
+<connect gate="G$1" pin="DESL" pad="G9"/>
+<connect gate="G$1" pin="DOUT" pad="G7"/>
+<connect gate="G$1" pin="FILT" pad="E4"/>
+<connect gate="G$1" pin="MCLK" pad="F7"/>
+<connect gate="G$1" pin="MCMD" pad="F8"/>
+<connect gate="G$1" pin="MDAT" pad="F6"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="B3"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="B5"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="A4"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="A3"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="B4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="D5"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="C6"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="D6"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="C3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="B1"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="C1"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="C2"/>
+<connect gate="G$1" pin="P1.4" pad="D1"/>
+<connect gate="G$1" pin="P1.5" pad="D2"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="D4"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="D3"/>
+<connect gate="G$1" pin="P2.0/A8" pad="A8"/>
+<connect gate="G$1" pin="P2.1/A9" pad="C7"/>
+<connect gate="G$1" pin="P2.2/A10" pad="C8"/>
+<connect gate="G$1" pin="P2.3/A11" pad="E8"/>
+<connect gate="G$1" pin="P2.4/A12" pad="D9"/>
+<connect gate="G$1" pin="P2.5/A13" pad="C9"/>
+<connect gate="G$1" pin="P2.6/A14" pad="D8"/>
+<connect gate="G$1" pin="P2.7/A15" pad="E6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="J3"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="H3"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="J4"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="H4"/>
+<connect gate="G$1" pin="P3.4/T0" pad="F4"/>
+<connect gate="G$1" pin="P3.5/T1" pad="G4"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="J5"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="G5"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="A7"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="B7"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="A6"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="B6"/>
+<connect gate="G$1" pin="P4.4" pad="B9"/>
+<connect gate="G$1" pin="P4.5" pad="D7"/>
+<connect gate="G$1" pin="P4.6" pad="A9"/>
+<connect gate="G$1" pin="P4.7" pad="B8"/>
+<connect gate="G$1" pin="P5.0" pad="A2"/>
+<connect gate="G$1" pin="P5.1" pad="C4"/>
+<connect gate="G$1" pin="P5.2" pad="J8"/>
+<connect gate="G$1" pin="P5.3" pad="G6"/>
+<connect gate="G$1" pin="RST" pad="F9"/>
+<connect gate="G$1" pin="SCLK" pad="G8"/>
+<connect gate="G$1" pin="X1" pad="E2"/>
+<connect gate="G$1" pin="X2" pad="F1"/>
+<connect gate="P" pin="PVDD" pad="E3"/>
+<connect gate="P" pin="PVSS" pad="F2"/>
+<connect gate="P" pin="UVDD" pad="H1"/>
+<connect gate="P" pin="UVSS" pad="F3"/>
+<connect gate="P" pin="VDD@1" pad="A5"/>
+<connect gate="P" pin="VDD@2" pad="E1"/>
+<connect gate="P" pin="VDD@3" pad="E9"/>
+<connect gate="P" pin="VDD@4" pad="G3"/>
+<connect gate="P" pin="VDD@5" pad="J9"/>
+<connect gate="P" pin="VSS@1" pad="C5"/>
+<connect gate="P" pin="VSS@2" pad="E7"/>
+<connect gate="P" pin="VSS@3" pad="G1"/>
+<connect gate="P" pin="VSS@4" pad="H8"/>
+<connect gate="P" pin="VSS@5" pad="J2"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PC" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="31"/>
+<connect gate="G$1" pin="!PSEN" pad="29"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0" pad="1"/>
+<connect gate="G$1" pin="P1.1" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="10"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="11"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="17"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="JC" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="35"/>
+<connect gate="G$1" pin="!PSEN" pad="32"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0" pad="2"/>
+<connect gate="G$1" pin="P1.1" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="14"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="19"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51RE2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1455062" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3857" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-RLTUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095726" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1802" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51?*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="always"/>
+</gates>
+<devices>
+<device name="AC" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="QC" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="P" symbol="AT89S51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="31"/>
+<connect gate="P" pin="!PSEN" pad="29"/>
+<connect gate="P" pin="ALE/!PROG" pad="30"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="P0.0_AD0" pad="39"/>
+<connect gate="P" pin="P0.1_AD1" pad="38"/>
+<connect gate="P" pin="P0.2_AD2" pad="37"/>
+<connect gate="P" pin="P0.3_AD3" pad="36"/>
+<connect gate="P" pin="P0.4_AD4" pad="35"/>
+<connect gate="P" pin="P0.5_AD5" pad="34"/>
+<connect gate="P" pin="P0.6_AD6" pad="33"/>
+<connect gate="P" pin="P0.7_AD7" pad="32"/>
+<connect gate="P" pin="P1.0" pad="1"/>
+<connect gate="P" pin="P1.1" pad="2"/>
+<connect gate="P" pin="P1.2" pad="3"/>
+<connect gate="P" pin="P1.3" pad="4"/>
+<connect gate="P" pin="P1.4" pad="5"/>
+<connect gate="P" pin="P1.5_MOSI" pad="6"/>
+<connect gate="P" pin="P1.6_MISO" pad="7"/>
+<connect gate="P" pin="P1.7_SCK" pad="8"/>
+<connect gate="P" pin="P2.0_A8" pad="21"/>
+<connect gate="P" pin="P2.1_A9" pad="22"/>
+<connect gate="P" pin="P2.2_A10" pad="23"/>
+<connect gate="P" pin="P2.3_A11" pad="24"/>
+<connect gate="P" pin="P2.4_A12" pad="25"/>
+<connect gate="P" pin="P2.5_A13" pad="26"/>
+<connect gate="P" pin="P2.6_A14" pad="27"/>
+<connect gate="P" pin="P2.7_A15" pad="28"/>
+<connect gate="P" pin="P3.0/RXD" pad="10"/>
+<connect gate="P" pin="P3.1/TXD" pad="11"/>
+<connect gate="P" pin="P3.2/!INT0" pad="12"/>
+<connect gate="P" pin="P3.3/!INT1" pad="13"/>
+<connect gate="P" pin="P3.4/T0" pad="14"/>
+<connect gate="P" pin="P3.5/T1" pad="15"/>
+<connect gate="P" pin="P3.6/!WR" pad="16"/>
+<connect gate="P" pin="P3.7/!RD" pad="17"/>
+<connect gate="P" pin="RST" pad="9"/>
+<connect gate="P" pin="VCC" pad="40"/>
+<connect gate="P" pin="XTAL1" pad="19"/>
+<connect gate="P" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6577" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="S44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51*P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89S51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5_MOSI" pad="1"/>
+<connect gate="G$1" pin="P1.6_MISO" pad="2"/>
+<connect gate="G$1" pin="P1.7_SCK" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-?IM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02" x="0" y="0"/>
+</gates>
+<devices>
+<device name="TIS" package="SO28W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SIS" package="PLCC28">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="RAT" package="VQFP32">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="27"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="26"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="25"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="24"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="23"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="22"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="21"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="20"/>
+<connect gate="G$1" pin="P2.0" pad="19"/>
+<connect gate="G$1" pin="P2.1" pad="2"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="6"/>
+<connect gate="G$1" pin="P3.5/T1" pad="5"/>
+<connect gate="G$1" pin="P3.6" pad="4"/>
+<connect gate="G$1" pin="P3.7" pad="3"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="1"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="32"/>
+<connect gate="G$1" pin="RST" pad="17"/>
+<connect gate="G$1" pin="VAGND" pad="29"/>
+<connect gate="G$1" pin="VAREF" pad="28"/>
+<connect gate="G$1" pin="VAVCC" pad="31"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="G$1" pin="VSS" pad="16"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-TDSIM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02-SO24" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SO24W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="24"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="23"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="22"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="21"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="20"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="19"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="18"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="17"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="7"/>
+<connect gate="G$1" pin="P3.5/T1" pad="6"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="16"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91RM9200" prefix="IC">
+<description>Auto generated by &lt;b&gt;make-symbol-device-package(bsdl).ulp&lt;/b&gt;&lt;p&gt;
+Source: at91rm9200_bga.bsd</description>
+<gates>
+<gate name="G$1" symbol="AT91RM9200_BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LFBGA256_A_291X326">
+<connects>
+<connect gate="G$1" pin="A10_SDRAM" pad="N6"/>
+<connect gate="G$1" pin="A16_BA0" pad="U3"/>
+<connect gate="G$1" pin="A17_BA1" pad="T3"/>
+<connect gate="G$1" pin="A1_DQM2" pad="M4"/>
+<connect gate="G$1" pin="A_10" pad="M5"/>
+<connect gate="G$1" pin="A_11" pad="P5"/>
+<connect gate="G$1" pin="A_12" pad="P3"/>
+<connect gate="G$1" pin="A_13" pad="P2"/>
+<connect gate="G$1" pin="A_14" pad="N5"/>
+<connect gate="G$1" pin="A_15" pad="T1"/>
+<connect gate="G$1" pin="A_18" pad="R3"/>
+<connect gate="G$1" pin="A_19" pad="U4"/>
+<connect gate="G$1" pin="A_2" pad="M6"/>
+<connect gate="G$1" pin="A_20" pad="R4"/>
+<connect gate="G$1" pin="A_21" pad="N8"/>
+<connect gate="G$1" pin="A_22" pad="P6"/>
+<connect gate="G$1" pin="A_3" pad="M3"/>
+<connect gate="G$1" pin="A_4" pad="N4"/>
+<connect gate="G$1" pin="A_5" pad="N2"/>
+<connect gate="G$1" pin="A_6" pad="L4"/>
+<connect gate="G$1" pin="A_7" pad="P1"/>
+<connect gate="G$1" pin="A_8" pad="N7"/>
+<connect gate="G$1" pin="A_9" pad="N3"/>
+<connect gate="G$1" pin="CAS" pad="U8"/>
+<connect gate="G$1" pin="DM" pad="K2"/>
+<connect gate="G$1" pin="DP" pad="K5"/>
+<connect gate="G$1" pin="D_0" pad="R9"/>
+<connect gate="G$1" pin="D_1" pad="P10"/>
+<connect gate="G$1" pin="D_10" pad="P12"/>
+<connect gate="G$1" pin="D_11" pad="U12"/>
+<connect gate="G$1" pin="D_12" pad="T12"/>
+<connect gate="G$1" pin="D_13" pad="R12"/>
+<connect gate="G$1" pin="D_14" pad="U13"/>
+<connect gate="G$1" pin="D_15" pad="P13"/>
+<connect gate="G$1" pin="D_2" pad="N11"/>
+<connect gate="G$1" pin="D_3" pad="U9"/>
+<connect gate="G$1" pin="D_4" pad="M11"/>
+<connect gate="G$1" pin="D_5" pad="P11"/>
+<connect gate="G$1" pin="D_6" pad="U10"/>
+<connect gate="G$1" pin="D_7" pad="U11"/>
+<connect gate="G$1" pin="D_8" pad="R11"/>
+<connect gate="G$1" pin="D_9" pad="T11"/>
+<connect gate="G$1" pin="HDMA" pad="K3"/>
+<connect gate="G$1" pin="HDMB" pad="L3"/>
+<connect gate="G$1" pin="HDPA" pad="K1"/>
+<connect gate="G$1" pin="HDPB" pad="L2"/>
+<connect gate="G$1" pin="ICETCK" pad="E5"/>
+<connect gate="G$1" pin="ICETDI" pad="A1"/>
+<connect gate="G$1" pin="ICETDO" pad="B1"/>
+<connect gate="G$1" pin="ICETMS" pad="C1"/>
+<connect gate="G$1" pin="JTAGSEL" pad="A2"/>
+<connect gate="G$1" pin="MIX33VDD@1" pad="P16"/>
+<connect gate="G$1" pin="MIX33VDD@10" pad="D5"/>
+<connect gate="G$1" pin="MIX33VDD@11" pad="D2"/>
+<connect gate="G$1" pin="MIX33VDD@12" pad="D3"/>
+<connect gate="G$1" pin="MIX33VDD@13" pad="H5"/>
+<connect gate="G$1" pin="MIX33VDD@14" pad="K4"/>
+<connect gate="G$1" pin="MIX33VDD@15" pad="L6"/>
+<connect gate="G$1" pin="MIX33VDD@16" pad="M1"/>
+<connect gate="G$1" pin="MIX33VDD@17" pad="P4"/>
+<connect gate="G$1" pin="MIX33VDD@18" pad="R6"/>
+<connect gate="G$1" pin="MIX33VDD@19" pad="T5"/>
+<connect gate="G$1" pin="MIX33VDD@2" pad="R17"/>
+<connect gate="G$1" pin="MIX33VDD@20" pad="R10"/>
+<connect gate="G$1" pin="MIX33VDD@21" pad="R14"/>
+<connect gate="G$1" pin="MIX33VDD@3" pad="K16"/>
+<connect gate="G$1" pin="MIX33VDD@4" pad="H14"/>
+<connect gate="G$1" pin="MIX33VDD@5" pad="A16"/>
+<connect gate="G$1" pin="MIX33VDD@6" pad="A11"/>
+<connect gate="G$1" pin="MIX33VDD@7" pad="B11"/>
+<connect gate="G$1" pin="MIX33VDD@8" pad="D8"/>
+<connect gate="G$1" pin="MIX33VDD@9" pad="A7"/>
+<connect gate="G$1" pin="MIX33VSS@1" pad="M12"/>
+<connect gate="G$1" pin="MIX33VSS@10" pad="E6"/>
+<connect gate="G$1" pin="MIX33VSS@11" pad="D4"/>
+<connect gate="G$1" pin="MIX33VSS@12" pad="E3"/>
+<connect gate="G$1" pin="MIX33VSS@13" pad="G3"/>
+<connect gate="G$1" pin="MIX33VSS@14" pad="L1"/>
+<connect gate="G$1" pin="MIX33VSS@15" pad="L5"/>
+<connect gate="G$1" pin="MIX33VSS@16" pad="M2"/>
+<connect gate="G$1" pin="MIX33VSS@17" pad="R1"/>
+<connect gate="G$1" pin="MIX33VSS@18" pad="M7"/>
+<connect gate="G$1" pin="MIX33VSS@19" pad="U5"/>
+<connect gate="G$1" pin="MIX33VSS@2" pad="P17"/>
+<connect gate="G$1" pin="MIX33VSS@20" pad="T9"/>
+<connect gate="G$1" pin="MIX33VSS@21" pad="T13"/>
+<connect gate="G$1" pin="MIX33VSS@3" pad="J12"/>
+<connect gate="G$1" pin="MIX33VSS@4" pad="H16"/>
+<connect gate="G$1" pin="MIX33VSS@5" pad="C15"/>
+<connect gate="G$1" pin="MIX33VSS@6" pad="C11"/>
+<connect gate="G$1" pin="MIX33VSS@7" pad="D11"/>
+<connect gate="G$1" pin="MIX33VSS@8" pad="B7"/>
+<connect gate="G$1" pin="MIX33VSS@9" pad="E8"/>
+<connect gate="G$1" pin="NBS3" pad="R8"/>
+<connect gate="G$1" pin="NCS0_BFCS" pad="U6"/>
+<connect gate="G$1" pin="NCS1_SDCS" pad="M9"/>
+<connect gate="G$1" pin="NCS2" pad="T6"/>
+<connect gate="G$1" pin="NCS3" pad="R7"/>
+<connect gate="G$1" pin="NLBA0_DQM0" pad="N1"/>
+<connect gate="G$1" pin="NRDNOE" pad="N9"/>
+<connect gate="G$1" pin="NRST" pad="E1"/>
+<connect gate="G$1" pin="NRW0NWE" pad="P8"/>
+<connect gate="G$1" pin="NRW1_NUB_DQM1" pad="T7"/>
+<connect gate="G$1" pin="NTRST" pad="E2"/>
+<connect gate="G$1" pin="OSC32K_XIN" pad="G17"/>
+<connect gate="G$1" pin="OSC32K_XOUT" pad="H17"/>
+<connect gate="G$1" pin="OSC9M_XIN" pad="J17"/>
+<connect gate="G$1" pin="OSC9M_XOUT" pad="K17"/>
+<connect gate="G$1" pin="PA0" pad="G13"/>
+<connect gate="G$1" pin="PA1" pad="G14"/>
+<connect gate="G$1" pin="PA10" pad="D15"/>
+<connect gate="G$1" pin="PA11" pad="B15"/>
+<connect gate="G$1" pin="PA12" pad="B16"/>
+<connect gate="G$1" pin="PA13" pad="A17"/>
+<connect gate="G$1" pin="PA14" pad="A15"/>
+<connect gate="G$1" pin="PA15" pad="B14"/>
+<connect gate="G$1" pin="PA16" pad="D14"/>
+<connect gate="G$1" pin="PA17" pad="B13"/>
+<connect gate="G$1" pin="PA18" pad="C13"/>
+<connect gate="G$1" pin="PA19" pad="A13"/>
+<connect gate="G$1" pin="PA2" pad="G15"/>
+<connect gate="G$1" pin="PA20" pad="C12"/>
+<connect gate="G$1" pin="PA21" pad="D13"/>
+<connect gate="G$1" pin="PA22" pad="D12"/>
+<connect gate="G$1" pin="PA23" pad="A12"/>
+<connect gate="G$1" pin="PA24" pad="B12"/>
+<connect gate="G$1" pin="PA25" pad="E13"/>
+<connect gate="G$1" pin="PA26" pad="E12"/>
+<connect gate="G$1" pin="PA27" pad="G12"/>
+<connect gate="G$1" pin="PA28" pad="F12"/>
+<connect gate="G$1" pin="PA29" pad="E11"/>
+<connect gate="G$1" pin="PA3" pad="G16"/>
+<connect gate="G$1" pin="PA30" pad="F11"/>
+<connect gate="G$1" pin="PA31" pad="A10"/>
+<connect gate="G$1" pin="PA4" pad="F13"/>
+<connect gate="G$1" pin="PA5" pad="F16"/>
+<connect gate="G$1" pin="PA6" pad="E15"/>
+<connect gate="G$1" pin="PA7" pad="B17"/>
+<connect gate="G$1" pin="PA8" pad="C16"/>
+<connect gate="G$1" pin="PA9" pad="E14"/>
+<connect gate="G$1" pin="PB0" pad="B10"/>
+<connect gate="G$1" pin="PB1" pad="C10"/>
+<connect gate="G$1" pin="PB10" pad="B8"/>
+<connect gate="G$1" pin="PB11" pad="F9"/>
+<connect gate="G$1" pin="PB12" pad="C8"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="D7"/>
+<connect gate="G$1" pin="PB15" pad="E7"/>
+<connect gate="G$1" pin="PB16" pad="F7"/>
+<connect gate="G$1" pin="PB17" pad="A4"/>
+<connect gate="G$1" pin="PB18" pad="B3"/>
+<connect gate="G$1" pin="PB19" pad="C5"/>
+<connect gate="G$1" pin="PB2" pad="D10"/>
+<connect gate="G$1" pin="PB20" pad="A3"/>
+<connect gate="G$1" pin="PB21" pad="B4"/>
+<connect gate="G$1" pin="PB22" pad="C4"/>
+<connect gate="G$1" pin="PB23" pad="F3"/>
+<connect gate="G$1" pin="PB24" pad="F5"/>
+<connect gate="G$1" pin="PB25" pad="F4"/>
+<connect gate="G$1" pin="PB26" pad="G4"/>
+<connect gate="G$1" pin="PB27" pad="G6"/>
+<connect gate="G$1" pin="PB28" pad="J5"/>
+<connect gate="G$1" pin="PB29" pad="J6"/>
+<connect gate="G$1" pin="PB3" pad="E10"/>
+<connect gate="G$1" pin="PB4" pad="A9"/>
+<connect gate="G$1" pin="PB5" pad="B9"/>
+<connect gate="G$1" pin="PB6" pad="C9"/>
+<connect gate="G$1" pin="PB7" pad="E9"/>
+<connect gate="G$1" pin="PB8" pad="D9"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PC0" pad="M15"/>
+<connect gate="G$1" pin="PC1" pad="M14"/>
+<connect gate="G$1" pin="PC10" pad="L12"/>
+<connect gate="G$1" pin="PC11" pad="N16"/>
+<connect gate="G$1" pin="PC12" pad="N17"/>
+<connect gate="G$1" pin="PC13" pad="M13"/>
+<connect gate="G$1" pin="PC14" pad="M17"/>
+<connect gate="G$1" pin="PC15" pad="L13"/>
+<connect gate="G$1" pin="PC16" pad="U14"/>
+<connect gate="G$1" pin="PC17" pad="R13"/>
+<connect gate="G$1" pin="PC18" pad="U15"/>
+<connect gate="G$1" pin="PC19" pad="T14"/>
+<connect gate="G$1" pin="PC2" pad="L14"/>
+<connect gate="G$1" pin="PC20" pad="U16"/>
+<connect gate="G$1" pin="PC21" pad="T15"/>
+<connect gate="G$1" pin="PC22" pad="U17"/>
+<connect gate="G$1" pin="PC23" pad="T16"/>
+<connect gate="G$1" pin="PC24" pad="R15"/>
+<connect gate="G$1" pin="PC25" pad="T17"/>
+<connect gate="G$1" pin="PC26" pad="P14"/>
+<connect gate="G$1" pin="PC27" pad="P15"/>
+<connect gate="G$1" pin="PC28" pad="N13"/>
+<connect gate="G$1" pin="PC29" pad="R16"/>
+<connect gate="G$1" pin="PC3" pad="L15"/>
+<connect gate="G$1" pin="PC30" pad="N15"/>
+<connect gate="G$1" pin="PC31" pad="N14"/>
+<connect gate="G$1" pin="PC4" pad="K14"/>
+<connect gate="G$1" pin="PC5" pad="K13"/>
+<connect gate="G$1" pin="PC6" pad="K15"/>
+<connect gate="G$1" pin="PC7" pad="T4"/>
+<connect gate="G$1" pin="PC8" pad="R5"/>
+<connect gate="G$1" pin="PC9" pad="P7"/>
+<connect gate="G$1" pin="PD0" pad="E17"/>
+<connect gate="G$1" pin="PD1" pad="F15"/>
+<connect gate="G$1" pin="PD10" pad="C6"/>
+<connect gate="G$1" pin="PD11" pad="A5"/>
+<connect gate="G$1" pin="PD12" pad="B5"/>
+<connect gate="G$1" pin="PD13" pad="B2"/>
+<connect gate="G$1" pin="PD14" pad="C3"/>
+<connect gate="G$1" pin="PD15" pad="C2"/>
+<connect gate="G$1" pin="PD16" pad="F1"/>
+<connect gate="G$1" pin="PD17" pad="G2"/>
+<connect gate="G$1" pin="PD18" pad="G5"/>
+<connect gate="G$1" pin="PD19" pad="G1"/>
+<connect gate="G$1" pin="PD2" pad="F14"/>
+<connect gate="G$1" pin="PD20" pad="H2"/>
+<connect gate="G$1" pin="PD21" pad="H4"/>
+<connect gate="G$1" pin="PD22" pad="H3"/>
+<connect gate="G$1" pin="PD23" pad="H1"/>
+<connect gate="G$1" pin="PD24" pad="J3"/>
+<connect gate="G$1" pin="PD25" pad="J1"/>
+<connect gate="G$1" pin="PD26" pad="J4"/>
+<connect gate="G$1" pin="PD27" pad="J2"/>
+<connect gate="G$1" pin="PD3" pad="E16"/>
+<connect gate="G$1" pin="PD4" pad="D17"/>
+<connect gate="G$1" pin="PD5" pad="C17"/>
+<connect gate="G$1" pin="PD6" pad="D16"/>
+<connect gate="G$1" pin="PD7" pad="D6"/>
+<connect gate="G$1" pin="PD8" pad="A6"/>
+<connect gate="G$1" pin="PD9" pad="B6"/>
+<connect gate="G$1" pin="PLL_A_RC" pad="L17"/>
+<connect gate="G$1" pin="PLL_B_RC" pad="F17"/>
+<connect gate="G$1" pin="RAS" pad="N10"/>
+<connect gate="G$1" pin="SDRAMCKE" pad="P9"/>
+<connect gate="G$1" pin="SDRAMCLK" pad="U7"/>
+<connect gate="G$1" pin="TST0" pad="E4"/>
+<connect gate="G$1" pin="TST1" pad="D1"/>
+<connect gate="G$1" pin="VDDI@1" pad="L16"/>
+<connect gate="G$1" pin="VDDI@2" pad="C14"/>
+<connect gate="G$1" pin="VDDI@3" pad="F6"/>
+<connect gate="G$1" pin="VDDI@4" pad="U1"/>
+<connect gate="G$1" pin="VDDI@5" pad="T2"/>
+<connect gate="G$1" pin="VDDI@6" pad="T10"/>
+<connect gate="G$1" pin="VDDI@7" pad="J15"/>
+<connect gate="G$1" pin="VDDI@8" pad="J14"/>
+<connect gate="G$1" pin="VDDI@9" pad="H13"/>
+<connect gate="G$1" pin="VSSI@1" pad="M16"/>
+<connect gate="G$1" pin="VSSI@2" pad="A14"/>
+<connect gate="G$1" pin="VSSI@3" pad="F2"/>
+<connect gate="G$1" pin="VSSI@4" pad="U2"/>
+<connect gate="G$1" pin="VSSI@5" pad="R2"/>
+<connect gate="G$1" pin="VSSI@6" pad="N12"/>
+<connect gate="G$1" pin="VSSI@7" pad="J16"/>
+<connect gate="G$1" pin="VSSI@8" pad="J13"/>
+<connect gate="G$1" pin="VSSI@9" pad="H15"/>
+<connect gate="G$1" pin="WE" pad="T8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91RM9200-EK" constant="no"/>
+<attribute name="OC_FARNELL" value="1629536" constant="no"/>
+<attribute name="OC_NEWARK" value="02P6234" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATF16V8B" prefix="IC">
+<description>&lt;b&gt;High perfomance CMOS (electrically erasable) programmable logic device (PLD)&lt;/b&gt;&lt;p&gt;
+ABLE-Atmel-ABEL - P18V8R, P16V8C, P16V8AS, P17V8&lt;br&gt;
+COPL Atmel-WinCUPL - G16V8MS, G16V8MA, G16V8AS, G16V8&lt;br&gt;
+LOG/IC - GAL16V8_R, GAL16V8_G7, GAL16V8_C), GAL16V8&lt;br&gt;
+Tango-PLD - G16V8R, G16V8C, G16V8AS, G16V8&lt;br&gt;
+
+
+Source: http://www.atmel.com/dyn/resources/prod_documents/DOC0364.PDF</description>
+<gates>
+<gate name="G$1" symbol="ATF16V8B" x="0" y="0"/>
+</gates>
+<devices>
+<device name="X" package="TSSOP20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551767" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6253" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P3" package="DIL20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551768" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6254" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="-MI" package="MLF32">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-AI" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171371" constant="no"/>
+<attribute name="OC_NEWARK" value="73M8863" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 4-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="8"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="14"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="15"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="16"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="17"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="18"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="19"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="9"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="10"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="1"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="2"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="3"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="4"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="5"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="6"/>
+<connect gate="G$1" pin="PD5(T1)" pad="11"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="13"/>
+<connect gate="G$1" pin="VCC@1" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455107" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6885" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171274" constant="no"/>
+<attribute name="OC_NEWARK" value="69K6677" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1661729" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1794" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171355" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6899" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171118" constant="no"/>
+<attribute name="OC_NEWARK" value="95K7364" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA169PV-8AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1617046" constant="no"/>
+<attribute name="OC_NEWARK" value="03P4011" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA1284" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+16 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA1284" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0/PCINT0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1/PCINT1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2/PCINT2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3/PCINT3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4/PCINT4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5/PCINT5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6/PCINT6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7/PCINT7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP/OC2B/PCINT30)PD6" pad="15"/>
+<connect gate="G$1" pin="(MISO/OC3A/PCINT14)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI/PCINT13/ICP3)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A/PCINT29)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B/XCK1/PCINT28)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2A/PCINT31)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD0/T3/PCINT24)PD0" pad="9"/>
+<connect gate="G$1" pin="(RXD1/INT0/PCINT26)PD2" pad="11"/>
+<connect gate="G$1" pin="(SCK/OC3B/PCINT15)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK/PCINT18)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI/PCINT21)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO/PCINT20)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS/PCINT19)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1/PCINT22)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2/PCINT23)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD0/PCINT25)PD1" pad="10"/>
+<connect gate="G$1" pin="(TXD1/INT1/PCINT27)PD3" pad="12"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL/PCINT16)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA/PCINT17)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171410" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6904" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="16"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="35"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="33"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="32"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562625" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6261" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-7" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="14"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="31"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="30"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="29"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171401" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6905" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1528437" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6908" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="GND1" pad="12"/>
+<connect gate="G$1" pin="GND2" pad="24"/>
+<connect gate="G$1" pin="GND@1" pad="34"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="25"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="11"/>
+<connect gate="G$1" pin="VCC1" pad="23"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562626" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6263" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/OC0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/INT2)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171444" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6909" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C513*-" prefix="IC">
+<description>&lt;b&gt;8-bit Flash Microcontroller with Full Speed USB Device&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4136.pdf&lt;p&gt;
+&lt;b&gt;&lt;i&gt;Data sheet mistake:&lt;/i&gt; &lt;/b&gt;define Packge type pin description for MLF48 but Order Number for QFN32 !?</description>
+<gates>
+<gate name="G$1" symbol="AT89C5131" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="26"/>
+<connect gate="G$1" pin="!PSEN" pad="28"/>
+<connect gate="G$1" pin="!RST" pad="43"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="AVDD" pad="17"/>
+<connect gate="G$1" pin="AVSS" pad="19"/>
+<connect gate="G$1" pin="D+" pad="23"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="FREV" pad="24"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="52"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="45"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="44"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="42"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="47"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="48"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="49"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="50"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="51"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="4"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="5"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="6"/>
+<connect gate="G$1" pin="P2.0_A8" pad="1"/>
+<connect gate="G$1" pin="P2.1_A9" pad="2"/>
+<connect gate="G$1" pin="P2.2_A10" pad="3"/>
+<connect gate="G$1" pin="P2.3_A11" pad="9"/>
+<connect gate="G$1" pin="P2.4_A12" pad="10"/>
+<connect gate="G$1" pin="P2.5_A13" pad="11"/>
+<connect gate="G$1" pin="P2.6_A14" pad="14"/>
+<connect gate="G$1" pin="P2.7_A15" pad="15"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="29"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="30"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="31"/>
+<connect gate="G$1" pin="P3.4/T0" pad="32"/>
+<connect gate="G$1" pin="P3.5/T1" pad="33"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="7"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="8"/>
+<connect gate="G$1" pin="PLLF" pad="21"/>
+<connect gate="G$1" pin="VDD" pad="16"/>
+<connect gate="G$1" pin="VSS" pad="41"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C5131A-S3SUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095721" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6570" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="VQFP64">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="24"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="!RST" pad="44"/>
+<connect gate="G$1" pin="ALE" pad="25"/>
+<connect gate="G$1" pin="AVDD" pad="10"/>
+<connect gate="G$1" pin="AVSS" pad="12"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="20"/>
+<connect gate="G$1" pin="FREV" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="55"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="46"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="45"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="43"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="50"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="51"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="52"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="53"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="54"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="59"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="60"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="61"/>
+<connect gate="G$1" pin="P2.0_A8" pad="56"/>
+<connect gate="G$1" pin="P2.1_A9" pad="57"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="2"/>
+<connect gate="G$1" pin="P2.4_A12" pad="3"/>
+<connect gate="G$1" pin="P2.5_A13" pad="4"/>
+<connect gate="G$1" pin="P2.6_A14" pad="7"/>
+<connect gate="G$1" pin="P2.7_A15" pad="8"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="27"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="28"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="29"/>
+<connect gate="G$1" pin="P3.4/T0" pad="30"/>
+<connect gate="G$1" pin="P3.5/T1" pad="31"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="62"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="63"/>
+<connect gate="G$1" pin="PLLF" pad="19"/>
+<connect gate="G$1" pin="VDD" pad="9"/>
+<connect gate="G$1" pin="VSS" pad="42"/>
+<connect gate="G$1" pin="XTAL1" pad="6"/>
+<connect gate="G$1" pin="XTAL2" pad="5"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C5132" prefix="IC">
+<description>&lt;b&gt;USB Microcontroller with 64K Bytes Flash Memory&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4173.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C5132" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="DSEL" pad="45"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0_A8" pad="64"/>
+<connect gate="G$1" pin="P2.1_A9" pad="63"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="57"/>
+<connect gate="G$1" pin="P2.4_A12" pad="56"/>
+<connect gate="G$1" pin="P2.5_A13" pad="55"/>
+<connect gate="G$1" pin="P2.6_A14" pad="54"/>
+<connect gate="G$1" pin="P2.7_A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="PVDD" pad="12"/>
+<connect gate="G$1" pin="PVSS" pad="14"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="UVDD" pad="19"/>
+<connect gate="G$1" pin="UVSS" pad="20"/>
+<connect gate="G$1" pin="VDD" pad="11"/>
+<connect gate="G$1" pin="VDD@1" pad="23"/>
+<connect gate="G$1" pin="VDD@2" pad="41"/>
+<connect gate="G$1" pin="VDD@3" pad="51"/>
+<connect gate="G$1" pin="VDD@4" pad="71"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="VSS@1" pad="24"/>
+<connect gate="G$1" pin="VSS@2" pad="42"/>
+<connect gate="G$1" pin="VSS@3" pad="52"/>
+<connect gate="G$1" pin="VSS@4" pad="72"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="DEVELOP" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="DSEL" pad="58"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0_A8" pad="78"/>
+<connect gate="G$1" pin="P2.1_A9" pad="77"/>
+<connect gate="G$1" pin="P2.2_A10" pad="71"/>
+<connect gate="G$1" pin="P2.3_A11" pad="70"/>
+<connect gate="G$1" pin="P2.4_A12" pad="69"/>
+<connect gate="G$1" pin="P2.5_A13" pad="68"/>
+<connect gate="G$1" pin="P2.6_A14" pad="67"/>
+<connect gate="G$1" pin="P2.7_A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="PVDD" pad="23"/>
+<connect gate="G$1" pin="PVSS" pad="25"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="UVDD" pad="31"/>
+<connect gate="G$1" pin="UVSS" pad="32"/>
+<connect gate="G$1" pin="VDD" pad="1"/>
+<connect gate="G$1" pin="VDD@1" pad="22"/>
+<connect gate="G$1" pin="VDD@2" pad="35"/>
+<connect gate="G$1" pin="VDD@3" pad="54"/>
+<connect gate="G$1" pin="VDD@4" pad="64"/>
+<connect gate="G$1" pin="VSS" pad="2"/>
+<connect gate="G$1" pin="VSS@1" pad="26"/>
+<connect gate="G$1" pin="VSS@2" pad="36"/>
+<connect gate="G$1" pin="VSS@3" pad="55"/>
+<connect gate="G$1" pin="VSS@4" pad="65"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-MI" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O_MI" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A_M" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455097" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535_M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*-M" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455123" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3748" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="QFN44ML8X8">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748529" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5637" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644E" x="0" y="0"/>
+</gates>
+<devices>
+<device name="M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="EXP" pad="TH"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644P-20MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748528" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5636" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-AU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LQFP100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="3"/>
+<connect gate="G$1" pin="AD5" pad="4"/>
+<connect gate="G$1" pin="AD6" pad="5"/>
+<connect gate="G$1" pin="AD7" pad="6"/>
+<connect gate="G$1" pin="ADVREF" pad="1"/>
+<connect gate="G$1" pin="DDM" pad="93"/>
+<connect gate="G$1" pin="DDP" pad="94"/>
+<connect gate="G$1" pin="ERASE" pad="92"/>
+<connect gate="G$1" pin="GND@1" pad="2"/>
+<connect gate="G$1" pin="GND@2" pad="16"/>
+<connect gate="G$1" pin="GND@3" pad="32"/>
+<connect gate="G$1" pin="GND@4" pad="52"/>
+<connect gate="G$1" pin="GND@5" pad="68"/>
+<connect gate="G$1" pin="GND@6" pad="83"/>
+<connect gate="G$1" pin="GND@7" pad="96"/>
+<connect gate="G$1" pin="JTAGSEL" pad="77"/>
+<connect gate="G$1" pin="NRST" pad="57"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="81"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="82"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="18"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="19"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="20"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="21"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="22"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="23"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="24"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="25"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="26"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="86"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="47"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="49"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="50"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="55"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="56"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="59"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="60"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="73"/>
+<connect gate="G$1" pin="PA28" pad="74"/>
+<connect gate="G$1" pin="PA29" pad="75"/>
+<connect gate="G$1" pin="PA3" pad="85"/>
+<connect gate="G$1" pin="PA30" pad="80"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="88"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="89"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="90"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="91"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="13"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="14"/>
+<connect gate="G$1" pin="PB0" pad="40"/>
+<connect gate="G$1" pin="PB1" pad="41"/>
+<connect gate="G$1" pin="PB10" pad="44"/>
+<connect gate="G$1" pin="PB11" pad="45"/>
+<connect gate="G$1" pin="PB12" pad="39"/>
+<connect gate="G$1" pin="PB13" pad="30"/>
+<connect gate="G$1" pin="PB14" pad="29"/>
+<connect gate="G$1" pin="PB15" pad="35"/>
+<connect gate="G$1" pin="PB16" pad="53"/>
+<connect gate="G$1" pin="PB17" pad="36"/>
+<connect gate="G$1" pin="PB18" pad="63"/>
+<connect gate="G$1" pin="PB19" pad="64"/>
+<connect gate="G$1" pin="PB2" pad="42"/>
+<connect gate="G$1" pin="PB20" pad="65"/>
+<connect gate="G$1" pin="PB21" pad="66"/>
+<connect gate="G$1" pin="PB22" pad="67"/>
+<connect gate="G$1" pin="PB23" pad="69"/>
+<connect gate="G$1" pin="PB24" pad="70"/>
+<connect gate="G$1" pin="PB25" pad="71"/>
+<connect gate="G$1" pin="PB26" pad="72"/>
+<connect gate="G$1" pin="PB27/AD0" pad="9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="10"/>
+<connect gate="G$1" pin="PB29/AD2" pad="11"/>
+<connect gate="G$1" pin="PB3" pad="43"/>
+<connect gate="G$1" pin="PB30/AD3" pad="12"/>
+<connect gate="G$1" pin="PB4" pad="54"/>
+<connect gate="G$1" pin="PB5" pad="34"/>
+<connect gate="G$1" pin="PB6" pad="31"/>
+<connect gate="G$1" pin="PB7" pad="38"/>
+<connect gate="G$1" pin="PB8" pad="28"/>
+<connect gate="G$1" pin="PB9" pad="27"/>
+<connect gate="G$1" pin="PLLRC" pad="99"/>
+<connect gate="G$1" pin="TCK" pad="79"/>
+<connect gate="G$1" pin="TDI" pad="51"/>
+<connect gate="G$1" pin="TDO" pad="76"/>
+<connect gate="G$1" pin="TMS" pad="78"/>
+<connect gate="G$1" pin="TST" pad="58"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="15"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="37"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="62"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="87"/>
+<connect gate="G$1" pin="VDDFLASH" pad="95"/>
+<connect gate="G$1" pin="VDDIN@1" pad="8"/>
+<connect gate="G$1" pin="VDDIO@1" pad="17"/>
+<connect gate="G$1" pin="VDDIO@2" pad="33"/>
+<connect gate="G$1" pin="VDDIO@3" pad="48"/>
+<connect gate="G$1" pin="VDDIO@4" pad="61"/>
+<connect gate="G$1" pin="VDDIO@5" pad="84"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="7"/>
+<connect gate="G$1" pin="VDDPLL" pad="100"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="97"/>
+<connect gate="G$1" pin="XOUT" pad="98"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X128B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288326" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5682" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X256B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288327" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5683" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X512-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288328" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5090" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-CU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X-BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TFBGA100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="K9"/>
+<connect gate="G$1" pin="AD5" pad="K8"/>
+<connect gate="G$1" pin="AD6" pad="K7"/>
+<connect gate="G$1" pin="AD7" pad="K6"/>
+<connect gate="G$1" pin="ADVREF" pad="K10"/>
+<connect gate="G$1" pin="DDM" pad="K4"/>
+<connect gate="G$1" pin="DDP" pad="K3"/>
+<connect gate="G$1" pin="ERASE" pad="F7"/>
+<connect gate="G$1" pin="GND@1" pad="E6"/>
+<connect gate="G$1" pin="GND@2" pad="E10"/>
+<connect gate="G$1" pin="GND@3" pad="F9"/>
+<connect gate="G$1" pin="GND@4" pad="G8"/>
+<connect gate="G$1" pin="GND@5" pad="J6"/>
+<connect gate="G$1" pin="GND@6" pad="J9"/>
+<connect gate="G$1" pin="GND@7" pad="K5"/>
+<connect gate="G$1" pin="JTAGSEL" pad="H3"/>
+<connect gate="G$1" pin="NRST" pad="D3"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="J3"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="J4"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="D7"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="D10"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="C9"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="C8"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="B8"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="C10"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="B9"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="B10"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="A9"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="B2"/>
+<connect gate="G$1" pin="PA2" pad="G5"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="A3"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="A2"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="A1"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="D1"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="D2"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="E1"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="E2"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="G3"/>
+<connect gate="G$1" pin="PA28" pad="H2"/>
+<connect gate="G$1" pin="PA29" pad="J1"/>
+<connect gate="G$1" pin="PA3" pad="H4"/>
+<connect gate="G$1" pin="PA30" pad="J2"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="H5"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="G6"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="F6"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="H6"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="H8"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="H7"/>
+<connect gate="G$1" pin="PB0" pad="C5"/>
+<connect gate="G$1" pin="PB1" pad="A4"/>
+<connect gate="G$1" pin="PB10" pad="C3"/>
+<connect gate="G$1" pin="PB11" pad="B3"/>
+<connect gate="G$1" pin="PB12" pad="B5"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="B7"/>
+<connect gate="G$1" pin="PB15" pad="B6"/>
+<connect gate="G$1" pin="PB16" pad="C1"/>
+<connect gate="G$1" pin="PB17" pad="C6"/>
+<connect gate="G$1" pin="PB18" pad="E3"/>
+<connect gate="G$1" pin="PB19" pad="D5"/>
+<connect gate="G$1" pin="PB2" pad="B4"/>
+<connect gate="G$1" pin="PB20" pad="E4"/>
+<connect gate="G$1" pin="PB21" pad="F1"/>
+<connect gate="G$1" pin="PB22" pad="G1"/>
+<connect gate="G$1" pin="PB23" pad="F2"/>
+<connect gate="G$1" pin="PB24" pad="G2"/>
+<connect gate="G$1" pin="PB25" pad="F3"/>
+<connect gate="G$1" pin="PB26" pad="F4"/>
+<connect gate="G$1" pin="PB27/AD0" pad="D9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="E8"/>
+<connect gate="G$1" pin="PB29/AD2" pad="H9"/>
+<connect gate="G$1" pin="PB3" pad="C4"/>
+<connect gate="G$1" pin="PB30/AD3" pad="G9"/>
+<connect gate="G$1" pin="PB4" pad="C2"/>
+<connect gate="G$1" pin="PB5" pad="A6"/>
+<connect gate="G$1" pin="PB6" pad="D6"/>
+<connect gate="G$1" pin="PB7" pad="A5"/>
+<connect gate="G$1" pin="PB8" pad="A7"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PLLRC" pad="H10"/>
+<connect gate="G$1" pin="TCK" pad="F5"/>
+<connect gate="G$1" pin="TDI" pad="B1"/>
+<connect gate="G$1" pin="TDO" pad="G4"/>
+<connect gate="G$1" pin="TMS" pad="E5"/>
+<connect gate="G$1" pin="TST" pad="D4"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="F8"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="G7"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="H1"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="K1"/>
+<connect gate="G$1" pin="VDDCORE@5" pad="K2"/>
+<connect gate="G$1" pin="VDDFLASH" pad="J5"/>
+<connect gate="G$1" pin="VDDIN@1" pad="F10"/>
+<connect gate="G$1" pin="VDDIO@1" pad="A10"/>
+<connect gate="G$1" pin="VDDIO@2" pad="D8"/>
+<connect gate="G$1" pin="VDDIO@3" pad="E7"/>
+<connect gate="G$1" pin="VDDIO@4" pad="E9"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="G10"/>
+<connect gate="G$1" pin="VDDPLL" pad="J10"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="J7"/>
+<connect gate="G$1" pin="XOUT" pad="J8"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C46A-10?Q-2.7" prefix="IC">
+<description>&lt;b&gt;Three-wire Automotive Temperature Serial EEPROM&lt;/b&gt; 1K (64 x 16)&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc5089.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT93C46A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46DN-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1455086" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3879" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSSOP8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PU" package="DIL08">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171550" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6521" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171576" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6523" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SSU" package="8S1">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455133" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3771" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455135" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3773" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171568" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6522" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171584" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6524" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13*" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+<gate name="P" symbol="GND" x="35.56" y="0" addlevel="request"/>
+</gates>
+<devices>
+<device name="MM0" package="10M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="6"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="7"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="9"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="4"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="P" pin="GND" pad="11"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MU" package="20M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="11"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="12"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="14"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="5"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="P" pin="GND" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715517" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0299" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455134" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3772" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T7024" prefix="IC">
+<description>&lt;b&gt;Bluetooth/ISM 2.4-GHz Front-End IC&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4533.pdf</description>
+<gates>
+<gate name="G$1" symbol="T7024" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF20-5X5-TH">
+<connects>
+<connect gate="G$1" pin="EXP" pad="EXP"/>
+<connect gate="G$1" pin="GND@1" pad="6"/>
+<connect gate="G$1" pin="GND@2" pad="8"/>
+<connect gate="G$1" pin="GND@3" pad="10"/>
+<connect gate="G$1" pin="GND@4" pad="14"/>
+<connect gate="G$1" pin="GND@5" pad="18"/>
+<connect gate="G$1" pin="LNA_IN" pad="7"/>
+<connect gate="G$1" pin="LNA_OUT" pad="1"/>
+<connect gate="G$1" pin="PA_IN" pad="20"/>
+<connect gate="G$1" pin="PU" pad="3"/>
+<connect gate="G$1" pin="RAMP" pad="15"/>
+<connect gate="G$1" pin="RX_ON" pad="2"/>
+<connect gate="G$1" pin="R_SWITCH" pad="4"/>
+<connect gate="G$1" pin="SWITCH_OUT" pad="5"/>
+<connect gate="G$1" pin="V1_PA" pad="19"/>
+<connect gate="G$1" pin="V2_PA@1" pad="16"/>
+<connect gate="G$1" pin="V2_PA@2" pad="17"/>
+<connect gate="G$1" pin="V3_PA_OUT@1" pad="11"/>
+<connect gate="G$1" pin="V3_PA_OUT@2" pad="12"/>
+<connect gate="G$1" pin="V3_PA_OUT@3" pad="13"/>
+<connect gate="G$1" pin="VS_LNA" pad="9"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA16A4" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt; High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 16 KB - 128 KB of In-System Self-Programmable Flash&lt;br&gt;
+- 4 KB - 8 KB Boot Code Section with Independent Lock Bits&lt;br&gt;
+- 1 KB - 2 KB EEPROM&lt;br&gt;
+- 2 KB - 8 KB Internal SRAM
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Five 16-bit Timer/Counters
+&lt;ul&gt;Three Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Two Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extensions on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on one Timer/Counter&lt;/ul&gt;
+- Five USARTs
+&lt;ul&gt;IrDA Extension on one USART&lt;/ul&gt;
+- Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Two SPIs (Serial Peripheral Interfaces) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with Separate Oscillator&lt;br&gt;
+- One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter&lt;br&gt;
+- One Two-channel, 12-bit, 1 Msps Digital to Analog Converter&lt;br&gt;
+- Two Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;&lt;br&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;PDI (Program and Debug Interface) for programming, test and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 34 Programmable I/O Lines&lt;br&gt;
+- 44 - lead TQFP&lt;br&gt;
+- 44 - pad VQFN/QFN&lt;br&gt;
+- 49 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA16A4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M1" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA128A1" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt;High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 64K - 384K Bytes of In-System Self-Programmable Flash&lt;br&gt;
+- 4K - 8K Bytes Boot Section with Independent Lock Bits&lt;br&gt;
+- 2 KB - 4 KB EEPROM&lt;br&gt;
+- 4 KB - 32 KB Internal SRAM
+&lt;ul&gt;External Bus Interface for up to 16M bytes SRAM&lt;/ul&gt;
+&lt;ul&gt;External Bus Interface for up to 128M bit SDRAM&lt;/ul&gt;
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Eight 16-bit Timer/Counters
+&lt;ul&gt;Four Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Four Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extension on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on two Timer/Counters&lt;/ul&gt;
+- Eight USARTs
+&lt;ul&gt;IrDA modulation/demodulation for one USART&lt;/ul&gt;
+- Four Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Four SPI (Serial Peripheral Interface) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with separate Oscillator&lt;br&gt;
+- Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters&lt;br&gt;
+- Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters&lt;br&gt;
+- Four Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL and Prescaler&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;JTAG (IEEE 1149.1 Compliant) Interface for programming, test and debugging&lt;/ul&gt;
+&lt;ul&gt;PDI (Program and Debug Interface) for programming and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 78 Programmable I/O Lines&lt;br&gt;
+- 100 - lead TQFP&lt;br&gt;
+- 100 - ball CBGA&lt;br&gt;
+- 100 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA128A1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="90"/>
+<connect gate="G$1" pin="AVCC" pad="4"/>
+<connect gate="G$1" pin="AVCC1" pad="94"/>
+<connect gate="G$1" pin="GND" pad="3"/>
+<connect gate="G$1" pin="GND1" pad="13"/>
+<connect gate="G$1" pin="GND2" pad="23"/>
+<connect gate="G$1" pin="GND3" pad="33"/>
+<connect gate="G$1" pin="GND4" pad="43"/>
+<connect gate="G$1" pin="GND5" pad="53"/>
+<connect gate="G$1" pin="GND6" pad="63"/>
+<connect gate="G$1" pin="GND7" pad="73"/>
+<connect gate="G$1" pin="GND8" pad="84"/>
+<connect gate="G$1" pin="GND9" pad="93"/>
+<connect gate="G$1" pin="PA0" pad="95"/>
+<connect gate="G$1" pin="PA1" pad="96"/>
+<connect gate="G$1" pin="PA2" pad="97"/>
+<connect gate="G$1" pin="PA3" pad="98"/>
+<connect gate="G$1" pin="PA4" pad="99"/>
+<connect gate="G$1" pin="PA5" pad="100"/>
+<connect gate="G$1" pin="PA6" pad="1"/>
+<connect gate="G$1" pin="PA7" pad="2"/>
+<connect gate="G$1" pin="PB0" pad="5"/>
+<connect gate="G$1" pin="PB1" pad="6"/>
+<connect gate="G$1" pin="PB2" pad="7"/>
+<connect gate="G$1" pin="PB3" pad="8"/>
+<connect gate="G$1" pin="PB4" pad="9"/>
+<connect gate="G$1" pin="PB5" pad="10"/>
+<connect gate="G$1" pin="PB6" pad="11"/>
+<connect gate="G$1" pin="PB7" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="15"/>
+<connect gate="G$1" pin="PC1" pad="16"/>
+<connect gate="G$1" pin="PC2" pad="17"/>
+<connect gate="G$1" pin="PC3" pad="18"/>
+<connect gate="G$1" pin="PC4" pad="19"/>
+<connect gate="G$1" pin="PC5" pad="20"/>
+<connect gate="G$1" pin="PC6" pad="21"/>
+<connect gate="G$1" pin="PC7" pad="22"/>
+<connect gate="G$1" pin="PD0" pad="25"/>
+<connect gate="G$1" pin="PD1" pad="26"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PDI_DATA" pad="89"/>
+<connect gate="G$1" pin="PE0" pad="35"/>
+<connect gate="G$1" pin="PE1" pad="36"/>
+<connect gate="G$1" pin="PE2" pad="37"/>
+<connect gate="G$1" pin="PE3" pad="38"/>
+<connect gate="G$1" pin="PE4" pad="39"/>
+<connect gate="G$1" pin="PE5" pad="40"/>
+<connect gate="G$1" pin="PE6" pad="41"/>
+<connect gate="G$1" pin="PE7" pad="42"/>
+<connect gate="G$1" pin="PF0" pad="45"/>
+<connect gate="G$1" pin="PF1" pad="46"/>
+<connect gate="G$1" pin="PF2" pad="47"/>
+<connect gate="G$1" pin="PF3" pad="48"/>
+<connect gate="G$1" pin="PF4" pad="49"/>
+<connect gate="G$1" pin="PF5" pad="50"/>
+<connect gate="G$1" pin="PF6" pad="51"/>
+<connect gate="G$1" pin="PF7" pad="52"/>
+<connect gate="G$1" pin="PH0" pad="55"/>
+<connect gate="G$1" pin="PH1" pad="56"/>
+<connect gate="G$1" pin="PH2" pad="57"/>
+<connect gate="G$1" pin="PH3" pad="58"/>
+<connect gate="G$1" pin="PH4" pad="59"/>
+<connect gate="G$1" pin="PH5" pad="60"/>
+<connect gate="G$1" pin="PH6" pad="61"/>
+<connect gate="G$1" pin="PH7" pad="62"/>
+<connect gate="G$1" pin="PJ0" pad="65"/>
+<connect gate="G$1" pin="PJ1" pad="66"/>
+<connect gate="G$1" pin="PJ2" pad="67"/>
+<connect gate="G$1" pin="PJ3" pad="68"/>
+<connect gate="G$1" pin="PJ4" pad="69"/>
+<connect gate="G$1" pin="PJ5" pad="70"/>
+<connect gate="G$1" pin="PJ6" pad="71"/>
+<connect gate="G$1" pin="PJ7" pad="72"/>
+<connect gate="G$1" pin="PK0" pad="75"/>
+<connect gate="G$1" pin="PK1" pad="76"/>
+<connect gate="G$1" pin="PK2" pad="77"/>
+<connect gate="G$1" pin="PK3" pad="78"/>
+<connect gate="G$1" pin="PK4" pad="79"/>
+<connect gate="G$1" pin="PK5" pad="80"/>
+<connect gate="G$1" pin="PK6" pad="81"/>
+<connect gate="G$1" pin="PK7" pad="82"/>
+<connect gate="G$1" pin="PQ0" pad="85"/>
+<connect gate="G$1" pin="PQ1" pad="86"/>
+<connect gate="G$1" pin="PQ2" pad="87"/>
+<connect gate="G$1" pin="PQ3" pad="88"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="91"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="92"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VCC1" pad="24"/>
+<connect gate="G$1" pin="VCC2" pad="34"/>
+<connect gate="G$1" pin="VCC3" pad="44"/>
+<connect gate="G$1" pin="VCC4" pad="54"/>
+<connect gate="G$1" pin="VCC5" pad="64"/>
+<connect gate="G$1" pin="VCC6" pad="74"/>
+<connect gate="G$1" pin="VCC7" pad="83"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA325P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 32K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc8023.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA325P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="64M1">
+<connects>
+<connect gate="G$1" pin="!RESET!/PG5" pad="20"/>
+<connect gate="G$1" pin="!SS!/PCINT8/PB0" pad="10"/>
+<connect gate="G$1" pin="ADC0/PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1/PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2/PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3/PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4/TCK/PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5/TMS/PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6/TDO/PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7/TDI/PF7" pad="54"/>
+<connect gate="G$1" pin="AIN1/PCINT3/PE3" pad="5"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="CLKO/PCINT7/PE7" pad="9"/>
+<connect gate="G$1" pin="DI/SDA/PCINT5/PE5" pad="7"/>
+<connect gate="G$1" pin="DNC" pad="1"/>
+<connect gate="G$1" pin="DO/PCINT6/PE6" pad="8"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="53"/>
+<connect gate="G$1" pin="GND@2" pad="63"/>
+<connect gate="G$1" pin="ICP1/PD0" pad="25"/>
+<connect gate="G$1" pin="INT0/PD1" pad="26"/>
+<connect gate="G$1" pin="MISO/PCINT11/PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI/PCINT10/PB2" pad="12"/>
+<connect gate="G$1" pin="OC0A/PCINT12/PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A/PCINT13/PB5" pad="16"/>
+<connect gate="G$1" pin="OC1B/PCINT14/PB6" pad="15"/>
+<connect gate="G$1" pin="OC2A/PCINT15/PB7" pad="17"/>
+<connect gate="G$1" pin="PA0" pad="51"/>
+<connect gate="G$1" pin="PA1" pad="50"/>
+<connect gate="G$1" pin="PA2" pad="49"/>
+<connect gate="G$1" pin="PA3" pad="48"/>
+<connect gate="G$1" pin="PA4" pad="47"/>
+<connect gate="G$1" pin="PA5" pad="46"/>
+<connect gate="G$1" pin="PA6" pad="45"/>
+<connect gate="G$1" pin="PA7" pad="44"/>
+<connect gate="G$1" pin="PC0" pad="35"/>
+<connect gate="G$1" pin="PC1" pad="36"/>
+<connect gate="G$1" pin="PC2" pad="37"/>
+<connect gate="G$1" pin="PC3" pad="38"/>
+<connect gate="G$1" pin="PC4" pad="39"/>
+<connect gate="G$1" pin="PC5" pad="40"/>
+<connect gate="G$1" pin="PC6" pad="41"/>
+<connect gate="G$1" pin="PC7" pad="42"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PG0" pad="33"/>
+<connect gate="G$1" pin="PG1" pad="34"/>
+<connect gate="G$1" pin="PG2" pad="43"/>
+<connect gate="G$1" pin="RXD/PCINT0/PE0" pad="2"/>
+<connect gate="G$1" pin="SCK/PCINT9/PB1" pad="11"/>
+<connect gate="G$1" pin="T0/PG4" pad="19"/>
+<connect gate="G$1" pin="T1/PG3" pad="18"/>
+<connect gate="G$1" pin="TOSC1/XTAL1" pad="24"/>
+<connect gate="G$1" pin="TOSC2/XTAL2" pad="23"/>
+<connect gate="G$1" pin="TXD/PCINT1/PE1" pad="3"/>
+<connect gate="G$1" pin="USCK/SCL/PCINT4/PE4" pad="6"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XCK/AIN0/PCINT2/PE2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA325PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1636939" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2025" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB642D" prefix="IC">
+<description>&lt;b&gt;Flash-Memory 64-Megabit&lt;/b&gt; 2 .7-volt, Dual-interface, DataFlash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB642D" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="28T-TSOP-1">
+<connects>
+<connect gate="G$1" pin="!CS" pad="11"/>
+<connect gate="G$1" pin="!RESET" pad="2"/>
+<connect gate="G$1" pin="!WP" pad="3"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="GNDP" pad="21"/>
+<connect gate="G$1" pin="I/O0" pad="17"/>
+<connect gate="G$1" pin="I/O1" pad="18"/>
+<connect gate="G$1" pin="I/O2" pad="19"/>
+<connect gate="G$1" pin="I/O3" pad="20"/>
+<connect gate="G$1" pin="I/O4" pad="23"/>
+<connect gate="G$1" pin="I/O5" pad="24"/>
+<connect gate="G$1" pin="I/O6" pad="25"/>
+<connect gate="G$1" pin="I/O7" pad="26"/>
+<connect gate="G$1" pin="RDY/!BUSY" pad="1"/>
+<connect gate="G$1" pin="SCK/CLK" pad="12"/>
+<connect gate="G$1" pin="SER/!BYTE" pad="16"/>
+<connect gate="G$1" pin="SI" pad="13"/>
+<connect gate="G$1" pin="SO" pad="14"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+<connect gate="G$1" pin="VCCP" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT45DB642D-TU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095799" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1801" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644-20PU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!RESET" pad="9"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PCINT0/ADC0_PA0" pad="40"/>
+<connect gate="G$1" pin="PCINT1/ADC1_PA1" pad="39"/>
+<connect gate="G$1" pin="PCINT10/INT2/AIN0_PB2" pad="3"/>
+<connect gate="G$1" pin="PCINT11/OC0A/AIN1_PB3" pad="4"/>
+<connect gate="G$1" pin="PCINT12/OC0B/SS_PB4" pad="5"/>
+<connect gate="G$1" pin="PCINT13/MOSI_PB5" pad="6"/>
+<connect gate="G$1" pin="PCINT14/MISO_PB6" pad="7"/>
+<connect gate="G$1" pin="PCINT15/SCK_PB7" pad="8"/>
+<connect gate="G$1" pin="PCINT16/SCL_PC0" pad="22"/>
+<connect gate="G$1" pin="PCINT17/SDA_PC1" pad="23"/>
+<connect gate="G$1" pin="PCINT18/TCK_PC2" pad="24"/>
+<connect gate="G$1" pin="PCINT19/TMS_PC3" pad="25"/>
+<connect gate="G$1" pin="PCINT2/ADC2_PA2" pad="38"/>
+<connect gate="G$1" pin="PCINT20/TDO_PC4" pad="26"/>
+<connect gate="G$1" pin="PCINT21/TDI_PC5" pad="27"/>
+<connect gate="G$1" pin="PCINT22/TOSC1_PC6" pad="28"/>
+<connect gate="G$1" pin="PCINT23/TOSC2_PC7" pad="29"/>
+<connect gate="G$1" pin="PCINT24/RXD0_PD0" pad="14"/>
+<connect gate="G$1" pin="PCINT25/TXD0_PD1" pad="15"/>
+<connect gate="G$1" pin="PCINT26/INT0_PD2" pad="16"/>
+<connect gate="G$1" pin="PCINT27/INT1_PD3" pad="17"/>
+<connect gate="G$1" pin="PCINT28/OC1B_PD4" pad="18"/>
+<connect gate="G$1" pin="PCINT29/OC1A_PD5" pad="19"/>
+<connect gate="G$1" pin="PCINT3/ADC3_PA3" pad="37"/>
+<connect gate="G$1" pin="PCINT30/OC2B/ICP_PD6" pad="20"/>
+<connect gate="G$1" pin="PCINT31/OC2A_PD7" pad="21"/>
+<connect gate="G$1" pin="PCINT4/ADC4_PA4" pad="36"/>
+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB161D" prefix="IC">
+<description>&lt;b&gt;16-megabit 2.5V or 2.7V DataFlash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3500.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB161VFN8" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-MU" package="VDFN-8">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>
diff --git a/atmel.l#2 b/atmel.l#2
new file mode 100644 (file)
index 0000000..f925e41
--- /dev/null
+++ b/atmel.l#2
@@ -0,0 +1,20777 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.0">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="50" unitdist="mil" unit="mil" style="lines" multiple="2" display="yes" altdistance="5" altunitdist="mil" altunit="mil"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="yes" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="yes" active="yes"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="yes" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="yes" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>
+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>
+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
+<layer number="51" name="tDocu" color="6" fill="9" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+</layers>
+<library>
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL08">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-5.08" y1="-0.635" x2="-5.08" y2="0.635" width="0.1524" layer="21" curve="180"/>
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+<wire x1="5.08" y1="-2.794" x2="5.08" y2="2.794" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="2.794" x2="-5.08" y2="2.794" width="0.1524" layer="21"/>
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+<text x="-5.3594" y="-2.54" size="1.27" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-3.81" y="-0.9906" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL20">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-13.208" y1="-0.635" x2="-13.208" y2="-2.794" width="0.1524" layer="21"/>
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+<text x="-10.16" y="-0.762" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL28-3">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt; 0.3 inch</description>
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+<description>&lt;b&gt; SSOP 24&lt;/b&gt;&lt;p&gt;
+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.&lt;br&gt;
+Package centre and &amp;lt;NAME &amp; &amp;lt;VALUE placed by librarian@cadsoft.de.</description>
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+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.pdf</description>
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+<text x="-2.8575" y="-2.159" size="1.27" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="4.064" y="-2.159" size="1.27" layer="27" ratio="10" rot="R90">&gt;VALUE</text>
+<rectangle x1="-2.08" y1="2.95" x2="-1.73" y2="3.85" layer="51"/>
+<rectangle x1="-0.81" y1="2.95" x2="-0.46" y2="3.85" layer="51"/>
+<rectangle x1="0.46" y1="2.95" x2="0.81" y2="3.85" layer="51"/>
+<rectangle x1="1.73" y1="2.95" x2="2.08" y2="3.85" layer="51"/>
+<rectangle x1="1.72" y1="-3.85" x2="2.07" y2="-2.95" layer="51"/>
+<rectangle x1="0.45" y1="-3.85" x2="0.8" y2="-2.95" layer="51"/>
+<rectangle x1="-0.82" y1="-3.85" x2="-0.47" y2="-2.95" layer="51"/>
+<rectangle x1="-2.08" y1="-3.85" x2="-1.73" y2="-2.95" layer="51"/>
+</package>
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+Plastic Gull Wing Small Outline (JEDEC SOIC)&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
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+<wire x1="2.175" y1="1.925" x2="2.425" y2="1.675" width="0.1524" layer="51" curve="-90"/>
+<wire x1="2.175" y1="-1.925" x2="2.425" y2="-1.675" width="0.1524" layer="51" curve="90"/>
+<wire x1="-2.425" y1="-1.675" x2="-2.175" y2="-1.925" width="0.1524" layer="51" curve="90"/>
+<wire x1="-1.59" y1="1.925" x2="-0.95" y2="1.925" width="0.1524" layer="51"/>
+<wire x1="-2.165" y1="1.925" x2="2.185" y2="1.925" width="0.1524" layer="51"/>
+<wire x1="0.95" y1="1.925" x2="1.59" y2="1.925" width="0.1524" layer="51"/>
+<wire x1="2.21" y1="1.925" x2="2.185" y2="1.925" width="0.1524" layer="21"/>
+<wire x1="2.2" y1="-1.925" x2="2.185" y2="-1.925" width="0.1524" layer="51"/>
+<wire x1="2.185" y1="-1.925" x2="2.155" y2="-1.925" width="0.1524" layer="51"/>
+<wire x1="1.59" y1="-1.925" x2="0.94" y2="-1.925" width="0.1524" layer="51"/>
+<wire x1="0.32" y1="-1.925" x2="-0.33" y2="-1.925" width="0.1524" layer="51"/>
+<wire x1="2.185" y1="-1.925" x2="-2.165" y2="-1.925" width="0.1524" layer="51"/>
+<wire x1="-2.425" y1="1.675" x2="-2.425" y2="-1.665" width="0.1524" layer="21"/>
+<wire x1="2.425" y1="-1.675" x2="2.425" y2="1.675" width="0.1524" layer="21"/>
+<circle x="-1.42" y="-1.115" radius="0.5" width="0.0508" layer="21"/>
+<smd name="1" x="-1.905" y="-2.654" dx="0.6" dy="1.6" layer="1"/>
+<smd name="2" x="-0.645" y="-2.654" dx="0.6" dy="1.6" layer="1"/>
+<smd name="3" x="0.625" y="-2.654" dx="0.6" dy="1.6" layer="1"/>
+<smd name="4" x="1.895" y="-2.654" dx="0.6" dy="1.6" layer="1"/>
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+<smd name="7" x="-0.635" y="2.654" dx="0.6" dy="1.6" layer="1"/>
+<smd name="6" x="0.635" y="2.654" dx="0.6" dy="1.6" layer="1"/>
+<smd name="5" x="1.905" y="2.654" dx="0.6" dy="1.6" layer="1"/>
+<text x="-2.8575" y="-2.159" size="1.27" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="4.064" y="-2.159" size="1.27" layer="27" ratio="10" rot="R90">&gt;VALUE</text>
+<rectangle x1="-2.08" y1="1.975" x2="-1.73" y2="3.075" layer="51"/>
+<rectangle x1="-0.81" y1="1.975" x2="-0.46" y2="3.075" layer="51"/>
+<rectangle x1="0.46" y1="1.975" x2="0.81" y2="3.075" layer="51"/>
+<rectangle x1="1.73" y1="1.975" x2="2.08" y2="3.075" layer="51"/>
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+<rectangle x1="-2.08" y1="-3.075" x2="-1.73" y2="-1.975" layer="51"/>
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+<description>&lt;b&gt;20M1&lt;/b&gt; 20-pad, 4 x 4 x 0.8 mm Body&lt;p&gt;
+Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF)&lt;br&gt;
+
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
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+<wire x1="1.95" y1="1.95" x2="1.95" y2="-1.95" width="0.1016" layer="51"/>
+<wire x1="1.95" y1="-1.95" x2="-1.95" y2="-1.95" width="0.1016" layer="51"/>
+<wire x1="-1.95" y1="-1.95" x2="-1.95" y2="1.95" width="0.1016" layer="51"/>
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+<smd name="6" x="-1" y="-1.85" dx="0.7" dy="0.3" layer="1" rot="R90" stop="no" cream="no"/>
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+<smd name="10" x="1" y="-1.85" dx="0.7" dy="0.3" layer="1" rot="R90" stop="no" cream="no"/>
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+<smd name="14" x="1.85" y="0.5" dx="0.7" dy="0.3" layer="1" rot="R180" stop="no" cream="no"/>
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+<text x="-1.875" y="2.375" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.875" y="-3.625" size="1.27" layer="27">&gt;VALUE</text>
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+<rectangle x1="0.175" y1="-1.975" x2="0.825" y2="-1.725" layer="31" rot="R90"/>
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+<rectangle x1="1.475" y1="-0.675" x2="2.225" y2="-0.325" layer="29" rot="R180"/>
+<rectangle x1="1.525" y1="-0.625" x2="2.175" y2="-0.375" layer="31" rot="R180"/>
+<rectangle x1="1.475" y1="-0.175" x2="2.225" y2="0.175" layer="29" rot="R180"/>
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+<rectangle x1="1.475" y1="0.325" x2="2.225" y2="0.675" layer="29" rot="R180"/>
+<rectangle x1="1.525" y1="0.375" x2="2.175" y2="0.625" layer="31" rot="R180"/>
+<rectangle x1="1.475" y1="0.825" x2="2.225" y2="1.175" layer="29" rot="R180"/>
+<rectangle x1="1.525" y1="0.875" x2="2.175" y2="1.125" layer="31" rot="R180"/>
+<rectangle x1="0.625" y1="1.675" x2="1.375" y2="2.025" layer="29" rot="R270"/>
+<rectangle x1="0.675" y1="1.725" x2="1.325" y2="1.975" layer="31" rot="R270"/>
+<rectangle x1="0.125" y1="1.675" x2="0.875" y2="2.025" layer="29" rot="R270"/>
+<rectangle x1="0.175" y1="1.725" x2="0.825" y2="1.975" layer="31" rot="R270"/>
+<rectangle x1="-0.375" y1="1.675" x2="0.375" y2="2.025" layer="29" rot="R270"/>
+<rectangle x1="-0.325" y1="1.725" x2="0.325" y2="1.975" layer="31" rot="R270"/>
+<rectangle x1="-0.875" y1="1.675" x2="-0.125" y2="2.025" layer="29" rot="R270"/>
+<rectangle x1="-0.825" y1="1.725" x2="-0.175" y2="1.975" layer="31" rot="R270"/>
+<rectangle x1="-1.375" y1="1.675" x2="-0.625" y2="2.025" layer="29" rot="R270"/>
+<rectangle x1="-1.325" y1="1.725" x2="-0.675" y2="1.975" layer="31" rot="R270"/>
+<rectangle x1="-1.325" y1="-1.325" x2="1.325" y2="1.325" layer="29"/>
+<rectangle x1="-1.125" y1="-1.125" x2="1.125" y2="1.125" layer="31"/>
+</package>
+<package name="TQFP44">
+<description>&lt;b&gt;44-lead Thin Quad Flat Package&lt;/b&gt;</description>
+<wire x1="-4.8" y1="4.4" x2="-4.4" y2="4.8" width="0.2032" layer="21"/>
+<wire x1="-4.4" y1="4.8" x2="4.4" y2="4.8" width="0.2032" layer="21"/>
+<wire x1="4.4" y1="4.8" x2="4.8" y2="4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="4.4" x2="4.8" y2="-4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="-4.4" x2="4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="4.4" y1="-4.8" x2="-4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="-4.4" y1="-4.8" x2="-4.8" y2="-4.4" width="0.2032" layer="21"/>
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+<circle x="-4" y="4" radius="0.2827" width="0.254" layer="21"/>
+<smd name="1" x="-5.8" y="4" dx="1.5" dy="0.5" layer="1"/>
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+<smd name="3" x="-5.8" y="2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="4" x="-5.8" y="1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="5" x="-5.8" y="0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="6" x="-5.8" y="0" dx="1.5" dy="0.5" layer="1"/>
+<smd name="7" x="-5.8" y="-0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="8" x="-5.8" y="-1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="9" x="-5.8" y="-2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="10" x="-5.8" y="-3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="11" x="-5.8" y="-4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="12" x="-4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
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+<wire x1="10.16" y1="7.62" x2="10.16" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-7.62" x2="-7.62" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="-7.62" y1="-7.62" x2="-7.62" y2="7.62" width="0.254" layer="94"/>
+<text x="-7.62" y="8.89" size="1.778" layer="95">&gt;NAME</text>
+<text x="-7.62" y="-10.16" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="!CS" x="-10.16" y="-5.08" length="short" direction="in"/>
+<pin name="SCK" x="-10.16" y="-2.54" length="short" direction="in"/>
+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="!WP" x="-10.16" y="0" length="short" direction="in"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AT90*4434P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*4434" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (LS)&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="44"/>
+<connect gate="G$1" pin="VCC2" pad="11"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4414" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J1" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J2" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J3" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515-A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="22"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4433" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="3-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2343" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2313" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S1200" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Y" package="SSOP20D8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY10" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes ROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY11*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY12*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY22" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1K ROM&lt;p&gt;
+128 bytes RAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;br&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+UART&lt;br&gt;
+RTC&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AC+)PE2" pad="4"/>
+<connect gate="G$1" pin="(AC-)PE3" pad="5"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PE1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7)" pad="54"/>
+<connect gate="G$1" pin="RD" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="WR" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90C8534" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+6-channel&lt;p&gt;
+10-bit A/D</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP48">
+<connects>
+<connect gate="G$1" pin="ADIN0" pad="1"/>
+<connect gate="G$1" pin="ADIN1" pad="13"/>
+<connect gate="G$1" pin="ADIN2" pad="14"/>
+<connect gate="G$1" pin="ADIN3" pad="15"/>
+<connect gate="G$1" pin="ADIN4" pad="16"/>
+<connect gate="G$1" pin="ADIN5" pad="17"/>
+<connect gate="G$1" pin="AGND" pad="11"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="31"/>
+<connect gate="G$1" pin="INT0" pad="35"/>
+<connect gate="G$1" pin="INT1" pad="34"/>
+<connect gate="G$1" pin="NC1" pad="2"/>
+<connect gate="G$1" pin="NC10" pad="12"/>
+<connect gate="G$1" pin="NC11" pad="19"/>
+<connect gate="G$1" pin="NC12" pad="21"/>
+<connect gate="G$1" pin="NC13" pad="25"/>
+<connect gate="G$1" pin="NC14" pad="26"/>
+<connect gate="G$1" pin="NC15" pad="27"/>
+<connect gate="G$1" pin="NC16" pad="28"/>
+<connect gate="G$1" pin="NC17" pad="29"/>
+<connect gate="G$1" pin="NC18" pad="30"/>
+<connect gate="G$1" pin="NC19" pad="32"/>
+<connect gate="G$1" pin="NC2" pad="3"/>
+<connect gate="G$1" pin="NC20" pad="36"/>
+<connect gate="G$1" pin="NC21" pad="37"/>
+<connect gate="G$1" pin="NC22" pad="40"/>
+<connect gate="G$1" pin="NC23" pad="41"/>
+<connect gate="G$1" pin="NC24" pad="42"/>
+<connect gate="G$1" pin="NC25" pad="43"/>
+<connect gate="G$1" pin="NC26" pad="48"/>
+<connect gate="G$1" pin="NC3" pad="4"/>
+<connect gate="G$1" pin="NC4" pad="5"/>
+<connect gate="G$1" pin="NC5" pad="6"/>
+<connect gate="G$1" pin="NC6" pad="7"/>
+<connect gate="G$1" pin="NC7" pad="8"/>
+<connect gate="G$1" pin="NC8" pad="9"/>
+<connect gate="G$1" pin="NC9" pad="10"/>
+<connect gate="G$1" pin="PA0" pad="47"/>
+<connect gate="G$1" pin="PA1" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="45"/>
+<connect gate="G$1" pin="PA3" pad="44"/>
+<connect gate="G$1" pin="PA4" pad="39"/>
+<connect gate="G$1" pin="PA5" pad="38"/>
+<connect gate="G$1" pin="PA6" pad="33"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="22"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="30"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="31"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="29"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="10"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="3"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="14"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="15"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="11"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="4"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="27"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="29"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="26"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="5"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="42"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="10"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="7"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="43"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY15L" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2.7 V&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM&lt;p&gt;
+4-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes &lt;B&gt;EEPROM&lt;/B&gt;&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-5" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="21"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="14"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="15"/>
+<connect gate="G$1" pin="PB2(T0)" pad="16"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="17"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="18"/>
+<connect gate="G$1" pin="PB5" pad="19"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD2" pad="4"/>
+<connect gate="G$1" pin="PD3" pad="5"/>
+<connect gate="G$1" pin="PD4" pad="6"/>
+<connect gate="G$1" pin="PD5" pad="11"/>
+<connect gate="G$1" pin="PD6" pad="12"/>
+<connect gate="G$1" pin="PD7" pad="13"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="VCC1" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND1" pad="21"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="20"/>
+<connect gate="G$1" pin="NC5" pad="22"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="13"/>
+<connect gate="G$1" pin="PB2(T0)" pad="14"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="15"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="16"/>
+<connect gate="G$1" pin="PB5" pad="17"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="30"/>
+<connect gate="G$1" pin="PD1" pad="31"/>
+<connect gate="G$1" pin="PD2" pad="32"/>
+<connect gate="G$1" pin="PD3" pad="1"/>
+<connect gate="G$1" pin="PD4" pad="2"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="10"/>
+<connect gate="G$1" pin="PD7" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="VCC1" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT25*" prefix="IC">
+<description>SPI bus serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="250X0" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS/" pad="1"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="HOLD/" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="6"/>
+<connect gate="G$1" pin="SI" pad="5"/>
+<connect gate="G$1" pin="SO" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP/" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="CAT25040LI-G" constant="no"/>
+<attribute name="OC_FARNELL" value="1718045" constant="no"/>
+<attribute name="OC_NEWARK" value="06R0588" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT24C*" prefix="IC">
+<description>2-wire serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="24CXX" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="A0" pad="1"/>
+<connect gate="G$1" pin="A1" pad="2"/>
+<connect gate="G$1" pin="A2" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="SCL" pad="6"/>
+<connect gate="G$1" pin="SDA" pad="5"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT24C1024BW-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1362646" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2044" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SDE2506" prefix="IC">
+<description>I2C/MicroWire &lt;B&gt;EEPROM&lt;/B&gt; (24xxx)</description>
+<gates>
+<gate name="G$1" symbol="SDE2506" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CE/" pad="2"/>
+<connect gate="G$1" pin="CLK" pad="5"/>
+<connect gate="G$1" pin="D" pad="4"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="TG" pad="8"/>
+<connect gate="G$1" pin="TP" pad="7"/>
+<connect gate="G$1" pin="VCC" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C*6" prefix="IC">
+<description>3-wire serial EEPROM</description>
+<gates>
+<gate name="G$1" symbol="93CX6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="ORG" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46D-PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1362666" constant="no"/>
+<attribute name="OC_NEWARK" value="50M3339" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C2051" prefix="IC">
+<description>80C31 &lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+2.7 V</description>
+<gates>
+<gate name="G$1" symbol="89C2051" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699389" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3687" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC20S">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699390" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3688" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;p&gt;
+128 Kbytes FLASH&lt;p&gt;
+4 Kbytes SRAM&lt;p&gt;
+2 Kbytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+RTC&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="01" pad="21"/>
+<connect gate="G$1" pin="02" pad="22"/>
+<connect gate="G$1" pin="A10-PC2" pad="37"/>
+<connect gate="G$1" pin="A11-PC3" pad="38"/>
+<connect gate="G$1" pin="A12-PC4" pad="39"/>
+<connect gate="G$1" pin="A13-PC5" pad="40"/>
+<connect gate="G$1" pin="A14-PC6" pad="41"/>
+<connect gate="G$1" pin="A15-PC7" pad="42"/>
+<connect gate="G$1" pin="A8-PC0" pad="35"/>
+<connect gate="G$1" pin="A9-PC1" pad="36"/>
+<connect gate="G$1" pin="AC+_PE2" pad="4"/>
+<connect gate="G$1" pin="AC-_PE3" pad="5"/>
+<connect gate="G$1" pin="AD0-PA0" pad="51"/>
+<connect gate="G$1" pin="AD1-PA1" pad="50"/>
+<connect gate="G$1" pin="AD2-PA2" pad="49"/>
+<connect gate="G$1" pin="AD3-PA3" pad="48"/>
+<connect gate="G$1" pin="AD4-PA4" pad="47"/>
+<connect gate="G$1" pin="AD5-PA5" pad="46"/>
+<connect gate="G$1" pin="AD6-PA6" pad="45"/>
+<connect gate="G$1" pin="AD7-PA7" pad="44"/>
+<connect gate="G$1" pin="ADC0-PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1-PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2-PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3-PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4-PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5-PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6-PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7-PF7" pad="54"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="AVREF" pad="62"/>
+<connect gate="G$1" pin="GND" pad="53"/>
+<connect gate="G$1" pin="INT4-PE4" pad="6"/>
+<connect gate="G$1" pin="INT5-PE5" pad="7"/>
+<connect gate="G$1" pin="INT6-PE6" pad="8"/>
+<connect gate="G$1" pin="INT7-PE7" pad="9"/>
+<connect gate="G$1" pin="MISO-PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI-PB2" pad="12"/>
+<connect gate="G$1" pin="OC0-PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A-PB5" pad="15"/>
+<connect gate="G$1" pin="OC1B-PB6" pad="16"/>
+<connect gate="G$1" pin="OC2-PB7" pad="17"/>
+<connect gate="G$1" pin="PD0-INT0" pad="25"/>
+<connect gate="G$1" pin="PD1-INT1" pad="26"/>
+<connect gate="G$1" pin="PD2-INT2" pad="27"/>
+<connect gate="G$1" pin="PD3-INT3" pad="28"/>
+<connect gate="G$1" pin="PD4-IC1" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6-T1" pad="31"/>
+<connect gate="G$1" pin="PD7-T2" pad="32"/>
+<connect gate="G$1" pin="PEN/" pad="1"/>
+<connect gate="G$1" pin="RD/" pad="34"/>
+<connect gate="G$1" pin="RESET/" pad="20"/>
+<connect gate="G$1" pin="RXD-PE0" pad="2"/>
+<connect gate="G$1" pin="SCK-PB1" pad="11"/>
+<connect gate="G$1" pin="SS-PB0" pad="10"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="TXD-PE1" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="52"/>
+<connect gate="G$1" pin="WR/" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C*52" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH; 2K Bytes EEPROM&lt;br&gt;
+Compatible with MCS-51 Products&lt;br&gt;
+at89s8252.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C52" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="33.02" y="5.08" addlevel="request"/>
+</gates>
+<devices>
+<device name="P6" package="DIL40">
+<connects>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="EA" pad="31"/>
+<connect gate="G$1" pin="P0.0AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0_T2" pad="1"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0" pad="10"/>
+<connect gate="G$1" pin="P3.1" pad="11"/>
+<connect gate="G$1" pin="P3.2" pad="12"/>
+<connect gate="G$1" pin="P3.3" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/RD" pad="17"/>
+<connect gate="G$1" pin="PSEN" pad="29"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="VCC" pad="40"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="EA" pad="35"/>
+<connect gate="G$1" pin="P0.0AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0_T2" pad="2"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0" pad="11"/>
+<connect gate="G$1" pin="P3.1" pad="13"/>
+<connect gate="G$1" pin="P3.2" pad="14"/>
+<connect gate="G$1" pin="P3.3" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/RD" pad="19"/>
+<connect gate="G$1" pin="PSEN" pad="32"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="VCC" pad="44"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Q" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="27C080" prefix="IC">
+<description>&lt;b&gt;8-Megabit (1Mx8) OTP EPROM&lt;/b&gt;</description>
+<gates>
+<gate name="G$1" symbol="27C080" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="15.24" y="-10.16" addlevel="request"/>
+</gates>
+<devices>
+<device name="32P6" package="DIL32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455026" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3824" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="SO32X">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC32R">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455025" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3823" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSOP32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="30"/>
+<connect gate="G$1" pin="!OE!VPP" pad="32"/>
+<connect gate="G$1" pin="A0" pad="20"/>
+<connect gate="G$1" pin="A1" pad="19"/>
+<connect gate="G$1" pin="A10" pad="31"/>
+<connect gate="G$1" pin="A11" pad="1"/>
+<connect gate="G$1" pin="A12" pad="12"/>
+<connect gate="G$1" pin="A13" pad="4"/>
+<connect gate="G$1" pin="A14" pad="5"/>
+<connect gate="G$1" pin="A15" pad="11"/>
+<connect gate="G$1" pin="A16" pad="10"/>
+<connect gate="G$1" pin="A17" pad="6"/>
+<connect gate="G$1" pin="A18" pad="7"/>
+<connect gate="G$1" pin="A19" pad="9"/>
+<connect gate="G$1" pin="A2" pad="18"/>
+<connect gate="G$1" pin="A3" pad="17"/>
+<connect gate="G$1" pin="A4" pad="16"/>
+<connect gate="G$1" pin="A5" pad="15"/>
+<connect gate="G$1" pin="A6" pad="14"/>
+<connect gate="G$1" pin="A7" pad="13"/>
+<connect gate="G$1" pin="A8" pad="3"/>
+<connect gate="G$1" pin="A9" pad="2"/>
+<connect gate="G$1" pin="O0" pad="21"/>
+<connect gate="G$1" pin="O1" pad="22"/>
+<connect gate="G$1" pin="O2" pad="23"/>
+<connect gate="G$1" pin="O3" pad="25"/>
+<connect gate="G$1" pin="O4" pad="26"/>
+<connect gate="G$1" pin="O5" pad="27"/>
+<connect gate="G$1" pin="O6" pad="28"/>
+<connect gate="G$1" pin="O7" pad="29"/>
+<connect gate="P" pin="GND" pad="24"/>
+<connect gate="P" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91R4008" prefix="IC">
+<description>&lt;b&gt;AT91 ARM® Thumb® RISC-Controller&lt;/b&gt;&lt;p&gt;
+Microcontroller AT91R40008</description>
+<gates>
+<gate name="A" symbol="AT91R4008" x="-25.4" y="2.54" addlevel="always"/>
+<gate name="B" symbol="AT91R4008-PARPORT" x="0" y="-7.62" addlevel="always"/>
+<gate name="C" symbol="AT91R4008-ADR" x="27.94" y="-7.62" addlevel="always"/>
+<gate name="D" symbol="D0-15" x="53.34" y="2.54" addlevel="always"/>
+<gate name="P1" symbol="GND" x="-38.1" y="-58.42" addlevel="always"/>
+<gate name="P2" symbol="GND" x="-35.56" y="-58.42" addlevel="always"/>
+<gate name="P3" symbol="GND" x="-33.02" y="-58.42" addlevel="always"/>
+<gate name="P4" symbol="GND" x="-30.48" y="-58.42" addlevel="always"/>
+<gate name="P5" symbol="GND" x="-27.94" y="-58.42" addlevel="always"/>
+<gate name="P15" symbol="VDDIO" x="-38.1" y="-35.56" addlevel="always"/>
+<gate name="P16" symbol="VDDIO" x="-35.56" y="-35.56" addlevel="always"/>
+<gate name="P17" symbol="VDDIO" x="-33.02" y="-35.56" addlevel="always"/>
+<gate name="P6" symbol="GND" x="-25.4" y="-58.42" addlevel="always"/>
+<gate name="P7" symbol="GND" x="-22.86" y="-58.42" addlevel="always"/>
+<gate name="P8" symbol="GND" x="-20.32" y="-58.42" addlevel="always"/>
+<gate name="P9" symbol="GND" x="-17.78" y="-58.42" addlevel="always"/>
+<gate name="P10" symbol="VDDIO" x="-30.48" y="-35.56" addlevel="always"/>
+<gate name="P11" symbol="VDDIO" x="-27.94" y="-35.56" addlevel="always"/>
+<gate name="P12" symbol="VDDCORE" x="-20.32" y="-35.56" addlevel="always"/>
+<gate name="P13" symbol="VDDCORE" x="-17.78" y="-35.56" addlevel="always"/>
+<gate name="P14" symbol="VDDCORE" x="-15.24" y="-35.56" addlevel="always"/>
+<gate name="P18" symbol="VDDIO" x="-25.4" y="-35.56" addlevel="always"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="A" pin="GND" pad="78"/>
+<connect gate="A" pin="MCKI" pad="82"/>
+<connect gate="A" pin="NCS0" pad="97"/>
+<connect gate="A" pin="NCS1" pad="98"/>
+<connect gate="A" pin="NRD/NOE" pad="92"/>
+<connect gate="A" pin="NRST" pad="79"/>
+<connect gate="A" pin="NRW0/NWE" pad="93"/>
+<connect gate="A" pin="NRW1/NUB" pad="77"/>
+<connect gate="A" pin="NWAIT" pad="96"/>
+<connect gate="A" pin="NWDOVF" pad="80"/>
+<connect gate="A" pin="TCK" pad="91"/>
+<connect gate="A" pin="TDI" pad="89"/>
+<connect gate="A" pin="TDO" pad="90"/>
+<connect gate="A" pin="TMS" pad="88"/>
+<connect gate="B" pin="P0/TCLK0" pad="49"/>
+<connect gate="B" pin="P1/TIOA0" pad="50"/>
+<connect gate="B" pin="P10/IRQ1" pad="63"/>
+<connect gate="B" pin="P11/IRQ2" pad="64"/>
+<connect gate="B" pin="P12/FIQ" pad="66"/>
+<connect gate="B" pin="P13/SCK0" pad="67"/>
+<connect gate="B" pin="P14/TXD0" pad="68"/>
+<connect gate="B" pin="P15/RXD0" pad="69"/>
+<connect gate="B" pin="P16" pad="70"/>
+<connect gate="B" pin="P17" pad="71"/>
+<connect gate="B" pin="P18" pad="72"/>
+<connect gate="B" pin="P19" pad="73"/>
+<connect gate="B" pin="P2/TIOB0" pad="51"/>
+<connect gate="B" pin="P20/SCK1" pad="74"/>
+<connect gate="B" pin="P21/TXD1/NTRI" pad="75"/>
+<connect gate="B" pin="P22/RXD1" pad="76"/>
+<connect gate="B" pin="P23" pad="83"/>
+<connect gate="B" pin="P24/BMS" pad="84"/>
+<connect gate="B" pin="P25/MCKO" pad="85"/>
+<connect gate="B" pin="P26/NCS2" pad="99"/>
+<connect gate="B" pin="P27/NCS3" pad="100"/>
+<connect gate="B" pin="P3/TCLK1" pad="54"/>
+<connect gate="B" pin="P4/TIOA1" pad="55"/>
+<connect gate="B" pin="P5/TIOB1" pad="56"/>
+<connect gate="B" pin="P6/TCLK2" pad="57"/>
+<connect gate="B" pin="P7/TIOA2" pad="58"/>
+<connect gate="B" pin="P8/TIOB2" pad="59"/>
+<connect gate="B" pin="P9/IRQ0" pad="60"/>
+<connect gate="C" pin="A1" pad="3"/>
+<connect gate="C" pin="A10" pad="13"/>
+<connect gate="C" pin="A11" pad="14"/>
+<connect gate="C" pin="A12" pad="15"/>
+<connect gate="C" pin="A13" pad="16"/>
+<connect gate="C" pin="A14" pad="17"/>
+<connect gate="C" pin="A15" pad="20"/>
+<connect gate="C" pin="A16" pad="21"/>
+<connect gate="C" pin="A17" pad="22"/>
+<connect gate="C" pin="A18" pad="23"/>
+<connect gate="C" pin="A19" pad="24"/>
+<connect gate="C" pin="A2" pad="4"/>
+<connect gate="C" pin="A3" pad="5"/>
+<connect gate="C" pin="A4" pad="6"/>
+<connect gate="C" pin="A5" pad="7"/>
+<connect gate="C" pin="A6" pad="8"/>
+<connect gate="C" pin="A7" pad="9"/>
+<connect gate="C" pin="A8" pad="11"/>
+<connect gate="C" pin="A9" pad="12"/>
+<connect gate="C" pin="NLB/A0" pad="1"/>
+<connect gate="C" pin="P28/CS7/A20" pad="25"/>
+<connect gate="C" pin="P29/CS6/A21" pad="26"/>
+<connect gate="C" pin="P30/CS5/A22" pad="29"/>
+<connect gate="C" pin="P31/CS4/A23" pad="30"/>
+<connect gate="D" pin="D0" pad="31"/>
+<connect gate="D" pin="D1" pad="32"/>
+<connect gate="D" pin="D10" pad="42"/>
+<connect gate="D" pin="D11" pad="43"/>
+<connect gate="D" pin="D12" pad="45"/>
+<connect gate="D" pin="D13" pad="46"/>
+<connect gate="D" pin="D14" pad="47"/>
+<connect gate="D" pin="D15" pad="48"/>
+<connect gate="D" pin="D2" pad="33"/>
+<connect gate="D" pin="D3" pad="34"/>
+<connect gate="D" pin="D4" pad="35"/>
+<connect gate="D" pin="D5" pad="37"/>
+<connect gate="D" pin="D6" pad="38"/>
+<connect gate="D" pin="D7" pad="39"/>
+<connect gate="D" pin="D8" pad="40"/>
+<connect gate="D" pin="D9" pad="41"/>
+<connect gate="P1" pin="GND" pad="2"/>
+<connect gate="P10" pin="VDDIO" pad="62"/>
+<connect gate="P11" pin="VDDIO" pad="81"/>
+<connect gate="P12" pin="VDDCORE" pad="27"/>
+<connect gate="P13" pin="VDDCORE" pad="61"/>
+<connect gate="P14" pin="VDDCORE" pad="94"/>
+<connect gate="P15" pin="VDDIO" pad="10"/>
+<connect gate="P16" pin="VDDIO" pad="28"/>
+<connect gate="P17" pin="VDDIO" pad="44"/>
+<connect gate="P18" pin="VDDIO" pad="95"/>
+<connect gate="P2" pin="GND" pad="18"/>
+<connect gate="P3" pin="GND" pad="19"/>
+<connect gate="P4" pin="GND" pad="36"/>
+<connect gate="P5" pin="GND" pad="52"/>
+<connect gate="P6" pin="GND" pad="53"/>
+<connect gate="P7" pin="GND" pad="65"/>
+<connect gate="P8" pin="GND" pad="86"/>
+<connect gate="P9" pin="GND" pad="87"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455146" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3782" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171657" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6920" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455147" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3783" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171665" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6921" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="MLF32">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SAM9708" prefix="SAM9708">
+<description>&lt;b&gt;128-voice Integrated Sound Synthesizer&lt;/b&gt;</description>
+<gates>
+<gate name="A" symbol="SAM9708" x="-45.72" y="17.78" addlevel="always"/>
+<gate name="C" symbol="SAM9708-SND" x="15.24" y="30.48" addlevel="always"/>
+<gate name="B" symbol="D0-15" x="-25.4" y="27.94" addlevel="always"/>
+<gate name="D" symbol="WA27" x="50.8" y="17.78" addlevel="always"/>
+<gate name="E" symbol="WD15" x="68.58" y="30.48" addlevel="always"/>
+<gate name="G1" symbol="GND" x="-27.94" y="-25.4"/>
+<gate name="G2" symbol="GND" x="-25.4" y="-25.4"/>
+<gate name="G3" symbol="GND" x="-22.86" y="-25.4"/>
+<gate name="G4" symbol="GND" x="-20.32" y="-25.4"/>
+<gate name="G5" symbol="GND" x="-17.78" y="-25.4"/>
+<gate name="G6" symbol="GND" x="-15.24" y="-25.4"/>
+<gate name="G7" symbol="GND" x="-12.7" y="-25.4"/>
+<gate name="G8" symbol="GND" x="-10.16" y="-25.4"/>
+<gate name="G9" symbol="GND" x="-7.62" y="-25.4"/>
+<gate name="G10" symbol="GND" x="-5.08" y="-25.4"/>
+<gate name="G11" symbol="GND" x="-2.54" y="-25.4"/>
+<gate name="G12" symbol="GND" x="0" y="-25.4"/>
+<gate name="G13" symbol="GND" x="2.54" y="-25.4"/>
+<gate name="G14" symbol="GND" x="5.08" y="-25.4"/>
+<gate name="G15" symbol="GND" x="7.62" y="-25.4"/>
+<gate name="G16" symbol="GND" x="10.16" y="-25.4"/>
+<gate name="G17" symbol="GND" x="12.7" y="-25.4"/>
+<gate name="G18" symbol="GND" x="15.24" y="-25.4"/>
+<gate name="G19" symbol="GND" x="17.78" y="-25.4"/>
+<gate name="V1" symbol="VCC1" x="-27.94" y="-7.62"/>
+<gate name="V2" symbol="VCC1" x="-25.4" y="-7.62"/>
+<gate name="V3" symbol="VCC1" x="-22.86" y="-7.62"/>
+<gate name="V4" symbol="VCC1" x="-20.32" y="-7.62"/>
+<gate name="V5" symbol="VCC1" x="-17.78" y="-7.62"/>
+<gate name="V6" symbol="VCC2" x="-12.7" y="-7.62"/>
+<gate name="V7" symbol="VCC2" x="-10.16" y="-7.62"/>
+<gate name="V8" symbol="VCC2" x="-7.62" y="-7.62"/>
+<gate name="V9" symbol="VCC2" x="-5.08" y="-7.62"/>
+<gate name="V10" symbol="VCC2" x="-2.54" y="-7.62"/>
+<gate name="V11" symbol="VC3" x="2.54" y="-7.62"/>
+<gate name="V12" symbol="VC3" x="5.08" y="-7.62"/>
+<gate name="V13" symbol="VC3" x="7.62" y="-7.62"/>
+<gate name="V14" symbol="VC3" x="10.16" y="-7.62"/>
+<gate name="V15" symbol="VC3" x="12.7" y="-7.62"/>
+<gate name="V16" symbol="VC3" x="15.24" y="-7.62"/>
+<gate name="V17" symbol="VC3" x="17.78" y="-7.62"/>
+<gate name="V18" symbol="VC3" x="20.32" y="-7.62"/>
+</gates>
+<devices>
+<device name="" package="TQFP144">
+<connects>
+<connect gate="A" pin="!CAS" pad="104"/>
+<connect gate="A" pin="!CS" pad="16"/>
+<connect gate="A" pin="!IO16" pad="4"/>
+<connect gate="A" pin="!PWDN" pad="137"/>
+<connect gate="A" pin="!RAS" pad="103"/>
+<connect gate="A" pin="!RD" pad="10"/>
+<connect gate="A" pin="!REFRESH" pad="105"/>
+<connect gate="A" pin="!RESET" pad="134"/>
+<connect gate="A" pin="!WR" pad="11"/>
+<connect gate="A" pin="A0" pad="12"/>
+<connect gate="A" pin="A1" pad="13"/>
+<connect gate="A" pin="A2" pad="15"/>
+<connect gate="A" pin="CK_OUT" pad="91"/>
+<connect gate="A" pin="IRQ" pad="14"/>
+<connect gate="A" pin="LDTEST" pad="136"/>
+<connect gate="A" pin="OVCK-OUT" pad="47"/>
+<connect gate="A" pin="RBS" pad="92"/>
+<connect gate="A" pin="READY" pad="7"/>
+<connect gate="A" pin="TEST" pad="135"/>
+<connect gate="A" pin="X1" pad="61"/>
+<connect gate="A" pin="X2" pad="62"/>
+<connect gate="B" pin="D0" pad="19"/>
+<connect gate="B" pin="D1" pad="22"/>
+<connect gate="B" pin="D10" pad="1"/>
+<connect gate="B" pin="D11" pad="144"/>
+<connect gate="B" pin="D12" pad="141"/>
+<connect gate="B" pin="D13" pad="140"/>
+<connect gate="B" pin="D14" pad="139"/>
+<connect gate="B" pin="D15" pad="138"/>
+<connect gate="B" pin="D2" pad="23"/>
+<connect gate="B" pin="D3" pad="24"/>
+<connect gate="B" pin="D4" pad="25"/>
+<connect gate="B" pin="D5" pad="26"/>
+<connect gate="B" pin="D6" pad="27"/>
+<connect gate="B" pin="D7" pad="28"/>
+<connect gate="B" pin="D8" pad="3"/>
+<connect gate="B" pin="D9" pad="2"/>
+<connect gate="C" pin="!WCS0" pad="89"/>
+<connect gate="C" pin="!WCS1" pad="90"/>
+<connect gate="C" pin="!WOE" pad="88"/>
+<connect gate="C" pin="!WWE" pad="87"/>
+<connect gate="C" pin="BCK-OUT" pad="46"/>
+<connect gate="C" pin="LFT" pad="60"/>
+<connect gate="C" pin="MIDI1_IN" pad="29"/>
+<connect gate="C" pin="MIDI1_OUT" pad="31"/>
+<connect gate="C" pin="MIDI2_IN" pad="30"/>
+<connect gate="C" pin="MIDI2_OUT" pad="32"/>
+<connect gate="C" pin="SD-IN0" pad="33"/>
+<connect gate="C" pin="SD-IN1" pad="34"/>
+<connect gate="C" pin="SD-IN2" pad="37"/>
+<connect gate="C" pin="SD-IN3" pad="38"/>
+<connect gate="C" pin="SD-IN4" pad="48"/>
+<connect gate="C" pin="SD-IN5" pad="49"/>
+<connect gate="C" pin="SD-IN6" pad="50"/>
+<connect gate="C" pin="SD-IN7" pad="53"/>
+<connect gate="C" pin="SD-OUT0" pad="39"/>
+<connect gate="C" pin="SD-OUT1" pad="40"/>
+<connect gate="C" pin="SD-OUT2" pad="43"/>
+<connect gate="C" pin="SD-OUT3" pad="44"/>
+<connect gate="C" pin="SD-OUT4" pad="54"/>
+<connect gate="C" pin="SD-OUT5" pad="55"/>
+<connect gate="C" pin="SD-OUT6" pad="56"/>
+<connect gate="C" pin="SD-OUT7" pad="57"/>
+<connect gate="C" pin="WS-OUT" pad="45"/>
+<connect gate="D" pin="WA0" pad="93"/>
+<connect gate="D" pin="WA1" pad="94"/>
+<connect gate="D" pin="WA10" pad="114"/>
+<connect gate="D" pin="WA11" pad="115"/>
+<connect gate="D" pin="WA12" pad="116"/>
+<connect gate="D" pin="WA13" pad="117"/>
+<connect gate="D" pin="WA14" pad="118"/>
+<connect gate="D" pin="WA15" pad="119"/>
+<connect gate="D" pin="WA16" pad="120"/>
+<connect gate="D" pin="WA17" pad="121"/>
+<connect gate="D" pin="WA18" pad="122"/>
+<connect gate="D" pin="WA19" pad="123"/>
+<connect gate="D" pin="WA2" pad="95"/>
+<connect gate="D" pin="WA20" pad="126"/>
+<connect gate="D" pin="WA21" pad="127"/>
+<connect gate="D" pin="WA22" pad="128"/>
+<connect gate="D" pin="WA23" pad="129"/>
+<connect gate="D" pin="WA24" pad="130"/>
+<connect gate="D" pin="WA25" pad="131"/>
+<connect gate="D" pin="WA26" pad="132"/>
+<connect gate="D" pin="WA3" pad="96"/>
+<connect gate="D" pin="WA4" pad="101"/>
+<connect gate="D" pin="WA5" pad="102"/>
+<connect gate="D" pin="WA6" pad="106"/>
+<connect gate="D" pin="WA7" pad="107"/>
+<connect gate="D" pin="WA8" pad="108"/>
+<connect gate="D" pin="WA9" pad="111"/>
+<connect gate="E" pin="WD0" pad="86"/>
+<connect gate="E" pin="WD1" pad="85"/>
+<connect gate="E" pin="WD10" pad="72"/>
+<connect gate="E" pin="WD11" pad="71"/>
+<connect gate="E" pin="WD12" pad="68"/>
+<connect gate="E" pin="WD13" pad="67"/>
+<connect gate="E" pin="WD14" pad="66"/>
+<connect gate="E" pin="WD15" pad="65"/>
+<connect gate="E" pin="WD2" pad="84"/>
+<connect gate="E" pin="WD3" pad="79"/>
+<connect gate="E" pin="WD4" pad="78"/>
+<connect gate="E" pin="WD5" pad="77"/>
+<connect gate="E" pin="WD6" pad="76"/>
+<connect gate="E" pin="WD7" pad="75"/>
+<connect gate="E" pin="WD8" pad="74"/>
+<connect gate="E" pin="WD9" pad="73"/>
+<connect gate="G1" pin="GND" pad="6"/>
+<connect gate="G10" pin="GND" pad="70"/>
+<connect gate="G11" pin="GND" pad="82"/>
+<connect gate="G12" pin="GND" pad="83"/>
+<connect gate="G13" pin="GND" pad="98"/>
+<connect gate="G14" pin="GND" pad="100"/>
+<connect gate="G15" pin="GND" pad="110"/>
+<connect gate="G16" pin="GND" pad="113"/>
+<connect gate="G17" pin="GND" pad="125"/>
+<connect gate="G18" pin="GND" pad="133"/>
+<connect gate="G19" pin="GND" pad="143"/>
+<connect gate="G2" pin="GND" pad="9"/>
+<connect gate="G3" pin="GND" pad="18"/>
+<connect gate="G4" pin="GND" pad="21"/>
+<connect gate="G5" pin="GND" pad="36"/>
+<connect gate="G6" pin="GND" pad="42"/>
+<connect gate="G7" pin="GND" pad="51"/>
+<connect gate="G8" pin="GND" pad="59"/>
+<connect gate="G9" pin="GND" pad="64"/>
+<connect gate="V1" pin="VCC1" pad="5"/>
+<connect gate="V10" pin="VCC2" pad="124"/>
+<connect gate="V11" pin="VC3" pad="8"/>
+<connect gate="V12" pin="VC3" pad="17"/>
+<connect gate="V13" pin="VC3" pad="41"/>
+<connect gate="V14" pin="VC3" pad="58"/>
+<connect gate="V15" pin="VC3" pad="63"/>
+<connect gate="V16" pin="VC3" pad="80"/>
+<connect gate="V17" pin="VC3" pad="99"/>
+<connect gate="V18" pin="VC3" pad="112"/>
+<connect gate="V2" pin="VCC1" pad="20"/>
+<connect gate="V3" pin="VCC1" pad="35"/>
+<connect gate="V4" pin="VCC1" pad="52"/>
+<connect gate="V5" pin="VCC1" pad="142"/>
+<connect gate="V6" pin="VCC2" pad="69"/>
+<connect gate="V7" pin="VCC2" pad="81"/>
+<connect gate="V8" pin="VCC2" pad="97"/>
+<connect gate="V9" pin="VCC2" pad="109"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8*C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.</description>
+<gates>
+<gate name="G$1" symbol="T8XC5121" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SSOP24">
+<connects>
+<connect gate="G$1" pin="CVCC" pad="3"/>
+<connect gate="G$1" pin="CVSS" pad="1"/>
+<connect gate="G$1" pin="DVCC" pad="22"/>
+<connect gate="G$1" pin="EVCC" pad="23"/>
+<connect gate="G$1" pin="LI" pad="2"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="9"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="8"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="7"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="6"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="5"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="4"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="19"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="16"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="18"/>
+<connect gate="G$1" pin="P3.4/T0" pad="17"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="15"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="14"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="13"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VSS" pad="21"/>
+<connect gate="G$1" pin="XTAL1" pad="12"/>
+<connect gate="G$1" pin="XTAL2" pad="11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8?C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/...doc4164.pdf</description>
+<gates>
+<gate name="G$1" symbol="T8X5121-PLCC52" x="0" y="0"/>
+</gates>
+<devices>
+<device name="3" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="5" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="9" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT8*C51SND1C" prefix="IC">
+<description>&lt;b&gt;Single-Chip Flash Microcontroller&lt;/b&gt;&lt;p&gt;
+with MP3 Decoder and Human Interface&lt;br&gt;
+Source: www.atmel.com .. doc4109.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C51SND1C" x="0" y="0"/>
+<gate name="P" symbol="P-AT89C51SND1C" x="40.64" y="-7.62" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DESL" pad="58"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0/A8" pad="78"/>
+<connect gate="G$1" pin="P2.1/A9" pad="77"/>
+<connect gate="G$1" pin="P2.2/A10" pad="71"/>
+<connect gate="G$1" pin="P2.3/A11" pad="70"/>
+<connect gate="G$1" pin="P2.4/A12" pad="69"/>
+<connect gate="G$1" pin="P2.5/A13" pad="68"/>
+<connect gate="G$1" pin="P2.6/A14" pad="67"/>
+<connect gate="G$1" pin="P2.7/A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+<connect gate="P" pin="PVDD" pad="23"/>
+<connect gate="P" pin="PVSS" pad="25"/>
+<connect gate="P" pin="UVDD" pad="31"/>
+<connect gate="P" pin="UVSS" pad="32"/>
+<connect gate="P" pin="VDD@1" pad="1"/>
+<connect gate="P" pin="VDD@2" pad="22"/>
+<connect gate="P" pin="VDD@3" pad="35"/>
+<connect gate="P" pin="VDD@4" pad="54"/>
+<connect gate="P" pin="VDD@5" pad="64"/>
+<connect gate="P" pin="VSS@1" pad="2"/>
+<connect gate="P" pin="VSS@2" pad="26"/>
+<connect gate="P" pin="VSS@3" pad="36"/>
+<connect gate="P" pin="VSS@4" pad="55"/>
+<connect gate="P" pin="VSS@5" pad="65"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-RO" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DESL" pad="45"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0/A8" pad="64"/>
+<connect gate="G$1" pin="P2.1/A9" pad="63"/>
+<connect gate="G$1" pin="P2.2/A10" pad="58"/>
+<connect gate="G$1" pin="P2.3/A11" pad="57"/>
+<connect gate="G$1" pin="P2.4/A12" pad="56"/>
+<connect gate="G$1" pin="P2.5/A13" pad="55"/>
+<connect gate="G$1" pin="P2.6/A14" pad="54"/>
+<connect gate="G$1" pin="P2.7/A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+<connect gate="P" pin="PVDD" pad="51"/>
+<connect gate="P" pin="PVSS" pad="14"/>
+<connect gate="P" pin="UVDD" pad="19"/>
+<connect gate="P" pin="UVSS" pad="20"/>
+<connect gate="P" pin="VDD@1" pad="11"/>
+<connect gate="P" pin="VDD@2" pad="12"/>
+<connect gate="P" pin="VDD@3" pad="23"/>
+<connect gate="P" pin="VDD@4" pad="41"/>
+<connect gate="P" pin="VDD@5" pad="71"/>
+<connect gate="P" pin="VSS@1" pad="15"/>
+<connect gate="P" pin="VSS@2" pad="24"/>
+<connect gate="P" pin="VSS@3" pad="42"/>
+<connect gate="P" pin="VSS@4" pad="52"/>
+<connect gate="P" pin="VSS@5" pad="72"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-7H" package="BGA81">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="B2"/>
+<connect gate="G$1" pin="!TST" pad="G2"/>
+<connect gate="G$1" pin="AIN0" pad="H5"/>
+<connect gate="G$1" pin="AIN1" pad="H7"/>
+<connect gate="G$1" pin="ALE" pad="A1"/>
+<connect gate="G$1" pin="AREFN" pad="J6"/>
+<connect gate="G$1" pin="AREFP" pad="J7"/>
+<connect gate="G$1" pin="AVDD" pad="F5"/>
+<connect gate="G$1" pin="AVSS" pad="H6"/>
+<connect gate="G$1" pin="D+" pad="J1"/>
+<connect gate="G$1" pin="D-" pad="H2"/>
+<connect gate="G$1" pin="DCLK" pad="H9"/>
+<connect gate="G$1" pin="DESL" pad="G9"/>
+<connect gate="G$1" pin="DOUT" pad="G7"/>
+<connect gate="G$1" pin="FILT" pad="E4"/>
+<connect gate="G$1" pin="MCLK" pad="F7"/>
+<connect gate="G$1" pin="MCMD" pad="F8"/>
+<connect gate="G$1" pin="MDAT" pad="F6"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="B3"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="B5"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="A4"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="A3"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="B4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="D5"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="C6"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="D6"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="C3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="B1"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="C1"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="C2"/>
+<connect gate="G$1" pin="P1.4" pad="D1"/>
+<connect gate="G$1" pin="P1.5" pad="D2"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="D4"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="D3"/>
+<connect gate="G$1" pin="P2.0/A8" pad="A8"/>
+<connect gate="G$1" pin="P2.1/A9" pad="C7"/>
+<connect gate="G$1" pin="P2.2/A10" pad="C8"/>
+<connect gate="G$1" pin="P2.3/A11" pad="E8"/>
+<connect gate="G$1" pin="P2.4/A12" pad="D9"/>
+<connect gate="G$1" pin="P2.5/A13" pad="C9"/>
+<connect gate="G$1" pin="P2.6/A14" pad="D8"/>
+<connect gate="G$1" pin="P2.7/A15" pad="E6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="J3"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="H3"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="J4"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="H4"/>
+<connect gate="G$1" pin="P3.4/T0" pad="F4"/>
+<connect gate="G$1" pin="P3.5/T1" pad="G4"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="J5"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="G5"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="A7"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="B7"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="A6"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="B6"/>
+<connect gate="G$1" pin="P4.4" pad="B9"/>
+<connect gate="G$1" pin="P4.5" pad="D7"/>
+<connect gate="G$1" pin="P4.6" pad="A9"/>
+<connect gate="G$1" pin="P4.7" pad="B8"/>
+<connect gate="G$1" pin="P5.0" pad="A2"/>
+<connect gate="G$1" pin="P5.1" pad="C4"/>
+<connect gate="G$1" pin="P5.2" pad="J8"/>
+<connect gate="G$1" pin="P5.3" pad="G6"/>
+<connect gate="G$1" pin="RST" pad="F9"/>
+<connect gate="G$1" pin="SCLK" pad="G8"/>
+<connect gate="G$1" pin="X1" pad="E2"/>
+<connect gate="G$1" pin="X2" pad="F1"/>
+<connect gate="P" pin="PVDD" pad="E3"/>
+<connect gate="P" pin="PVSS" pad="F2"/>
+<connect gate="P" pin="UVDD" pad="H1"/>
+<connect gate="P" pin="UVSS" pad="F3"/>
+<connect gate="P" pin="VDD@1" pad="A5"/>
+<connect gate="P" pin="VDD@2" pad="E1"/>
+<connect gate="P" pin="VDD@3" pad="E9"/>
+<connect gate="P" pin="VDD@4" pad="G3"/>
+<connect gate="P" pin="VDD@5" pad="J9"/>
+<connect gate="P" pin="VSS@1" pad="C5"/>
+<connect gate="P" pin="VSS@2" pad="E7"/>
+<connect gate="P" pin="VSS@3" pad="G1"/>
+<connect gate="P" pin="VSS@4" pad="H8"/>
+<connect gate="P" pin="VSS@5" pad="J2"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PC" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="31"/>
+<connect gate="G$1" pin="!PSEN" pad="29"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0" pad="1"/>
+<connect gate="G$1" pin="P1.1" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="10"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="11"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="17"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="JC" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="35"/>
+<connect gate="G$1" pin="!PSEN" pad="32"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0" pad="2"/>
+<connect gate="G$1" pin="P1.1" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="14"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="19"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51RE2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1455062" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3857" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-RLTUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095726" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1802" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51?*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="always"/>
+</gates>
+<devices>
+<device name="AC" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="QC" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="P" symbol="AT89S51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="31"/>
+<connect gate="P" pin="!PSEN" pad="29"/>
+<connect gate="P" pin="ALE/!PROG" pad="30"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="P0.0_AD0" pad="39"/>
+<connect gate="P" pin="P0.1_AD1" pad="38"/>
+<connect gate="P" pin="P0.2_AD2" pad="37"/>
+<connect gate="P" pin="P0.3_AD3" pad="36"/>
+<connect gate="P" pin="P0.4_AD4" pad="35"/>
+<connect gate="P" pin="P0.5_AD5" pad="34"/>
+<connect gate="P" pin="P0.6_AD6" pad="33"/>
+<connect gate="P" pin="P0.7_AD7" pad="32"/>
+<connect gate="P" pin="P1.0" pad="1"/>
+<connect gate="P" pin="P1.1" pad="2"/>
+<connect gate="P" pin="P1.2" pad="3"/>
+<connect gate="P" pin="P1.3" pad="4"/>
+<connect gate="P" pin="P1.4" pad="5"/>
+<connect gate="P" pin="P1.5_MOSI" pad="6"/>
+<connect gate="P" pin="P1.6_MISO" pad="7"/>
+<connect gate="P" pin="P1.7_SCK" pad="8"/>
+<connect gate="P" pin="P2.0_A8" pad="21"/>
+<connect gate="P" pin="P2.1_A9" pad="22"/>
+<connect gate="P" pin="P2.2_A10" pad="23"/>
+<connect gate="P" pin="P2.3_A11" pad="24"/>
+<connect gate="P" pin="P2.4_A12" pad="25"/>
+<connect gate="P" pin="P2.5_A13" pad="26"/>
+<connect gate="P" pin="P2.6_A14" pad="27"/>
+<connect gate="P" pin="P2.7_A15" pad="28"/>
+<connect gate="P" pin="P3.0/RXD" pad="10"/>
+<connect gate="P" pin="P3.1/TXD" pad="11"/>
+<connect gate="P" pin="P3.2/!INT0" pad="12"/>
+<connect gate="P" pin="P3.3/!INT1" pad="13"/>
+<connect gate="P" pin="P3.4/T0" pad="14"/>
+<connect gate="P" pin="P3.5/T1" pad="15"/>
+<connect gate="P" pin="P3.6/!WR" pad="16"/>
+<connect gate="P" pin="P3.7/!RD" pad="17"/>
+<connect gate="P" pin="RST" pad="9"/>
+<connect gate="P" pin="VCC" pad="40"/>
+<connect gate="P" pin="XTAL1" pad="19"/>
+<connect gate="P" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6577" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="S44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51*P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89S51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5_MOSI" pad="1"/>
+<connect gate="G$1" pin="P1.6_MISO" pad="2"/>
+<connect gate="G$1" pin="P1.7_SCK" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-?IM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02" x="0" y="0"/>
+</gates>
+<devices>
+<device name="TIS" package="SO28W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SIS" package="PLCC28">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="RAT" package="VQFP32">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="27"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="26"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="25"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="24"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="23"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="22"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="21"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="20"/>
+<connect gate="G$1" pin="P2.0" pad="19"/>
+<connect gate="G$1" pin="P2.1" pad="2"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="6"/>
+<connect gate="G$1" pin="P3.5/T1" pad="5"/>
+<connect gate="G$1" pin="P3.6" pad="4"/>
+<connect gate="G$1" pin="P3.7" pad="3"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="1"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="32"/>
+<connect gate="G$1" pin="RST" pad="17"/>
+<connect gate="G$1" pin="VAGND" pad="29"/>
+<connect gate="G$1" pin="VAREF" pad="28"/>
+<connect gate="G$1" pin="VAVCC" pad="31"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="G$1" pin="VSS" pad="16"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-TDSIM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02-SO24" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SO24W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="24"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="23"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="22"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="21"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="20"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="19"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="18"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="17"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="7"/>
+<connect gate="G$1" pin="P3.5/T1" pad="6"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="16"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91RM9200" prefix="IC">
+<description>Auto generated by &lt;b&gt;make-symbol-device-package(bsdl).ulp&lt;/b&gt;&lt;p&gt;
+Source: at91rm9200_bga.bsd</description>
+<gates>
+<gate name="G$1" symbol="AT91RM9200_BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LFBGA256_A_291X326">
+<connects>
+<connect gate="G$1" pin="A10_SDRAM" pad="N6"/>
+<connect gate="G$1" pin="A16_BA0" pad="U3"/>
+<connect gate="G$1" pin="A17_BA1" pad="T3"/>
+<connect gate="G$1" pin="A1_DQM2" pad="M4"/>
+<connect gate="G$1" pin="A_10" pad="M5"/>
+<connect gate="G$1" pin="A_11" pad="P5"/>
+<connect gate="G$1" pin="A_12" pad="P3"/>
+<connect gate="G$1" pin="A_13" pad="P2"/>
+<connect gate="G$1" pin="A_14" pad="N5"/>
+<connect gate="G$1" pin="A_15" pad="T1"/>
+<connect gate="G$1" pin="A_18" pad="R3"/>
+<connect gate="G$1" pin="A_19" pad="U4"/>
+<connect gate="G$1" pin="A_2" pad="M6"/>
+<connect gate="G$1" pin="A_20" pad="R4"/>
+<connect gate="G$1" pin="A_21" pad="N8"/>
+<connect gate="G$1" pin="A_22" pad="P6"/>
+<connect gate="G$1" pin="A_3" pad="M3"/>
+<connect gate="G$1" pin="A_4" pad="N4"/>
+<connect gate="G$1" pin="A_5" pad="N2"/>
+<connect gate="G$1" pin="A_6" pad="L4"/>
+<connect gate="G$1" pin="A_7" pad="P1"/>
+<connect gate="G$1" pin="A_8" pad="N7"/>
+<connect gate="G$1" pin="A_9" pad="N3"/>
+<connect gate="G$1" pin="CAS" pad="U8"/>
+<connect gate="G$1" pin="DM" pad="K2"/>
+<connect gate="G$1" pin="DP" pad="K5"/>
+<connect gate="G$1" pin="D_0" pad="R9"/>
+<connect gate="G$1" pin="D_1" pad="P10"/>
+<connect gate="G$1" pin="D_10" pad="P12"/>
+<connect gate="G$1" pin="D_11" pad="U12"/>
+<connect gate="G$1" pin="D_12" pad="T12"/>
+<connect gate="G$1" pin="D_13" pad="R12"/>
+<connect gate="G$1" pin="D_14" pad="U13"/>
+<connect gate="G$1" pin="D_15" pad="P13"/>
+<connect gate="G$1" pin="D_2" pad="N11"/>
+<connect gate="G$1" pin="D_3" pad="U9"/>
+<connect gate="G$1" pin="D_4" pad="M11"/>
+<connect gate="G$1" pin="D_5" pad="P11"/>
+<connect gate="G$1" pin="D_6" pad="U10"/>
+<connect gate="G$1" pin="D_7" pad="U11"/>
+<connect gate="G$1" pin="D_8" pad="R11"/>
+<connect gate="G$1" pin="D_9" pad="T11"/>
+<connect gate="G$1" pin="HDMA" pad="K3"/>
+<connect gate="G$1" pin="HDMB" pad="L3"/>
+<connect gate="G$1" pin="HDPA" pad="K1"/>
+<connect gate="G$1" pin="HDPB" pad="L2"/>
+<connect gate="G$1" pin="ICETCK" pad="E5"/>
+<connect gate="G$1" pin="ICETDI" pad="A1"/>
+<connect gate="G$1" pin="ICETDO" pad="B1"/>
+<connect gate="G$1" pin="ICETMS" pad="C1"/>
+<connect gate="G$1" pin="JTAGSEL" pad="A2"/>
+<connect gate="G$1" pin="MIX33VDD@1" pad="P16"/>
+<connect gate="G$1" pin="MIX33VDD@10" pad="D5"/>
+<connect gate="G$1" pin="MIX33VDD@11" pad="D2"/>
+<connect gate="G$1" pin="MIX33VDD@12" pad="D3"/>
+<connect gate="G$1" pin="MIX33VDD@13" pad="H5"/>
+<connect gate="G$1" pin="MIX33VDD@14" pad="K4"/>
+<connect gate="G$1" pin="MIX33VDD@15" pad="L6"/>
+<connect gate="G$1" pin="MIX33VDD@16" pad="M1"/>
+<connect gate="G$1" pin="MIX33VDD@17" pad="P4"/>
+<connect gate="G$1" pin="MIX33VDD@18" pad="R6"/>
+<connect gate="G$1" pin="MIX33VDD@19" pad="T5"/>
+<connect gate="G$1" pin="MIX33VDD@2" pad="R17"/>
+<connect gate="G$1" pin="MIX33VDD@20" pad="R10"/>
+<connect gate="G$1" pin="MIX33VDD@21" pad="R14"/>
+<connect gate="G$1" pin="MIX33VDD@3" pad="K16"/>
+<connect gate="G$1" pin="MIX33VDD@4" pad="H14"/>
+<connect gate="G$1" pin="MIX33VDD@5" pad="A16"/>
+<connect gate="G$1" pin="MIX33VDD@6" pad="A11"/>
+<connect gate="G$1" pin="MIX33VDD@7" pad="B11"/>
+<connect gate="G$1" pin="MIX33VDD@8" pad="D8"/>
+<connect gate="G$1" pin="MIX33VDD@9" pad="A7"/>
+<connect gate="G$1" pin="MIX33VSS@1" pad="M12"/>
+<connect gate="G$1" pin="MIX33VSS@10" pad="E6"/>
+<connect gate="G$1" pin="MIX33VSS@11" pad="D4"/>
+<connect gate="G$1" pin="MIX33VSS@12" pad="E3"/>
+<connect gate="G$1" pin="MIX33VSS@13" pad="G3"/>
+<connect gate="G$1" pin="MIX33VSS@14" pad="L1"/>
+<connect gate="G$1" pin="MIX33VSS@15" pad="L5"/>
+<connect gate="G$1" pin="MIX33VSS@16" pad="M2"/>
+<connect gate="G$1" pin="MIX33VSS@17" pad="R1"/>
+<connect gate="G$1" pin="MIX33VSS@18" pad="M7"/>
+<connect gate="G$1" pin="MIX33VSS@19" pad="U5"/>
+<connect gate="G$1" pin="MIX33VSS@2" pad="P17"/>
+<connect gate="G$1" pin="MIX33VSS@20" pad="T9"/>
+<connect gate="G$1" pin="MIX33VSS@21" pad="T13"/>
+<connect gate="G$1" pin="MIX33VSS@3" pad="J12"/>
+<connect gate="G$1" pin="MIX33VSS@4" pad="H16"/>
+<connect gate="G$1" pin="MIX33VSS@5" pad="C15"/>
+<connect gate="G$1" pin="MIX33VSS@6" pad="C11"/>
+<connect gate="G$1" pin="MIX33VSS@7" pad="D11"/>
+<connect gate="G$1" pin="MIX33VSS@8" pad="B7"/>
+<connect gate="G$1" pin="MIX33VSS@9" pad="E8"/>
+<connect gate="G$1" pin="NBS3" pad="R8"/>
+<connect gate="G$1" pin="NCS0_BFCS" pad="U6"/>
+<connect gate="G$1" pin="NCS1_SDCS" pad="M9"/>
+<connect gate="G$1" pin="NCS2" pad="T6"/>
+<connect gate="G$1" pin="NCS3" pad="R7"/>
+<connect gate="G$1" pin="NLBA0_DQM0" pad="N1"/>
+<connect gate="G$1" pin="NRDNOE" pad="N9"/>
+<connect gate="G$1" pin="NRST" pad="E1"/>
+<connect gate="G$1" pin="NRW0NWE" pad="P8"/>
+<connect gate="G$1" pin="NRW1_NUB_DQM1" pad="T7"/>
+<connect gate="G$1" pin="NTRST" pad="E2"/>
+<connect gate="G$1" pin="OSC32K_XIN" pad="G17"/>
+<connect gate="G$1" pin="OSC32K_XOUT" pad="H17"/>
+<connect gate="G$1" pin="OSC9M_XIN" pad="J17"/>
+<connect gate="G$1" pin="OSC9M_XOUT" pad="K17"/>
+<connect gate="G$1" pin="PA0" pad="G13"/>
+<connect gate="G$1" pin="PA1" pad="G14"/>
+<connect gate="G$1" pin="PA10" pad="D15"/>
+<connect gate="G$1" pin="PA11" pad="B15"/>
+<connect gate="G$1" pin="PA12" pad="B16"/>
+<connect gate="G$1" pin="PA13" pad="A17"/>
+<connect gate="G$1" pin="PA14" pad="A15"/>
+<connect gate="G$1" pin="PA15" pad="B14"/>
+<connect gate="G$1" pin="PA16" pad="D14"/>
+<connect gate="G$1" pin="PA17" pad="B13"/>
+<connect gate="G$1" pin="PA18" pad="C13"/>
+<connect gate="G$1" pin="PA19" pad="A13"/>
+<connect gate="G$1" pin="PA2" pad="G15"/>
+<connect gate="G$1" pin="PA20" pad="C12"/>
+<connect gate="G$1" pin="PA21" pad="D13"/>
+<connect gate="G$1" pin="PA22" pad="D12"/>
+<connect gate="G$1" pin="PA23" pad="A12"/>
+<connect gate="G$1" pin="PA24" pad="B12"/>
+<connect gate="G$1" pin="PA25" pad="E13"/>
+<connect gate="G$1" pin="PA26" pad="E12"/>
+<connect gate="G$1" pin="PA27" pad="G12"/>
+<connect gate="G$1" pin="PA28" pad="F12"/>
+<connect gate="G$1" pin="PA29" pad="E11"/>
+<connect gate="G$1" pin="PA3" pad="G16"/>
+<connect gate="G$1" pin="PA30" pad="F11"/>
+<connect gate="G$1" pin="PA31" pad="A10"/>
+<connect gate="G$1" pin="PA4" pad="F13"/>
+<connect gate="G$1" pin="PA5" pad="F16"/>
+<connect gate="G$1" pin="PA6" pad="E15"/>
+<connect gate="G$1" pin="PA7" pad="B17"/>
+<connect gate="G$1" pin="PA8" pad="C16"/>
+<connect gate="G$1" pin="PA9" pad="E14"/>
+<connect gate="G$1" pin="PB0" pad="B10"/>
+<connect gate="G$1" pin="PB1" pad="C10"/>
+<connect gate="G$1" pin="PB10" pad="B8"/>
+<connect gate="G$1" pin="PB11" pad="F9"/>
+<connect gate="G$1" pin="PB12" pad="C8"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="D7"/>
+<connect gate="G$1" pin="PB15" pad="E7"/>
+<connect gate="G$1" pin="PB16" pad="F7"/>
+<connect gate="G$1" pin="PB17" pad="A4"/>
+<connect gate="G$1" pin="PB18" pad="B3"/>
+<connect gate="G$1" pin="PB19" pad="C5"/>
+<connect gate="G$1" pin="PB2" pad="D10"/>
+<connect gate="G$1" pin="PB20" pad="A3"/>
+<connect gate="G$1" pin="PB21" pad="B4"/>
+<connect gate="G$1" pin="PB22" pad="C4"/>
+<connect gate="G$1" pin="PB23" pad="F3"/>
+<connect gate="G$1" pin="PB24" pad="F5"/>
+<connect gate="G$1" pin="PB25" pad="F4"/>
+<connect gate="G$1" pin="PB26" pad="G4"/>
+<connect gate="G$1" pin="PB27" pad="G6"/>
+<connect gate="G$1" pin="PB28" pad="J5"/>
+<connect gate="G$1" pin="PB29" pad="J6"/>
+<connect gate="G$1" pin="PB3" pad="E10"/>
+<connect gate="G$1" pin="PB4" pad="A9"/>
+<connect gate="G$1" pin="PB5" pad="B9"/>
+<connect gate="G$1" pin="PB6" pad="C9"/>
+<connect gate="G$1" pin="PB7" pad="E9"/>
+<connect gate="G$1" pin="PB8" pad="D9"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PC0" pad="M15"/>
+<connect gate="G$1" pin="PC1" pad="M14"/>
+<connect gate="G$1" pin="PC10" pad="L12"/>
+<connect gate="G$1" pin="PC11" pad="N16"/>
+<connect gate="G$1" pin="PC12" pad="N17"/>
+<connect gate="G$1" pin="PC13" pad="M13"/>
+<connect gate="G$1" pin="PC14" pad="M17"/>
+<connect gate="G$1" pin="PC15" pad="L13"/>
+<connect gate="G$1" pin="PC16" pad="U14"/>
+<connect gate="G$1" pin="PC17" pad="R13"/>
+<connect gate="G$1" pin="PC18" pad="U15"/>
+<connect gate="G$1" pin="PC19" pad="T14"/>
+<connect gate="G$1" pin="PC2" pad="L14"/>
+<connect gate="G$1" pin="PC20" pad="U16"/>
+<connect gate="G$1" pin="PC21" pad="T15"/>
+<connect gate="G$1" pin="PC22" pad="U17"/>
+<connect gate="G$1" pin="PC23" pad="T16"/>
+<connect gate="G$1" pin="PC24" pad="R15"/>
+<connect gate="G$1" pin="PC25" pad="T17"/>
+<connect gate="G$1" pin="PC26" pad="P14"/>
+<connect gate="G$1" pin="PC27" pad="P15"/>
+<connect gate="G$1" pin="PC28" pad="N13"/>
+<connect gate="G$1" pin="PC29" pad="R16"/>
+<connect gate="G$1" pin="PC3" pad="L15"/>
+<connect gate="G$1" pin="PC30" pad="N15"/>
+<connect gate="G$1" pin="PC31" pad="N14"/>
+<connect gate="G$1" pin="PC4" pad="K14"/>
+<connect gate="G$1" pin="PC5" pad="K13"/>
+<connect gate="G$1" pin="PC6" pad="K15"/>
+<connect gate="G$1" pin="PC7" pad="T4"/>
+<connect gate="G$1" pin="PC8" pad="R5"/>
+<connect gate="G$1" pin="PC9" pad="P7"/>
+<connect gate="G$1" pin="PD0" pad="E17"/>
+<connect gate="G$1" pin="PD1" pad="F15"/>
+<connect gate="G$1" pin="PD10" pad="C6"/>
+<connect gate="G$1" pin="PD11" pad="A5"/>
+<connect gate="G$1" pin="PD12" pad="B5"/>
+<connect gate="G$1" pin="PD13" pad="B2"/>
+<connect gate="G$1" pin="PD14" pad="C3"/>
+<connect gate="G$1" pin="PD15" pad="C2"/>
+<connect gate="G$1" pin="PD16" pad="F1"/>
+<connect gate="G$1" pin="PD17" pad="G2"/>
+<connect gate="G$1" pin="PD18" pad="G5"/>
+<connect gate="G$1" pin="PD19" pad="G1"/>
+<connect gate="G$1" pin="PD2" pad="F14"/>
+<connect gate="G$1" pin="PD20" pad="H2"/>
+<connect gate="G$1" pin="PD21" pad="H4"/>
+<connect gate="G$1" pin="PD22" pad="H3"/>
+<connect gate="G$1" pin="PD23" pad="H1"/>
+<connect gate="G$1" pin="PD24" pad="J3"/>
+<connect gate="G$1" pin="PD25" pad="J1"/>
+<connect gate="G$1" pin="PD26" pad="J4"/>
+<connect gate="G$1" pin="PD27" pad="J2"/>
+<connect gate="G$1" pin="PD3" pad="E16"/>
+<connect gate="G$1" pin="PD4" pad="D17"/>
+<connect gate="G$1" pin="PD5" pad="C17"/>
+<connect gate="G$1" pin="PD6" pad="D16"/>
+<connect gate="G$1" pin="PD7" pad="D6"/>
+<connect gate="G$1" pin="PD8" pad="A6"/>
+<connect gate="G$1" pin="PD9" pad="B6"/>
+<connect gate="G$1" pin="PLL_A_RC" pad="L17"/>
+<connect gate="G$1" pin="PLL_B_RC" pad="F17"/>
+<connect gate="G$1" pin="RAS" pad="N10"/>
+<connect gate="G$1" pin="SDRAMCKE" pad="P9"/>
+<connect gate="G$1" pin="SDRAMCLK" pad="U7"/>
+<connect gate="G$1" pin="TST0" pad="E4"/>
+<connect gate="G$1" pin="TST1" pad="D1"/>
+<connect gate="G$1" pin="VDDI@1" pad="L16"/>
+<connect gate="G$1" pin="VDDI@2" pad="C14"/>
+<connect gate="G$1" pin="VDDI@3" pad="F6"/>
+<connect gate="G$1" pin="VDDI@4" pad="U1"/>
+<connect gate="G$1" pin="VDDI@5" pad="T2"/>
+<connect gate="G$1" pin="VDDI@6" pad="T10"/>
+<connect gate="G$1" pin="VDDI@7" pad="J15"/>
+<connect gate="G$1" pin="VDDI@8" pad="J14"/>
+<connect gate="G$1" pin="VDDI@9" pad="H13"/>
+<connect gate="G$1" pin="VSSI@1" pad="M16"/>
+<connect gate="G$1" pin="VSSI@2" pad="A14"/>
+<connect gate="G$1" pin="VSSI@3" pad="F2"/>
+<connect gate="G$1" pin="VSSI@4" pad="U2"/>
+<connect gate="G$1" pin="VSSI@5" pad="R2"/>
+<connect gate="G$1" pin="VSSI@6" pad="N12"/>
+<connect gate="G$1" pin="VSSI@7" pad="J16"/>
+<connect gate="G$1" pin="VSSI@8" pad="J13"/>
+<connect gate="G$1" pin="VSSI@9" pad="H15"/>
+<connect gate="G$1" pin="WE" pad="T8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91RM9200-EK" constant="no"/>
+<attribute name="OC_FARNELL" value="1629536" constant="no"/>
+<attribute name="OC_NEWARK" value="02P6234" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATF16V8B" prefix="IC">
+<description>&lt;b&gt;High perfomance CMOS (electrically erasable) programmable logic device (PLD)&lt;/b&gt;&lt;p&gt;
+ABLE-Atmel-ABEL - P18V8R, P16V8C, P16V8AS, P17V8&lt;br&gt;
+COPL Atmel-WinCUPL - G16V8MS, G16V8MA, G16V8AS, G16V8&lt;br&gt;
+LOG/IC - GAL16V8_R, GAL16V8_G7, GAL16V8_C), GAL16V8&lt;br&gt;
+Tango-PLD - G16V8R, G16V8C, G16V8AS, G16V8&lt;br&gt;
+
+
+Source: http://www.atmel.com/dyn/resources/prod_documents/DOC0364.PDF</description>
+<gates>
+<gate name="G$1" symbol="ATF16V8B" x="0" y="0"/>
+</gates>
+<devices>
+<device name="X" package="TSSOP20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551767" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6253" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P3" package="DIL20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551768" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6254" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="-MI" package="MLF32">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-AI" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171371" constant="no"/>
+<attribute name="OC_NEWARK" value="73M8863" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 4-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="8"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="14"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="15"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="16"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="17"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="18"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="19"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="9"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="10"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="1"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="2"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="3"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="4"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="5"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="6"/>
+<connect gate="G$1" pin="PD5(T1)" pad="11"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="13"/>
+<connect gate="G$1" pin="VCC@1" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455107" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6885" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171274" constant="no"/>
+<attribute name="OC_NEWARK" value="69K6677" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1661729" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1794" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171355" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6899" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171118" constant="no"/>
+<attribute name="OC_NEWARK" value="95K7364" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA169PV-8AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1617046" constant="no"/>
+<attribute name="OC_NEWARK" value="03P4011" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA1284" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+16 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA1284" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171410" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6904" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="16"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="35"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="33"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="32"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562625" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6261" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-7" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="14"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="31"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="30"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="29"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171401" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6905" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1528437" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6908" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="GND1" pad="12"/>
+<connect gate="G$1" pin="GND2" pad="24"/>
+<connect gate="G$1" pin="GND@1" pad="34"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="25"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="11"/>
+<connect gate="G$1" pin="VCC1" pad="23"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562626" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6263" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/OC0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/INT2)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171444" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6909" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C513*-" prefix="IC">
+<description>&lt;b&gt;8-bit Flash Microcontroller with Full Speed USB Device&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4136.pdf&lt;p&gt;
+&lt;b&gt;&lt;i&gt;Data sheet mistake:&lt;/i&gt; &lt;/b&gt;define Packge type pin description for MLF48 but Order Number for QFN32 !?</description>
+<gates>
+<gate name="G$1" symbol="AT89C5131" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="26"/>
+<connect gate="G$1" pin="!PSEN" pad="28"/>
+<connect gate="G$1" pin="!RST" pad="43"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="AVDD" pad="17"/>
+<connect gate="G$1" pin="AVSS" pad="19"/>
+<connect gate="G$1" pin="D+" pad="23"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="FREV" pad="24"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="52"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="45"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="44"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="42"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="47"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="48"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="49"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="50"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="51"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="4"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="5"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="6"/>
+<connect gate="G$1" pin="P2.0_A8" pad="1"/>
+<connect gate="G$1" pin="P2.1_A9" pad="2"/>
+<connect gate="G$1" pin="P2.2_A10" pad="3"/>
+<connect gate="G$1" pin="P2.3_A11" pad="9"/>
+<connect gate="G$1" pin="P2.4_A12" pad="10"/>
+<connect gate="G$1" pin="P2.5_A13" pad="11"/>
+<connect gate="G$1" pin="P2.6_A14" pad="14"/>
+<connect gate="G$1" pin="P2.7_A15" pad="15"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="29"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="30"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="31"/>
+<connect gate="G$1" pin="P3.4/T0" pad="32"/>
+<connect gate="G$1" pin="P3.5/T1" pad="33"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="7"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="8"/>
+<connect gate="G$1" pin="PLLF" pad="21"/>
+<connect gate="G$1" pin="VDD" pad="16"/>
+<connect gate="G$1" pin="VSS" pad="41"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C5131A-S3SUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095721" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6570" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="VQFP64">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="24"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="!RST" pad="44"/>
+<connect gate="G$1" pin="ALE" pad="25"/>
+<connect gate="G$1" pin="AVDD" pad="10"/>
+<connect gate="G$1" pin="AVSS" pad="12"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="20"/>
+<connect gate="G$1" pin="FREV" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="55"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="46"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="45"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="43"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="50"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="51"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="52"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="53"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="54"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="59"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="60"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="61"/>
+<connect gate="G$1" pin="P2.0_A8" pad="56"/>
+<connect gate="G$1" pin="P2.1_A9" pad="57"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="2"/>
+<connect gate="G$1" pin="P2.4_A12" pad="3"/>
+<connect gate="G$1" pin="P2.5_A13" pad="4"/>
+<connect gate="G$1" pin="P2.6_A14" pad="7"/>
+<connect gate="G$1" pin="P2.7_A15" pad="8"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="27"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="28"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="29"/>
+<connect gate="G$1" pin="P3.4/T0" pad="30"/>
+<connect gate="G$1" pin="P3.5/T1" pad="31"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="62"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="63"/>
+<connect gate="G$1" pin="PLLF" pad="19"/>
+<connect gate="G$1" pin="VDD" pad="9"/>
+<connect gate="G$1" pin="VSS" pad="42"/>
+<connect gate="G$1" pin="XTAL1" pad="6"/>
+<connect gate="G$1" pin="XTAL2" pad="5"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C5132" prefix="IC">
+<description>&lt;b&gt;USB Microcontroller with 64K Bytes Flash Memory&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4173.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C5132" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="DSEL" pad="45"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0_A8" pad="64"/>
+<connect gate="G$1" pin="P2.1_A9" pad="63"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="57"/>
+<connect gate="G$1" pin="P2.4_A12" pad="56"/>
+<connect gate="G$1" pin="P2.5_A13" pad="55"/>
+<connect gate="G$1" pin="P2.6_A14" pad="54"/>
+<connect gate="G$1" pin="P2.7_A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="PVDD" pad="12"/>
+<connect gate="G$1" pin="PVSS" pad="14"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="UVDD" pad="19"/>
+<connect gate="G$1" pin="UVSS" pad="20"/>
+<connect gate="G$1" pin="VDD" pad="11"/>
+<connect gate="G$1" pin="VDD@1" pad="23"/>
+<connect gate="G$1" pin="VDD@2" pad="41"/>
+<connect gate="G$1" pin="VDD@3" pad="51"/>
+<connect gate="G$1" pin="VDD@4" pad="71"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="VSS@1" pad="24"/>
+<connect gate="G$1" pin="VSS@2" pad="42"/>
+<connect gate="G$1" pin="VSS@3" pad="52"/>
+<connect gate="G$1" pin="VSS@4" pad="72"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="DEVELOP" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="DSEL" pad="58"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0_A8" pad="78"/>
+<connect gate="G$1" pin="P2.1_A9" pad="77"/>
+<connect gate="G$1" pin="P2.2_A10" pad="71"/>
+<connect gate="G$1" pin="P2.3_A11" pad="70"/>
+<connect gate="G$1" pin="P2.4_A12" pad="69"/>
+<connect gate="G$1" pin="P2.5_A13" pad="68"/>
+<connect gate="G$1" pin="P2.6_A14" pad="67"/>
+<connect gate="G$1" pin="P2.7_A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="PVDD" pad="23"/>
+<connect gate="G$1" pin="PVSS" pad="25"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="UVDD" pad="31"/>
+<connect gate="G$1" pin="UVSS" pad="32"/>
+<connect gate="G$1" pin="VDD" pad="1"/>
+<connect gate="G$1" pin="VDD@1" pad="22"/>
+<connect gate="G$1" pin="VDD@2" pad="35"/>
+<connect gate="G$1" pin="VDD@3" pad="54"/>
+<connect gate="G$1" pin="VDD@4" pad="64"/>
+<connect gate="G$1" pin="VSS" pad="2"/>
+<connect gate="G$1" pin="VSS@1" pad="26"/>
+<connect gate="G$1" pin="VSS@2" pad="36"/>
+<connect gate="G$1" pin="VSS@3" pad="55"/>
+<connect gate="G$1" pin="VSS@4" pad="65"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-MI" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O_MI" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A_M" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455097" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535_M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*-M" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455123" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3748" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="QFN44ML8X8">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748529" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5637" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644E" x="0" y="0"/>
+</gates>
+<devices>
+<device name="M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="EXP" pad="TH"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644P-20MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748528" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5636" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-AU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LQFP100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="3"/>
+<connect gate="G$1" pin="AD5" pad="4"/>
+<connect gate="G$1" pin="AD6" pad="5"/>
+<connect gate="G$1" pin="AD7" pad="6"/>
+<connect gate="G$1" pin="ADVREF" pad="1"/>
+<connect gate="G$1" pin="DDM" pad="93"/>
+<connect gate="G$1" pin="DDP" pad="94"/>
+<connect gate="G$1" pin="ERASE" pad="92"/>
+<connect gate="G$1" pin="GND@1" pad="2"/>
+<connect gate="G$1" pin="GND@2" pad="16"/>
+<connect gate="G$1" pin="GND@3" pad="32"/>
+<connect gate="G$1" pin="GND@4" pad="52"/>
+<connect gate="G$1" pin="GND@5" pad="68"/>
+<connect gate="G$1" pin="GND@6" pad="83"/>
+<connect gate="G$1" pin="GND@7" pad="96"/>
+<connect gate="G$1" pin="JTAGSEL" pad="77"/>
+<connect gate="G$1" pin="NRST" pad="57"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="81"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="82"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="18"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="19"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="20"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="21"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="22"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="23"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="24"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="25"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="26"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="86"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="47"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="49"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="50"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="55"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="56"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="59"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="60"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="73"/>
+<connect gate="G$1" pin="PA28" pad="74"/>
+<connect gate="G$1" pin="PA29" pad="75"/>
+<connect gate="G$1" pin="PA3" pad="85"/>
+<connect gate="G$1" pin="PA30" pad="80"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="88"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="89"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="90"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="91"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="13"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="14"/>
+<connect gate="G$1" pin="PB0" pad="40"/>
+<connect gate="G$1" pin="PB1" pad="41"/>
+<connect gate="G$1" pin="PB10" pad="44"/>
+<connect gate="G$1" pin="PB11" pad="45"/>
+<connect gate="G$1" pin="PB12" pad="39"/>
+<connect gate="G$1" pin="PB13" pad="30"/>
+<connect gate="G$1" pin="PB14" pad="29"/>
+<connect gate="G$1" pin="PB15" pad="35"/>
+<connect gate="G$1" pin="PB16" pad="53"/>
+<connect gate="G$1" pin="PB17" pad="36"/>
+<connect gate="G$1" pin="PB18" pad="63"/>
+<connect gate="G$1" pin="PB19" pad="64"/>
+<connect gate="G$1" pin="PB2" pad="42"/>
+<connect gate="G$1" pin="PB20" pad="65"/>
+<connect gate="G$1" pin="PB21" pad="66"/>
+<connect gate="G$1" pin="PB22" pad="67"/>
+<connect gate="G$1" pin="PB23" pad="69"/>
+<connect gate="G$1" pin="PB24" pad="70"/>
+<connect gate="G$1" pin="PB25" pad="71"/>
+<connect gate="G$1" pin="PB26" pad="72"/>
+<connect gate="G$1" pin="PB27/AD0" pad="9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="10"/>
+<connect gate="G$1" pin="PB29/AD2" pad="11"/>
+<connect gate="G$1" pin="PB3" pad="43"/>
+<connect gate="G$1" pin="PB30/AD3" pad="12"/>
+<connect gate="G$1" pin="PB4" pad="54"/>
+<connect gate="G$1" pin="PB5" pad="34"/>
+<connect gate="G$1" pin="PB6" pad="31"/>
+<connect gate="G$1" pin="PB7" pad="38"/>
+<connect gate="G$1" pin="PB8" pad="28"/>
+<connect gate="G$1" pin="PB9" pad="27"/>
+<connect gate="G$1" pin="PLLRC" pad="99"/>
+<connect gate="G$1" pin="TCK" pad="79"/>
+<connect gate="G$1" pin="TDI" pad="51"/>
+<connect gate="G$1" pin="TDO" pad="76"/>
+<connect gate="G$1" pin="TMS" pad="78"/>
+<connect gate="G$1" pin="TST" pad="58"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="15"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="37"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="62"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="87"/>
+<connect gate="G$1" pin="VDDFLASH" pad="95"/>
+<connect gate="G$1" pin="VDDIN@1" pad="8"/>
+<connect gate="G$1" pin="VDDIO@1" pad="17"/>
+<connect gate="G$1" pin="VDDIO@2" pad="33"/>
+<connect gate="G$1" pin="VDDIO@3" pad="48"/>
+<connect gate="G$1" pin="VDDIO@4" pad="61"/>
+<connect gate="G$1" pin="VDDIO@5" pad="84"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="7"/>
+<connect gate="G$1" pin="VDDPLL" pad="100"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="97"/>
+<connect gate="G$1" pin="XOUT" pad="98"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X128B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288326" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5682" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X256B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288327" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5683" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X512-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288328" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5090" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-CU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X-BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TFBGA100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="K9"/>
+<connect gate="G$1" pin="AD5" pad="K8"/>
+<connect gate="G$1" pin="AD6" pad="K7"/>
+<connect gate="G$1" pin="AD7" pad="K6"/>
+<connect gate="G$1" pin="ADVREF" pad="K10"/>
+<connect gate="G$1" pin="DDM" pad="K4"/>
+<connect gate="G$1" pin="DDP" pad="K3"/>
+<connect gate="G$1" pin="ERASE" pad="F7"/>
+<connect gate="G$1" pin="GND@1" pad="E6"/>
+<connect gate="G$1" pin="GND@2" pad="E10"/>
+<connect gate="G$1" pin="GND@3" pad="F9"/>
+<connect gate="G$1" pin="GND@4" pad="G8"/>
+<connect gate="G$1" pin="GND@5" pad="J6"/>
+<connect gate="G$1" pin="GND@6" pad="J9"/>
+<connect gate="G$1" pin="GND@7" pad="K5"/>
+<connect gate="G$1" pin="JTAGSEL" pad="H3"/>
+<connect gate="G$1" pin="NRST" pad="D3"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="J3"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="J4"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="D7"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="D10"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="C9"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="C8"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="B8"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="C10"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="B9"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="B10"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="A9"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="B2"/>
+<connect gate="G$1" pin="PA2" pad="G5"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="A3"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="A2"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="A1"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="D1"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="D2"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="E1"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="E2"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="G3"/>
+<connect gate="G$1" pin="PA28" pad="H2"/>
+<connect gate="G$1" pin="PA29" pad="J1"/>
+<connect gate="G$1" pin="PA3" pad="H4"/>
+<connect gate="G$1" pin="PA30" pad="J2"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="H5"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="G6"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="F6"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="H6"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="H8"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="H7"/>
+<connect gate="G$1" pin="PB0" pad="C5"/>
+<connect gate="G$1" pin="PB1" pad="A4"/>
+<connect gate="G$1" pin="PB10" pad="C3"/>
+<connect gate="G$1" pin="PB11" pad="B3"/>
+<connect gate="G$1" pin="PB12" pad="B5"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="B7"/>
+<connect gate="G$1" pin="PB15" pad="B6"/>
+<connect gate="G$1" pin="PB16" pad="C1"/>
+<connect gate="G$1" pin="PB17" pad="C6"/>
+<connect gate="G$1" pin="PB18" pad="E3"/>
+<connect gate="G$1" pin="PB19" pad="D5"/>
+<connect gate="G$1" pin="PB2" pad="B4"/>
+<connect gate="G$1" pin="PB20" pad="E4"/>
+<connect gate="G$1" pin="PB21" pad="F1"/>
+<connect gate="G$1" pin="PB22" pad="G1"/>
+<connect gate="G$1" pin="PB23" pad="F2"/>
+<connect gate="G$1" pin="PB24" pad="G2"/>
+<connect gate="G$1" pin="PB25" pad="F3"/>
+<connect gate="G$1" pin="PB26" pad="F4"/>
+<connect gate="G$1" pin="PB27/AD0" pad="D9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="E8"/>
+<connect gate="G$1" pin="PB29/AD2" pad="H9"/>
+<connect gate="G$1" pin="PB3" pad="C4"/>
+<connect gate="G$1" pin="PB30/AD3" pad="G9"/>
+<connect gate="G$1" pin="PB4" pad="C2"/>
+<connect gate="G$1" pin="PB5" pad="A6"/>
+<connect gate="G$1" pin="PB6" pad="D6"/>
+<connect gate="G$1" pin="PB7" pad="A5"/>
+<connect gate="G$1" pin="PB8" pad="A7"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PLLRC" pad="H10"/>
+<connect gate="G$1" pin="TCK" pad="F5"/>
+<connect gate="G$1" pin="TDI" pad="B1"/>
+<connect gate="G$1" pin="TDO" pad="G4"/>
+<connect gate="G$1" pin="TMS" pad="E5"/>
+<connect gate="G$1" pin="TST" pad="D4"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="F8"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="G7"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="H1"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="K1"/>
+<connect gate="G$1" pin="VDDCORE@5" pad="K2"/>
+<connect gate="G$1" pin="VDDFLASH" pad="J5"/>
+<connect gate="G$1" pin="VDDIN@1" pad="F10"/>
+<connect gate="G$1" pin="VDDIO@1" pad="A10"/>
+<connect gate="G$1" pin="VDDIO@2" pad="D8"/>
+<connect gate="G$1" pin="VDDIO@3" pad="E7"/>
+<connect gate="G$1" pin="VDDIO@4" pad="E9"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="G10"/>
+<connect gate="G$1" pin="VDDPLL" pad="J10"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="J7"/>
+<connect gate="G$1" pin="XOUT" pad="J8"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C46A-10?Q-2.7" prefix="IC">
+<description>&lt;b&gt;Three-wire Automotive Temperature Serial EEPROM&lt;/b&gt; 1K (64 x 16)&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc5089.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT93C46A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46DN-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1455086" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3879" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSSOP8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PU" package="DIL08">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171550" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6521" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171576" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6523" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SSU" package="8S1">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455133" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3771" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455135" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3773" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171568" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6522" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171584" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6524" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13*" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+<gate name="P" symbol="GND" x="35.56" y="0" addlevel="request"/>
+</gates>
+<devices>
+<device name="MM0" package="10M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="6"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="7"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="9"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="4"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="P" pin="GND" pad="11"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MU" package="20M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="11"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="12"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="14"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="5"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="P" pin="GND" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715517" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0299" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455134" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3772" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T7024" prefix="IC">
+<description>&lt;b&gt;Bluetooth/ISM 2.4-GHz Front-End IC&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4533.pdf</description>
+<gates>
+<gate name="G$1" symbol="T7024" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF20-5X5-TH">
+<connects>
+<connect gate="G$1" pin="EXP" pad="EXP"/>
+<connect gate="G$1" pin="GND@1" pad="6"/>
+<connect gate="G$1" pin="GND@2" pad="8"/>
+<connect gate="G$1" pin="GND@3" pad="10"/>
+<connect gate="G$1" pin="GND@4" pad="14"/>
+<connect gate="G$1" pin="GND@5" pad="18"/>
+<connect gate="G$1" pin="LNA_IN" pad="7"/>
+<connect gate="G$1" pin="LNA_OUT" pad="1"/>
+<connect gate="G$1" pin="PA_IN" pad="20"/>
+<connect gate="G$1" pin="PU" pad="3"/>
+<connect gate="G$1" pin="RAMP" pad="15"/>
+<connect gate="G$1" pin="RX_ON" pad="2"/>
+<connect gate="G$1" pin="R_SWITCH" pad="4"/>
+<connect gate="G$1" pin="SWITCH_OUT" pad="5"/>
+<connect gate="G$1" pin="V1_PA" pad="19"/>
+<connect gate="G$1" pin="V2_PA@1" pad="16"/>
+<connect gate="G$1" pin="V2_PA@2" pad="17"/>
+<connect gate="G$1" pin="V3_PA_OUT@1" pad="11"/>
+<connect gate="G$1" pin="V3_PA_OUT@2" pad="12"/>
+<connect gate="G$1" pin="V3_PA_OUT@3" pad="13"/>
+<connect gate="G$1" pin="VS_LNA" pad="9"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA16A4" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt; High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 16 KB - 128 KB of In-System Self-Programmable Flash&lt;br&gt;
+- 4 KB - 8 KB Boot Code Section with Independent Lock Bits&lt;br&gt;
+- 1 KB - 2 KB EEPROM&lt;br&gt;
+- 2 KB - 8 KB Internal SRAM
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Five 16-bit Timer/Counters
+&lt;ul&gt;Three Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Two Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extensions on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on one Timer/Counter&lt;/ul&gt;
+- Five USARTs
+&lt;ul&gt;IrDA Extension on one USART&lt;/ul&gt;
+- Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Two SPIs (Serial Peripheral Interfaces) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with Separate Oscillator&lt;br&gt;
+- One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter&lt;br&gt;
+- One Two-channel, 12-bit, 1 Msps Digital to Analog Converter&lt;br&gt;
+- Two Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;&lt;br&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;PDI (Program and Debug Interface) for programming, test and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 34 Programmable I/O Lines&lt;br&gt;
+- 44 - lead TQFP&lt;br&gt;
+- 44 - pad VQFN/QFN&lt;br&gt;
+- 49 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA16A4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M1" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA128A1" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt;High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 64K - 384K Bytes of In-System Self-Programmable Flash&lt;br&gt;
+- 4K - 8K Bytes Boot Section with Independent Lock Bits&lt;br&gt;
+- 2 KB - 4 KB EEPROM&lt;br&gt;
+- 4 KB - 32 KB Internal SRAM
+&lt;ul&gt;External Bus Interface for up to 16M bytes SRAM&lt;/ul&gt;
+&lt;ul&gt;External Bus Interface for up to 128M bit SDRAM&lt;/ul&gt;
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Eight 16-bit Timer/Counters
+&lt;ul&gt;Four Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Four Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extension on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on two Timer/Counters&lt;/ul&gt;
+- Eight USARTs
+&lt;ul&gt;IrDA modulation/demodulation for one USART&lt;/ul&gt;
+- Four Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Four SPI (Serial Peripheral Interface) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with separate Oscillator&lt;br&gt;
+- Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters&lt;br&gt;
+- Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters&lt;br&gt;
+- Four Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL and Prescaler&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;JTAG (IEEE 1149.1 Compliant) Interface for programming, test and debugging&lt;/ul&gt;
+&lt;ul&gt;PDI (Program and Debug Interface) for programming and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 78 Programmable I/O Lines&lt;br&gt;
+- 100 - lead TQFP&lt;br&gt;
+- 100 - ball CBGA&lt;br&gt;
+- 100 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA128A1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="90"/>
+<connect gate="G$1" pin="AVCC" pad="4"/>
+<connect gate="G$1" pin="AVCC1" pad="94"/>
+<connect gate="G$1" pin="GND" pad="3"/>
+<connect gate="G$1" pin="GND1" pad="13"/>
+<connect gate="G$1" pin="GND2" pad="23"/>
+<connect gate="G$1" pin="GND3" pad="33"/>
+<connect gate="G$1" pin="GND4" pad="43"/>
+<connect gate="G$1" pin="GND5" pad="53"/>
+<connect gate="G$1" pin="GND6" pad="63"/>
+<connect gate="G$1" pin="GND7" pad="73"/>
+<connect gate="G$1" pin="GND8" pad="84"/>
+<connect gate="G$1" pin="GND9" pad="93"/>
+<connect gate="G$1" pin="PA0" pad="95"/>
+<connect gate="G$1" pin="PA1" pad="96"/>
+<connect gate="G$1" pin="PA2" pad="97"/>
+<connect gate="G$1" pin="PA3" pad="98"/>
+<connect gate="G$1" pin="PA4" pad="99"/>
+<connect gate="G$1" pin="PA5" pad="100"/>
+<connect gate="G$1" pin="PA6" pad="1"/>
+<connect gate="G$1" pin="PA7" pad="2"/>
+<connect gate="G$1" pin="PB0" pad="5"/>
+<connect gate="G$1" pin="PB1" pad="6"/>
+<connect gate="G$1" pin="PB2" pad="7"/>
+<connect gate="G$1" pin="PB3" pad="8"/>
+<connect gate="G$1" pin="PB4" pad="9"/>
+<connect gate="G$1" pin="PB5" pad="10"/>
+<connect gate="G$1" pin="PB6" pad="11"/>
+<connect gate="G$1" pin="PB7" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="15"/>
+<connect gate="G$1" pin="PC1" pad="16"/>
+<connect gate="G$1" pin="PC2" pad="17"/>
+<connect gate="G$1" pin="PC3" pad="18"/>
+<connect gate="G$1" pin="PC4" pad="19"/>
+<connect gate="G$1" pin="PC5" pad="20"/>
+<connect gate="G$1" pin="PC6" pad="21"/>
+<connect gate="G$1" pin="PC7" pad="22"/>
+<connect gate="G$1" pin="PD0" pad="25"/>
+<connect gate="G$1" pin="PD1" pad="26"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PDI_DATA" pad="89"/>
+<connect gate="G$1" pin="PE0" pad="35"/>
+<connect gate="G$1" pin="PE1" pad="36"/>
+<connect gate="G$1" pin="PE2" pad="37"/>
+<connect gate="G$1" pin="PE3" pad="38"/>
+<connect gate="G$1" pin="PE4" pad="39"/>
+<connect gate="G$1" pin="PE5" pad="40"/>
+<connect gate="G$1" pin="PE6" pad="41"/>
+<connect gate="G$1" pin="PE7" pad="42"/>
+<connect gate="G$1" pin="PF0" pad="45"/>
+<connect gate="G$1" pin="PF1" pad="46"/>
+<connect gate="G$1" pin="PF2" pad="47"/>
+<connect gate="G$1" pin="PF3" pad="48"/>
+<connect gate="G$1" pin="PF4" pad="49"/>
+<connect gate="G$1" pin="PF5" pad="50"/>
+<connect gate="G$1" pin="PF6" pad="51"/>
+<connect gate="G$1" pin="PF7" pad="52"/>
+<connect gate="G$1" pin="PH0" pad="55"/>
+<connect gate="G$1" pin="PH1" pad="56"/>
+<connect gate="G$1" pin="PH2" pad="57"/>
+<connect gate="G$1" pin="PH3" pad="58"/>
+<connect gate="G$1" pin="PH4" pad="59"/>
+<connect gate="G$1" pin="PH5" pad="60"/>
+<connect gate="G$1" pin="PH6" pad="61"/>
+<connect gate="G$1" pin="PH7" pad="62"/>
+<connect gate="G$1" pin="PJ0" pad="65"/>
+<connect gate="G$1" pin="PJ1" pad="66"/>
+<connect gate="G$1" pin="PJ2" pad="67"/>
+<connect gate="G$1" pin="PJ3" pad="68"/>
+<connect gate="G$1" pin="PJ4" pad="69"/>
+<connect gate="G$1" pin="PJ5" pad="70"/>
+<connect gate="G$1" pin="PJ6" pad="71"/>
+<connect gate="G$1" pin="PJ7" pad="72"/>
+<connect gate="G$1" pin="PK0" pad="75"/>
+<connect gate="G$1" pin="PK1" pad="76"/>
+<connect gate="G$1" pin="PK2" pad="77"/>
+<connect gate="G$1" pin="PK3" pad="78"/>
+<connect gate="G$1" pin="PK4" pad="79"/>
+<connect gate="G$1" pin="PK5" pad="80"/>
+<connect gate="G$1" pin="PK6" pad="81"/>
+<connect gate="G$1" pin="PK7" pad="82"/>
+<connect gate="G$1" pin="PQ0" pad="85"/>
+<connect gate="G$1" pin="PQ1" pad="86"/>
+<connect gate="G$1" pin="PQ2" pad="87"/>
+<connect gate="G$1" pin="PQ3" pad="88"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="91"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="92"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VCC1" pad="24"/>
+<connect gate="G$1" pin="VCC2" pad="34"/>
+<connect gate="G$1" pin="VCC3" pad="44"/>
+<connect gate="G$1" pin="VCC4" pad="54"/>
+<connect gate="G$1" pin="VCC5" pad="64"/>
+<connect gate="G$1" pin="VCC6" pad="74"/>
+<connect gate="G$1" pin="VCC7" pad="83"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA325P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 32K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc8023.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA325P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="64M1">
+<connects>
+<connect gate="G$1" pin="!RESET!/PG5" pad="20"/>
+<connect gate="G$1" pin="!SS!/PCINT8/PB0" pad="10"/>
+<connect gate="G$1" pin="ADC0/PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1/PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2/PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3/PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4/TCK/PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5/TMS/PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6/TDO/PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7/TDI/PF7" pad="54"/>
+<connect gate="G$1" pin="AIN1/PCINT3/PE3" pad="5"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="CLKO/PCINT7/PE7" pad="9"/>
+<connect gate="G$1" pin="DI/SDA/PCINT5/PE5" pad="7"/>
+<connect gate="G$1" pin="DNC" pad="1"/>
+<connect gate="G$1" pin="DO/PCINT6/PE6" pad="8"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="53"/>
+<connect gate="G$1" pin="GND@2" pad="63"/>
+<connect gate="G$1" pin="ICP1/PD0" pad="25"/>
+<connect gate="G$1" pin="INT0/PD1" pad="26"/>
+<connect gate="G$1" pin="MISO/PCINT11/PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI/PCINT10/PB2" pad="12"/>
+<connect gate="G$1" pin="OC0A/PCINT12/PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A/PCINT13/PB5" pad="16"/>
+<connect gate="G$1" pin="OC1B/PCINT14/PB6" pad="15"/>
+<connect gate="G$1" pin="OC2A/PCINT15/PB7" pad="17"/>
+<connect gate="G$1" pin="PA0" pad="51"/>
+<connect gate="G$1" pin="PA1" pad="50"/>
+<connect gate="G$1" pin="PA2" pad="49"/>
+<connect gate="G$1" pin="PA3" pad="48"/>
+<connect gate="G$1" pin="PA4" pad="47"/>
+<connect gate="G$1" pin="PA5" pad="46"/>
+<connect gate="G$1" pin="PA6" pad="45"/>
+<connect gate="G$1" pin="PA7" pad="44"/>
+<connect gate="G$1" pin="PC0" pad="35"/>
+<connect gate="G$1" pin="PC1" pad="36"/>
+<connect gate="G$1" pin="PC2" pad="37"/>
+<connect gate="G$1" pin="PC3" pad="38"/>
+<connect gate="G$1" pin="PC4" pad="39"/>
+<connect gate="G$1" pin="PC5" pad="40"/>
+<connect gate="G$1" pin="PC6" pad="41"/>
+<connect gate="G$1" pin="PC7" pad="42"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PG0" pad="33"/>
+<connect gate="G$1" pin="PG1" pad="34"/>
+<connect gate="G$1" pin="PG2" pad="43"/>
+<connect gate="G$1" pin="RXD/PCINT0/PE0" pad="2"/>
+<connect gate="G$1" pin="SCK/PCINT9/PB1" pad="11"/>
+<connect gate="G$1" pin="T0/PG4" pad="19"/>
+<connect gate="G$1" pin="T1/PG3" pad="18"/>
+<connect gate="G$1" pin="TOSC1/XTAL1" pad="24"/>
+<connect gate="G$1" pin="TOSC2/XTAL2" pad="23"/>
+<connect gate="G$1" pin="TXD/PCINT1/PE1" pad="3"/>
+<connect gate="G$1" pin="USCK/SCL/PCINT4/PE4" pad="6"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XCK/AIN0/PCINT2/PE2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA325PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1636939" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2025" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB642D" prefix="IC">
+<description>&lt;b&gt;Flash-Memory 64-Megabit&lt;/b&gt; 2 .7-volt, Dual-interface, DataFlash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf</description>
+<gates>
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+</gates>
+<devices>
+<device name="" package="28T-TSOP-1">
+<connects>
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+<connect gate="G$1" pin="I/O3" pad="20"/>
+<connect gate="G$1" pin="I/O4" pad="23"/>
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+<connect gate="G$1" pin="I/O6" pad="25"/>
+<connect gate="G$1" pin="I/O7" pad="26"/>
+<connect gate="G$1" pin="RDY/!BUSY" pad="1"/>
+<connect gate="G$1" pin="SCK/CLK" pad="12"/>
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+<connect gate="G$1" pin="VCC" pad="6"/>
+<connect gate="G$1" pin="VCCP" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
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+<attribute name="OC_NEWARK" value="51P1801" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
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+</gates>
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+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB161D" prefix="IC">
+<description>&lt;b&gt;16-megabit 2.5V or 2.7V DataFlash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3500.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB161VFN8" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-MU" package="VDFN-8">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>
diff --git a/atmel.lbr b/atmel.lbr
new file mode 100644 (file)
index 0000000..2b311df
--- /dev/null
+++ b/atmel.lbr
@@ -0,0 +1,20777 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="yes" active="yes"/>
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+<layer number="31" name="tCream" color="7" fill="4" visible="yes" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="yes" active="yes"/>
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+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
+<layer number="51" name="tDocu" color="6" fill="9" visible="yes" active="yes"/>
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+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
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+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
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+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+</layers>
+<library>
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL08">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-5.08" y1="-0.635" x2="-5.08" y2="0.635" width="0.1524" layer="21" curve="180"/>
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+<text x="-3.81" y="-0.9906" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
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+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.&lt;br&gt;
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+Source: http://ww1.microchip.com/downloads/en/devicedoc/39632c.pdf</description>
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+Source: 6120s.pdf</description>
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+<pin name="GND" x="-33.02" y="22.86" length="middle" direction="pwr"/>
+<pin name="PG3(T1/SEG24)" x="-33.02" y="7.62" length="middle"/>
+<pin name="PG4(T0/SEG23)" x="-33.02" y="10.16" length="middle"/>
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+<pin name="GND1" x="-20.32" y="5.08" visible="pad" length="middle" direction="pwr"/>
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+<pin name="RESET" x="-20.32" y="43.18" length="middle" direction="in" function="dot"/>
+<pin name="(RXD)PD0" x="20.32" y="-43.18" length="middle" rot="R180"/>
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+<pin name="VCC1" x="-20.32" y="15.24" visible="pad" length="middle" direction="pwr"/>
+<pin name="VCC" x="-20.32" y="12.7" length="middle" direction="pwr"/>
+<pin name="VCC2" x="-20.32" y="10.16" visible="pad" length="middle" direction="pwr"/>
+<pin name="GND" x="-20.32" y="2.54" length="middle" direction="pwr"/>
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+<symbol name="MEGA1284">
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+<wire x1="27.94" y1="45.72" x2="27.94" y2="-45.72" width="0.254" layer="94"/>
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+<pin name="(ADC4/PCINT4)PA4" x="33.02" y="35.56" length="middle" rot="R180"/>
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+<pin name="PCINT21/TDI_PC5" x="30.48" y="-10.16" length="short" rot="R180"/>
+<pin name="PCINT22/TOSC1_PC6" x="30.48" y="-7.62" length="short" rot="R180"/>
+<pin name="PCINT23/TOSC2_PC7" x="30.48" y="-5.08" length="short" rot="R180"/>
+<pin name="AVCC" x="30.48" y="-2.54" length="short" direction="pwr" rot="R180"/>
+<pin name="GND@1" x="30.48" y="0" length="short" direction="pwr" rot="R180"/>
+<pin name="AREF" x="30.48" y="2.54" length="short" direction="pas" rot="R180"/>
+<pin name="PCINT7/ADC7_PA7" x="30.48" y="5.08" length="short" rot="R180"/>
+<pin name="PCINT6/ADC6_PA6" x="30.48" y="7.62" length="short" rot="R180"/>
+<pin name="PCINT5/ADC5_PA5" x="30.48" y="10.16" length="short" rot="R180"/>
+<pin name="PCINT4/ADC4_PA4" x="30.48" y="12.7" length="short" rot="R180"/>
+<pin name="PCINT3/ADC3_PA3" x="30.48" y="15.24" length="short" rot="R180"/>
+<pin name="PCINT2/ADC2_PA2" x="30.48" y="17.78" length="short" rot="R180"/>
+<pin name="PCINT1/ADC1_PA1" x="30.48" y="20.32" length="short" rot="R180"/>
+<pin name="PCINT0/ADC0_PA0" x="30.48" y="22.86" length="short" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161D">
+<wire x1="-7.62" y1="7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="7.62" x2="10.16" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-10.16" x2="-7.62" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="-7.62" y1="-10.16" x2="-7.62" y2="7.62" width="0.254" layer="94"/>
+<text x="-7.62" y="8.89" size="1.778" layer="95">&gt;NAME</text>
+<text x="-7.62" y="-12.7" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="!CS" x="-10.16" y="-5.08" length="short" direction="in"/>
+<pin name="SCK" x="-10.16" y="-2.54" length="short" direction="in"/>
+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!WP" x="-10.16" y="-7.62" length="short" direction="in"/>
+<pin name="RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="RDY/!BUSY" x="12.7" y="0" length="short" direction="out" rot="R180"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-7.62" length="short" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161VFN8">
+<wire x1="-7.62" y1="7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="7.62" x2="10.16" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-7.62" x2="-7.62" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="-7.62" y1="-7.62" x2="-7.62" y2="7.62" width="0.254" layer="94"/>
+<text x="-7.62" y="8.89" size="1.778" layer="95">&gt;NAME</text>
+<text x="-7.62" y="-10.16" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="!CS" x="-10.16" y="-5.08" length="short" direction="in"/>
+<pin name="SCK" x="-10.16" y="-2.54" length="short" direction="in"/>
+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="!WP" x="-10.16" y="0" length="short" direction="in"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AT90*4434P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*4434" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (LS)&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="44"/>
+<connect gate="G$1" pin="VCC2" pad="11"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4414" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J1" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J2" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J3" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515-A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="22"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4433" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="3-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2343" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2313" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S1200" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Y" package="SSOP20D8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY10" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes ROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY11*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY12*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY22" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1K ROM&lt;p&gt;
+128 bytes RAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;br&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+UART&lt;br&gt;
+RTC&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AC+)PE2" pad="4"/>
+<connect gate="G$1" pin="(AC-)PE3" pad="5"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PE1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7)" pad="54"/>
+<connect gate="G$1" pin="RD" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="WR" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90C8534" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+6-channel&lt;p&gt;
+10-bit A/D</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP48">
+<connects>
+<connect gate="G$1" pin="ADIN0" pad="1"/>
+<connect gate="G$1" pin="ADIN1" pad="13"/>
+<connect gate="G$1" pin="ADIN2" pad="14"/>
+<connect gate="G$1" pin="ADIN3" pad="15"/>
+<connect gate="G$1" pin="ADIN4" pad="16"/>
+<connect gate="G$1" pin="ADIN5" pad="17"/>
+<connect gate="G$1" pin="AGND" pad="11"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="31"/>
+<connect gate="G$1" pin="INT0" pad="35"/>
+<connect gate="G$1" pin="INT1" pad="34"/>
+<connect gate="G$1" pin="NC1" pad="2"/>
+<connect gate="G$1" pin="NC10" pad="12"/>
+<connect gate="G$1" pin="NC11" pad="19"/>
+<connect gate="G$1" pin="NC12" pad="21"/>
+<connect gate="G$1" pin="NC13" pad="25"/>
+<connect gate="G$1" pin="NC14" pad="26"/>
+<connect gate="G$1" pin="NC15" pad="27"/>
+<connect gate="G$1" pin="NC16" pad="28"/>
+<connect gate="G$1" pin="NC17" pad="29"/>
+<connect gate="G$1" pin="NC18" pad="30"/>
+<connect gate="G$1" pin="NC19" pad="32"/>
+<connect gate="G$1" pin="NC2" pad="3"/>
+<connect gate="G$1" pin="NC20" pad="36"/>
+<connect gate="G$1" pin="NC21" pad="37"/>
+<connect gate="G$1" pin="NC22" pad="40"/>
+<connect gate="G$1" pin="NC23" pad="41"/>
+<connect gate="G$1" pin="NC24" pad="42"/>
+<connect gate="G$1" pin="NC25" pad="43"/>
+<connect gate="G$1" pin="NC26" pad="48"/>
+<connect gate="G$1" pin="NC3" pad="4"/>
+<connect gate="G$1" pin="NC4" pad="5"/>
+<connect gate="G$1" pin="NC5" pad="6"/>
+<connect gate="G$1" pin="NC6" pad="7"/>
+<connect gate="G$1" pin="NC7" pad="8"/>
+<connect gate="G$1" pin="NC8" pad="9"/>
+<connect gate="G$1" pin="NC9" pad="10"/>
+<connect gate="G$1" pin="PA0" pad="47"/>
+<connect gate="G$1" pin="PA1" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="45"/>
+<connect gate="G$1" pin="PA3" pad="44"/>
+<connect gate="G$1" pin="PA4" pad="39"/>
+<connect gate="G$1" pin="PA5" pad="38"/>
+<connect gate="G$1" pin="PA6" pad="33"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="22"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="30"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="31"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="29"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="10"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="3"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="14"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="15"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="11"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="4"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="27"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="29"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="26"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="5"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="42"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="10"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="7"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="43"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY15L" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2.7 V&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM&lt;p&gt;
+4-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes &lt;B&gt;EEPROM&lt;/B&gt;&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-5" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="21"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="14"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="15"/>
+<connect gate="G$1" pin="PB2(T0)" pad="16"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="17"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="18"/>
+<connect gate="G$1" pin="PB5" pad="19"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD2" pad="4"/>
+<connect gate="G$1" pin="PD3" pad="5"/>
+<connect gate="G$1" pin="PD4" pad="6"/>
+<connect gate="G$1" pin="PD5" pad="11"/>
+<connect gate="G$1" pin="PD6" pad="12"/>
+<connect gate="G$1" pin="PD7" pad="13"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="VCC1" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND1" pad="21"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="20"/>
+<connect gate="G$1" pin="NC5" pad="22"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="13"/>
+<connect gate="G$1" pin="PB2(T0)" pad="14"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="15"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="16"/>
+<connect gate="G$1" pin="PB5" pad="17"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="30"/>
+<connect gate="G$1" pin="PD1" pad="31"/>
+<connect gate="G$1" pin="PD2" pad="32"/>
+<connect gate="G$1" pin="PD3" pad="1"/>
+<connect gate="G$1" pin="PD4" pad="2"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="10"/>
+<connect gate="G$1" pin="PD7" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="VCC1" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT25*" prefix="IC">
+<description>SPI bus serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="250X0" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS/" pad="1"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="HOLD/" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="6"/>
+<connect gate="G$1" pin="SI" pad="5"/>
+<connect gate="G$1" pin="SO" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP/" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="CAT25040LI-G" constant="no"/>
+<attribute name="OC_FARNELL" value="1718045" constant="no"/>
+<attribute name="OC_NEWARK" value="06R0588" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT24C*" prefix="IC">
+<description>2-wire serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="24CXX" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="A0" pad="1"/>
+<connect gate="G$1" pin="A1" pad="2"/>
+<connect gate="G$1" pin="A2" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="SCL" pad="6"/>
+<connect gate="G$1" pin="SDA" pad="5"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT24C1024BW-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1362646" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2044" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SDE2506" prefix="IC">
+<description>I2C/MicroWire &lt;B&gt;EEPROM&lt;/B&gt; (24xxx)</description>
+<gates>
+<gate name="G$1" symbol="SDE2506" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CE/" pad="2"/>
+<connect gate="G$1" pin="CLK" pad="5"/>
+<connect gate="G$1" pin="D" pad="4"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="TG" pad="8"/>
+<connect gate="G$1" pin="TP" pad="7"/>
+<connect gate="G$1" pin="VCC" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C*6" prefix="IC">
+<description>3-wire serial EEPROM</description>
+<gates>
+<gate name="G$1" symbol="93CX6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="ORG" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46D-PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1362666" constant="no"/>
+<attribute name="OC_NEWARK" value="50M3339" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C2051" prefix="IC">
+<description>80C31 &lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+2.7 V</description>
+<gates>
+<gate name="G$1" symbol="89C2051" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699389" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3687" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC20S">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699390" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3688" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;p&gt;
+128 Kbytes FLASH&lt;p&gt;
+4 Kbytes SRAM&lt;p&gt;
+2 Kbytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+RTC&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="01" pad="21"/>
+<connect gate="G$1" pin="02" pad="22"/>
+<connect gate="G$1" pin="A10-PC2" pad="37"/>
+<connect gate="G$1" pin="A11-PC3" pad="38"/>
+<connect gate="G$1" pin="A12-PC4" pad="39"/>
+<connect gate="G$1" pin="A13-PC5" pad="40"/>
+<connect gate="G$1" pin="A14-PC6" pad="41"/>
+<connect gate="G$1" pin="A15-PC7" pad="42"/>
+<connect gate="G$1" pin="A8-PC0" pad="35"/>
+<connect gate="G$1" pin="A9-PC1" pad="36"/>
+<connect gate="G$1" pin="AC+_PE2" pad="4"/>
+<connect gate="G$1" pin="AC-_PE3" pad="5"/>
+<connect gate="G$1" pin="AD0-PA0" pad="51"/>
+<connect gate="G$1" pin="AD1-PA1" pad="50"/>
+<connect gate="G$1" pin="AD2-PA2" pad="49"/>
+<connect gate="G$1" pin="AD3-PA3" pad="48"/>
+<connect gate="G$1" pin="AD4-PA4" pad="47"/>
+<connect gate="G$1" pin="AD5-PA5" pad="46"/>
+<connect gate="G$1" pin="AD6-PA6" pad="45"/>
+<connect gate="G$1" pin="AD7-PA7" pad="44"/>
+<connect gate="G$1" pin="ADC0-PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1-PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2-PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3-PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4-PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5-PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6-PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7-PF7" pad="54"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="AVREF" pad="62"/>
+<connect gate="G$1" pin="GND" pad="53"/>
+<connect gate="G$1" pin="INT4-PE4" pad="6"/>
+<connect gate="G$1" pin="INT5-PE5" pad="7"/>
+<connect gate="G$1" pin="INT6-PE6" pad="8"/>
+<connect gate="G$1" pin="INT7-PE7" pad="9"/>
+<connect gate="G$1" pin="MISO-PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI-PB2" pad="12"/>
+<connect gate="G$1" pin="OC0-PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A-PB5" pad="15"/>
+<connect gate="G$1" pin="OC1B-PB6" pad="16"/>
+<connect gate="G$1" pin="OC2-PB7" pad="17"/>
+<connect gate="G$1" pin="PD0-INT0" pad="25"/>
+<connect gate="G$1" pin="PD1-INT1" pad="26"/>
+<connect gate="G$1" pin="PD2-INT2" pad="27"/>
+<connect gate="G$1" pin="PD3-INT3" pad="28"/>
+<connect gate="G$1" pin="PD4-IC1" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6-T1" pad="31"/>
+<connect gate="G$1" pin="PD7-T2" pad="32"/>
+<connect gate="G$1" pin="PEN/" pad="1"/>
+<connect gate="G$1" pin="RD/" pad="34"/>
+<connect gate="G$1" pin="RESET/" pad="20"/>
+<connect gate="G$1" pin="RXD-PE0" pad="2"/>
+<connect gate="G$1" pin="SCK-PB1" pad="11"/>
+<connect gate="G$1" pin="SS-PB0" pad="10"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="TXD-PE1" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="52"/>
+<connect gate="G$1" pin="WR/" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C*52" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH; 2K Bytes EEPROM&lt;br&gt;
+Compatible with MCS-51 Products&lt;br&gt;
+at89s8252.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C52" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="33.02" y="5.08" addlevel="request"/>
+</gates>
+<devices>
+<device name="P6" package="DIL40">
+<connects>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="EA" pad="31"/>
+<connect gate="G$1" pin="P0.0AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0_T2" pad="1"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0" pad="10"/>
+<connect gate="G$1" pin="P3.1" pad="11"/>
+<connect gate="G$1" pin="P3.2" pad="12"/>
+<connect gate="G$1" pin="P3.3" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/RD" pad="17"/>
+<connect gate="G$1" pin="PSEN" pad="29"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="VCC" pad="40"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="EA" pad="35"/>
+<connect gate="G$1" pin="P0.0AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0_T2" pad="2"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0" pad="11"/>
+<connect gate="G$1" pin="P3.1" pad="13"/>
+<connect gate="G$1" pin="P3.2" pad="14"/>
+<connect gate="G$1" pin="P3.3" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/RD" pad="19"/>
+<connect gate="G$1" pin="PSEN" pad="32"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="VCC" pad="44"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Q" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="27C080" prefix="IC">
+<description>&lt;b&gt;8-Megabit (1Mx8) OTP EPROM&lt;/b&gt;</description>
+<gates>
+<gate name="G$1" symbol="27C080" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="15.24" y="-10.16" addlevel="request"/>
+</gates>
+<devices>
+<device name="32P6" package="DIL32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455026" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3824" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="SO32X">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC32R">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455025" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3823" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSOP32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="30"/>
+<connect gate="G$1" pin="!OE!VPP" pad="32"/>
+<connect gate="G$1" pin="A0" pad="20"/>
+<connect gate="G$1" pin="A1" pad="19"/>
+<connect gate="G$1" pin="A10" pad="31"/>
+<connect gate="G$1" pin="A11" pad="1"/>
+<connect gate="G$1" pin="A12" pad="12"/>
+<connect gate="G$1" pin="A13" pad="4"/>
+<connect gate="G$1" pin="A14" pad="5"/>
+<connect gate="G$1" pin="A15" pad="11"/>
+<connect gate="G$1" pin="A16" pad="10"/>
+<connect gate="G$1" pin="A17" pad="6"/>
+<connect gate="G$1" pin="A18" pad="7"/>
+<connect gate="G$1" pin="A19" pad="9"/>
+<connect gate="G$1" pin="A2" pad="18"/>
+<connect gate="G$1" pin="A3" pad="17"/>
+<connect gate="G$1" pin="A4" pad="16"/>
+<connect gate="G$1" pin="A5" pad="15"/>
+<connect gate="G$1" pin="A6" pad="14"/>
+<connect gate="G$1" pin="A7" pad="13"/>
+<connect gate="G$1" pin="A8" pad="3"/>
+<connect gate="G$1" pin="A9" pad="2"/>
+<connect gate="G$1" pin="O0" pad="21"/>
+<connect gate="G$1" pin="O1" pad="22"/>
+<connect gate="G$1" pin="O2" pad="23"/>
+<connect gate="G$1" pin="O3" pad="25"/>
+<connect gate="G$1" pin="O4" pad="26"/>
+<connect gate="G$1" pin="O5" pad="27"/>
+<connect gate="G$1" pin="O6" pad="28"/>
+<connect gate="G$1" pin="O7" pad="29"/>
+<connect gate="P" pin="GND" pad="24"/>
+<connect gate="P" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91R4008" prefix="IC">
+<description>&lt;b&gt;AT91 ARM® Thumb® RISC-Controller&lt;/b&gt;&lt;p&gt;
+Microcontroller AT91R40008</description>
+<gates>
+<gate name="A" symbol="AT91R4008" x="-25.4" y="2.54" addlevel="always"/>
+<gate name="B" symbol="AT91R4008-PARPORT" x="0" y="-7.62" addlevel="always"/>
+<gate name="C" symbol="AT91R4008-ADR" x="27.94" y="-7.62" addlevel="always"/>
+<gate name="D" symbol="D0-15" x="53.34" y="2.54" addlevel="always"/>
+<gate name="P1" symbol="GND" x="-38.1" y="-58.42" addlevel="always"/>
+<gate name="P2" symbol="GND" x="-35.56" y="-58.42" addlevel="always"/>
+<gate name="P3" symbol="GND" x="-33.02" y="-58.42" addlevel="always"/>
+<gate name="P4" symbol="GND" x="-30.48" y="-58.42" addlevel="always"/>
+<gate name="P5" symbol="GND" x="-27.94" y="-58.42" addlevel="always"/>
+<gate name="P15" symbol="VDDIO" x="-38.1" y="-35.56" addlevel="always"/>
+<gate name="P16" symbol="VDDIO" x="-35.56" y="-35.56" addlevel="always"/>
+<gate name="P17" symbol="VDDIO" x="-33.02" y="-35.56" addlevel="always"/>
+<gate name="P6" symbol="GND" x="-25.4" y="-58.42" addlevel="always"/>
+<gate name="P7" symbol="GND" x="-22.86" y="-58.42" addlevel="always"/>
+<gate name="P8" symbol="GND" x="-20.32" y="-58.42" addlevel="always"/>
+<gate name="P9" symbol="GND" x="-17.78" y="-58.42" addlevel="always"/>
+<gate name="P10" symbol="VDDIO" x="-30.48" y="-35.56" addlevel="always"/>
+<gate name="P11" symbol="VDDIO" x="-27.94" y="-35.56" addlevel="always"/>
+<gate name="P12" symbol="VDDCORE" x="-20.32" y="-35.56" addlevel="always"/>
+<gate name="P13" symbol="VDDCORE" x="-17.78" y="-35.56" addlevel="always"/>
+<gate name="P14" symbol="VDDCORE" x="-15.24" y="-35.56" addlevel="always"/>
+<gate name="P18" symbol="VDDIO" x="-25.4" y="-35.56" addlevel="always"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="A" pin="GND" pad="78"/>
+<connect gate="A" pin="MCKI" pad="82"/>
+<connect gate="A" pin="NCS0" pad="97"/>
+<connect gate="A" pin="NCS1" pad="98"/>
+<connect gate="A" pin="NRD/NOE" pad="92"/>
+<connect gate="A" pin="NRST" pad="79"/>
+<connect gate="A" pin="NRW0/NWE" pad="93"/>
+<connect gate="A" pin="NRW1/NUB" pad="77"/>
+<connect gate="A" pin="NWAIT" pad="96"/>
+<connect gate="A" pin="NWDOVF" pad="80"/>
+<connect gate="A" pin="TCK" pad="91"/>
+<connect gate="A" pin="TDI" pad="89"/>
+<connect gate="A" pin="TDO" pad="90"/>
+<connect gate="A" pin="TMS" pad="88"/>
+<connect gate="B" pin="P0/TCLK0" pad="49"/>
+<connect gate="B" pin="P1/TIOA0" pad="50"/>
+<connect gate="B" pin="P10/IRQ1" pad="63"/>
+<connect gate="B" pin="P11/IRQ2" pad="64"/>
+<connect gate="B" pin="P12/FIQ" pad="66"/>
+<connect gate="B" pin="P13/SCK0" pad="67"/>
+<connect gate="B" pin="P14/TXD0" pad="68"/>
+<connect gate="B" pin="P15/RXD0" pad="69"/>
+<connect gate="B" pin="P16" pad="70"/>
+<connect gate="B" pin="P17" pad="71"/>
+<connect gate="B" pin="P18" pad="72"/>
+<connect gate="B" pin="P19" pad="73"/>
+<connect gate="B" pin="P2/TIOB0" pad="51"/>
+<connect gate="B" pin="P20/SCK1" pad="74"/>
+<connect gate="B" pin="P21/TXD1/NTRI" pad="75"/>
+<connect gate="B" pin="P22/RXD1" pad="76"/>
+<connect gate="B" pin="P23" pad="83"/>
+<connect gate="B" pin="P24/BMS" pad="84"/>
+<connect gate="B" pin="P25/MCKO" pad="85"/>
+<connect gate="B" pin="P26/NCS2" pad="99"/>
+<connect gate="B" pin="P27/NCS3" pad="100"/>
+<connect gate="B" pin="P3/TCLK1" pad="54"/>
+<connect gate="B" pin="P4/TIOA1" pad="55"/>
+<connect gate="B" pin="P5/TIOB1" pad="56"/>
+<connect gate="B" pin="P6/TCLK2" pad="57"/>
+<connect gate="B" pin="P7/TIOA2" pad="58"/>
+<connect gate="B" pin="P8/TIOB2" pad="59"/>
+<connect gate="B" pin="P9/IRQ0" pad="60"/>
+<connect gate="C" pin="A1" pad="3"/>
+<connect gate="C" pin="A10" pad="13"/>
+<connect gate="C" pin="A11" pad="14"/>
+<connect gate="C" pin="A12" pad="15"/>
+<connect gate="C" pin="A13" pad="16"/>
+<connect gate="C" pin="A14" pad="17"/>
+<connect gate="C" pin="A15" pad="20"/>
+<connect gate="C" pin="A16" pad="21"/>
+<connect gate="C" pin="A17" pad="22"/>
+<connect gate="C" pin="A18" pad="23"/>
+<connect gate="C" pin="A19" pad="24"/>
+<connect gate="C" pin="A2" pad="4"/>
+<connect gate="C" pin="A3" pad="5"/>
+<connect gate="C" pin="A4" pad="6"/>
+<connect gate="C" pin="A5" pad="7"/>
+<connect gate="C" pin="A6" pad="8"/>
+<connect gate="C" pin="A7" pad="9"/>
+<connect gate="C" pin="A8" pad="11"/>
+<connect gate="C" pin="A9" pad="12"/>
+<connect gate="C" pin="NLB/A0" pad="1"/>
+<connect gate="C" pin="P28/CS7/A20" pad="25"/>
+<connect gate="C" pin="P29/CS6/A21" pad="26"/>
+<connect gate="C" pin="P30/CS5/A22" pad="29"/>
+<connect gate="C" pin="P31/CS4/A23" pad="30"/>
+<connect gate="D" pin="D0" pad="31"/>
+<connect gate="D" pin="D1" pad="32"/>
+<connect gate="D" pin="D10" pad="42"/>
+<connect gate="D" pin="D11" pad="43"/>
+<connect gate="D" pin="D12" pad="45"/>
+<connect gate="D" pin="D13" pad="46"/>
+<connect gate="D" pin="D14" pad="47"/>
+<connect gate="D" pin="D15" pad="48"/>
+<connect gate="D" pin="D2" pad="33"/>
+<connect gate="D" pin="D3" pad="34"/>
+<connect gate="D" pin="D4" pad="35"/>
+<connect gate="D" pin="D5" pad="37"/>
+<connect gate="D" pin="D6" pad="38"/>
+<connect gate="D" pin="D7" pad="39"/>
+<connect gate="D" pin="D8" pad="40"/>
+<connect gate="D" pin="D9" pad="41"/>
+<connect gate="P1" pin="GND" pad="2"/>
+<connect gate="P10" pin="VDDIO" pad="62"/>
+<connect gate="P11" pin="VDDIO" pad="81"/>
+<connect gate="P12" pin="VDDCORE" pad="27"/>
+<connect gate="P13" pin="VDDCORE" pad="61"/>
+<connect gate="P14" pin="VDDCORE" pad="94"/>
+<connect gate="P15" pin="VDDIO" pad="10"/>
+<connect gate="P16" pin="VDDIO" pad="28"/>
+<connect gate="P17" pin="VDDIO" pad="44"/>
+<connect gate="P18" pin="VDDIO" pad="95"/>
+<connect gate="P2" pin="GND" pad="18"/>
+<connect gate="P3" pin="GND" pad="19"/>
+<connect gate="P4" pin="GND" pad="36"/>
+<connect gate="P5" pin="GND" pad="52"/>
+<connect gate="P6" pin="GND" pad="53"/>
+<connect gate="P7" pin="GND" pad="65"/>
+<connect gate="P8" pin="GND" pad="86"/>
+<connect gate="P9" pin="GND" pad="87"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455146" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3782" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171657" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6920" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455147" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3783" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171665" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6921" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="MLF32">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SAM9708" prefix="SAM9708">
+<description>&lt;b&gt;128-voice Integrated Sound Synthesizer&lt;/b&gt;</description>
+<gates>
+<gate name="A" symbol="SAM9708" x="-45.72" y="17.78" addlevel="always"/>
+<gate name="C" symbol="SAM9708-SND" x="15.24" y="30.48" addlevel="always"/>
+<gate name="B" symbol="D0-15" x="-25.4" y="27.94" addlevel="always"/>
+<gate name="D" symbol="WA27" x="50.8" y="17.78" addlevel="always"/>
+<gate name="E" symbol="WD15" x="68.58" y="30.48" addlevel="always"/>
+<gate name="G1" symbol="GND" x="-27.94" y="-25.4"/>
+<gate name="G2" symbol="GND" x="-25.4" y="-25.4"/>
+<gate name="G3" symbol="GND" x="-22.86" y="-25.4"/>
+<gate name="G4" symbol="GND" x="-20.32" y="-25.4"/>
+<gate name="G5" symbol="GND" x="-17.78" y="-25.4"/>
+<gate name="G6" symbol="GND" x="-15.24" y="-25.4"/>
+<gate name="G7" symbol="GND" x="-12.7" y="-25.4"/>
+<gate name="G8" symbol="GND" x="-10.16" y="-25.4"/>
+<gate name="G9" symbol="GND" x="-7.62" y="-25.4"/>
+<gate name="G10" symbol="GND" x="-5.08" y="-25.4"/>
+<gate name="G11" symbol="GND" x="-2.54" y="-25.4"/>
+<gate name="G12" symbol="GND" x="0" y="-25.4"/>
+<gate name="G13" symbol="GND" x="2.54" y="-25.4"/>
+<gate name="G14" symbol="GND" x="5.08" y="-25.4"/>
+<gate name="G15" symbol="GND" x="7.62" y="-25.4"/>
+<gate name="G16" symbol="GND" x="10.16" y="-25.4"/>
+<gate name="G17" symbol="GND" x="12.7" y="-25.4"/>
+<gate name="G18" symbol="GND" x="15.24" y="-25.4"/>
+<gate name="G19" symbol="GND" x="17.78" y="-25.4"/>
+<gate name="V1" symbol="VCC1" x="-27.94" y="-7.62"/>
+<gate name="V2" symbol="VCC1" x="-25.4" y="-7.62"/>
+<gate name="V3" symbol="VCC1" x="-22.86" y="-7.62"/>
+<gate name="V4" symbol="VCC1" x="-20.32" y="-7.62"/>
+<gate name="V5" symbol="VCC1" x="-17.78" y="-7.62"/>
+<gate name="V6" symbol="VCC2" x="-12.7" y="-7.62"/>
+<gate name="V7" symbol="VCC2" x="-10.16" y="-7.62"/>
+<gate name="V8" symbol="VCC2" x="-7.62" y="-7.62"/>
+<gate name="V9" symbol="VCC2" x="-5.08" y="-7.62"/>
+<gate name="V10" symbol="VCC2" x="-2.54" y="-7.62"/>
+<gate name="V11" symbol="VC3" x="2.54" y="-7.62"/>
+<gate name="V12" symbol="VC3" x="5.08" y="-7.62"/>
+<gate name="V13" symbol="VC3" x="7.62" y="-7.62"/>
+<gate name="V14" symbol="VC3" x="10.16" y="-7.62"/>
+<gate name="V15" symbol="VC3" x="12.7" y="-7.62"/>
+<gate name="V16" symbol="VC3" x="15.24" y="-7.62"/>
+<gate name="V17" symbol="VC3" x="17.78" y="-7.62"/>
+<gate name="V18" symbol="VC3" x="20.32" y="-7.62"/>
+</gates>
+<devices>
+<device name="" package="TQFP144">
+<connects>
+<connect gate="A" pin="!CAS" pad="104"/>
+<connect gate="A" pin="!CS" pad="16"/>
+<connect gate="A" pin="!IO16" pad="4"/>
+<connect gate="A" pin="!PWDN" pad="137"/>
+<connect gate="A" pin="!RAS" pad="103"/>
+<connect gate="A" pin="!RD" pad="10"/>
+<connect gate="A" pin="!REFRESH" pad="105"/>
+<connect gate="A" pin="!RESET" pad="134"/>
+<connect gate="A" pin="!WR" pad="11"/>
+<connect gate="A" pin="A0" pad="12"/>
+<connect gate="A" pin="A1" pad="13"/>
+<connect gate="A" pin="A2" pad="15"/>
+<connect gate="A" pin="CK_OUT" pad="91"/>
+<connect gate="A" pin="IRQ" pad="14"/>
+<connect gate="A" pin="LDTEST" pad="136"/>
+<connect gate="A" pin="OVCK-OUT" pad="47"/>
+<connect gate="A" pin="RBS" pad="92"/>
+<connect gate="A" pin="READY" pad="7"/>
+<connect gate="A" pin="TEST" pad="135"/>
+<connect gate="A" pin="X1" pad="61"/>
+<connect gate="A" pin="X2" pad="62"/>
+<connect gate="B" pin="D0" pad="19"/>
+<connect gate="B" pin="D1" pad="22"/>
+<connect gate="B" pin="D10" pad="1"/>
+<connect gate="B" pin="D11" pad="144"/>
+<connect gate="B" pin="D12" pad="141"/>
+<connect gate="B" pin="D13" pad="140"/>
+<connect gate="B" pin="D14" pad="139"/>
+<connect gate="B" pin="D15" pad="138"/>
+<connect gate="B" pin="D2" pad="23"/>
+<connect gate="B" pin="D3" pad="24"/>
+<connect gate="B" pin="D4" pad="25"/>
+<connect gate="B" pin="D5" pad="26"/>
+<connect gate="B" pin="D6" pad="27"/>
+<connect gate="B" pin="D7" pad="28"/>
+<connect gate="B" pin="D8" pad="3"/>
+<connect gate="B" pin="D9" pad="2"/>
+<connect gate="C" pin="!WCS0" pad="89"/>
+<connect gate="C" pin="!WCS1" pad="90"/>
+<connect gate="C" pin="!WOE" pad="88"/>
+<connect gate="C" pin="!WWE" pad="87"/>
+<connect gate="C" pin="BCK-OUT" pad="46"/>
+<connect gate="C" pin="LFT" pad="60"/>
+<connect gate="C" pin="MIDI1_IN" pad="29"/>
+<connect gate="C" pin="MIDI1_OUT" pad="31"/>
+<connect gate="C" pin="MIDI2_IN" pad="30"/>
+<connect gate="C" pin="MIDI2_OUT" pad="32"/>
+<connect gate="C" pin="SD-IN0" pad="33"/>
+<connect gate="C" pin="SD-IN1" pad="34"/>
+<connect gate="C" pin="SD-IN2" pad="37"/>
+<connect gate="C" pin="SD-IN3" pad="38"/>
+<connect gate="C" pin="SD-IN4" pad="48"/>
+<connect gate="C" pin="SD-IN5" pad="49"/>
+<connect gate="C" pin="SD-IN6" pad="50"/>
+<connect gate="C" pin="SD-IN7" pad="53"/>
+<connect gate="C" pin="SD-OUT0" pad="39"/>
+<connect gate="C" pin="SD-OUT1" pad="40"/>
+<connect gate="C" pin="SD-OUT2" pad="43"/>
+<connect gate="C" pin="SD-OUT3" pad="44"/>
+<connect gate="C" pin="SD-OUT4" pad="54"/>
+<connect gate="C" pin="SD-OUT5" pad="55"/>
+<connect gate="C" pin="SD-OUT6" pad="56"/>
+<connect gate="C" pin="SD-OUT7" pad="57"/>
+<connect gate="C" pin="WS-OUT" pad="45"/>
+<connect gate="D" pin="WA0" pad="93"/>
+<connect gate="D" pin="WA1" pad="94"/>
+<connect gate="D" pin="WA10" pad="114"/>
+<connect gate="D" pin="WA11" pad="115"/>
+<connect gate="D" pin="WA12" pad="116"/>
+<connect gate="D" pin="WA13" pad="117"/>
+<connect gate="D" pin="WA14" pad="118"/>
+<connect gate="D" pin="WA15" pad="119"/>
+<connect gate="D" pin="WA16" pad="120"/>
+<connect gate="D" pin="WA17" pad="121"/>
+<connect gate="D" pin="WA18" pad="122"/>
+<connect gate="D" pin="WA19" pad="123"/>
+<connect gate="D" pin="WA2" pad="95"/>
+<connect gate="D" pin="WA20" pad="126"/>
+<connect gate="D" pin="WA21" pad="127"/>
+<connect gate="D" pin="WA22" pad="128"/>
+<connect gate="D" pin="WA23" pad="129"/>
+<connect gate="D" pin="WA24" pad="130"/>
+<connect gate="D" pin="WA25" pad="131"/>
+<connect gate="D" pin="WA26" pad="132"/>
+<connect gate="D" pin="WA3" pad="96"/>
+<connect gate="D" pin="WA4" pad="101"/>
+<connect gate="D" pin="WA5" pad="102"/>
+<connect gate="D" pin="WA6" pad="106"/>
+<connect gate="D" pin="WA7" pad="107"/>
+<connect gate="D" pin="WA8" pad="108"/>
+<connect gate="D" pin="WA9" pad="111"/>
+<connect gate="E" pin="WD0" pad="86"/>
+<connect gate="E" pin="WD1" pad="85"/>
+<connect gate="E" pin="WD10" pad="72"/>
+<connect gate="E" pin="WD11" pad="71"/>
+<connect gate="E" pin="WD12" pad="68"/>
+<connect gate="E" pin="WD13" pad="67"/>
+<connect gate="E" pin="WD14" pad="66"/>
+<connect gate="E" pin="WD15" pad="65"/>
+<connect gate="E" pin="WD2" pad="84"/>
+<connect gate="E" pin="WD3" pad="79"/>
+<connect gate="E" pin="WD4" pad="78"/>
+<connect gate="E" pin="WD5" pad="77"/>
+<connect gate="E" pin="WD6" pad="76"/>
+<connect gate="E" pin="WD7" pad="75"/>
+<connect gate="E" pin="WD8" pad="74"/>
+<connect gate="E" pin="WD9" pad="73"/>
+<connect gate="G1" pin="GND" pad="6"/>
+<connect gate="G10" pin="GND" pad="70"/>
+<connect gate="G11" pin="GND" pad="82"/>
+<connect gate="G12" pin="GND" pad="83"/>
+<connect gate="G13" pin="GND" pad="98"/>
+<connect gate="G14" pin="GND" pad="100"/>
+<connect gate="G15" pin="GND" pad="110"/>
+<connect gate="G16" pin="GND" pad="113"/>
+<connect gate="G17" pin="GND" pad="125"/>
+<connect gate="G18" pin="GND" pad="133"/>
+<connect gate="G19" pin="GND" pad="143"/>
+<connect gate="G2" pin="GND" pad="9"/>
+<connect gate="G3" pin="GND" pad="18"/>
+<connect gate="G4" pin="GND" pad="21"/>
+<connect gate="G5" pin="GND" pad="36"/>
+<connect gate="G6" pin="GND" pad="42"/>
+<connect gate="G7" pin="GND" pad="51"/>
+<connect gate="G8" pin="GND" pad="59"/>
+<connect gate="G9" pin="GND" pad="64"/>
+<connect gate="V1" pin="VCC1" pad="5"/>
+<connect gate="V10" pin="VCC2" pad="124"/>
+<connect gate="V11" pin="VC3" pad="8"/>
+<connect gate="V12" pin="VC3" pad="17"/>
+<connect gate="V13" pin="VC3" pad="41"/>
+<connect gate="V14" pin="VC3" pad="58"/>
+<connect gate="V15" pin="VC3" pad="63"/>
+<connect gate="V16" pin="VC3" pad="80"/>
+<connect gate="V17" pin="VC3" pad="99"/>
+<connect gate="V18" pin="VC3" pad="112"/>
+<connect gate="V2" pin="VCC1" pad="20"/>
+<connect gate="V3" pin="VCC1" pad="35"/>
+<connect gate="V4" pin="VCC1" pad="52"/>
+<connect gate="V5" pin="VCC1" pad="142"/>
+<connect gate="V6" pin="VCC2" pad="69"/>
+<connect gate="V7" pin="VCC2" pad="81"/>
+<connect gate="V8" pin="VCC2" pad="97"/>
+<connect gate="V9" pin="VCC2" pad="109"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8*C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.</description>
+<gates>
+<gate name="G$1" symbol="T8XC5121" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SSOP24">
+<connects>
+<connect gate="G$1" pin="CVCC" pad="3"/>
+<connect gate="G$1" pin="CVSS" pad="1"/>
+<connect gate="G$1" pin="DVCC" pad="22"/>
+<connect gate="G$1" pin="EVCC" pad="23"/>
+<connect gate="G$1" pin="LI" pad="2"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="9"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="8"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="7"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="6"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="5"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="4"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="19"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="16"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="18"/>
+<connect gate="G$1" pin="P3.4/T0" pad="17"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="15"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="14"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="13"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VSS" pad="21"/>
+<connect gate="G$1" pin="XTAL1" pad="12"/>
+<connect gate="G$1" pin="XTAL2" pad="11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8?C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/...doc4164.pdf</description>
+<gates>
+<gate name="G$1" symbol="T8X5121-PLCC52" x="0" y="0"/>
+</gates>
+<devices>
+<device name="3" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="5" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="9" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT8*C51SND1C" prefix="IC">
+<description>&lt;b&gt;Single-Chip Flash Microcontroller&lt;/b&gt;&lt;p&gt;
+with MP3 Decoder and Human Interface&lt;br&gt;
+Source: www.atmel.com .. doc4109.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C51SND1C" x="0" y="0"/>
+<gate name="P" symbol="P-AT89C51SND1C" x="40.64" y="-7.62" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DESL" pad="58"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0/A8" pad="78"/>
+<connect gate="G$1" pin="P2.1/A9" pad="77"/>
+<connect gate="G$1" pin="P2.2/A10" pad="71"/>
+<connect gate="G$1" pin="P2.3/A11" pad="70"/>
+<connect gate="G$1" pin="P2.4/A12" pad="69"/>
+<connect gate="G$1" pin="P2.5/A13" pad="68"/>
+<connect gate="G$1" pin="P2.6/A14" pad="67"/>
+<connect gate="G$1" pin="P2.7/A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+<connect gate="P" pin="PVDD" pad="23"/>
+<connect gate="P" pin="PVSS" pad="25"/>
+<connect gate="P" pin="UVDD" pad="31"/>
+<connect gate="P" pin="UVSS" pad="32"/>
+<connect gate="P" pin="VDD@1" pad="1"/>
+<connect gate="P" pin="VDD@2" pad="22"/>
+<connect gate="P" pin="VDD@3" pad="35"/>
+<connect gate="P" pin="VDD@4" pad="54"/>
+<connect gate="P" pin="VDD@5" pad="64"/>
+<connect gate="P" pin="VSS@1" pad="2"/>
+<connect gate="P" pin="VSS@2" pad="26"/>
+<connect gate="P" pin="VSS@3" pad="36"/>
+<connect gate="P" pin="VSS@4" pad="55"/>
+<connect gate="P" pin="VSS@5" pad="65"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-RO" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DESL" pad="45"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0/A8" pad="64"/>
+<connect gate="G$1" pin="P2.1/A9" pad="63"/>
+<connect gate="G$1" pin="P2.2/A10" pad="58"/>
+<connect gate="G$1" pin="P2.3/A11" pad="57"/>
+<connect gate="G$1" pin="P2.4/A12" pad="56"/>
+<connect gate="G$1" pin="P2.5/A13" pad="55"/>
+<connect gate="G$1" pin="P2.6/A14" pad="54"/>
+<connect gate="G$1" pin="P2.7/A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+<connect gate="P" pin="PVDD" pad="51"/>
+<connect gate="P" pin="PVSS" pad="14"/>
+<connect gate="P" pin="UVDD" pad="19"/>
+<connect gate="P" pin="UVSS" pad="20"/>
+<connect gate="P" pin="VDD@1" pad="11"/>
+<connect gate="P" pin="VDD@2" pad="12"/>
+<connect gate="P" pin="VDD@3" pad="23"/>
+<connect gate="P" pin="VDD@4" pad="41"/>
+<connect gate="P" pin="VDD@5" pad="71"/>
+<connect gate="P" pin="VSS@1" pad="15"/>
+<connect gate="P" pin="VSS@2" pad="24"/>
+<connect gate="P" pin="VSS@3" pad="42"/>
+<connect gate="P" pin="VSS@4" pad="52"/>
+<connect gate="P" pin="VSS@5" pad="72"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-7H" package="BGA81">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="B2"/>
+<connect gate="G$1" pin="!TST" pad="G2"/>
+<connect gate="G$1" pin="AIN0" pad="H5"/>
+<connect gate="G$1" pin="AIN1" pad="H7"/>
+<connect gate="G$1" pin="ALE" pad="A1"/>
+<connect gate="G$1" pin="AREFN" pad="J6"/>
+<connect gate="G$1" pin="AREFP" pad="J7"/>
+<connect gate="G$1" pin="AVDD" pad="F5"/>
+<connect gate="G$1" pin="AVSS" pad="H6"/>
+<connect gate="G$1" pin="D+" pad="J1"/>
+<connect gate="G$1" pin="D-" pad="H2"/>
+<connect gate="G$1" pin="DCLK" pad="H9"/>
+<connect gate="G$1" pin="DESL" pad="G9"/>
+<connect gate="G$1" pin="DOUT" pad="G7"/>
+<connect gate="G$1" pin="FILT" pad="E4"/>
+<connect gate="G$1" pin="MCLK" pad="F7"/>
+<connect gate="G$1" pin="MCMD" pad="F8"/>
+<connect gate="G$1" pin="MDAT" pad="F6"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="B3"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="B5"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="A4"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="A3"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="B4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="D5"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="C6"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="D6"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="C3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="B1"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="C1"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="C2"/>
+<connect gate="G$1" pin="P1.4" pad="D1"/>
+<connect gate="G$1" pin="P1.5" pad="D2"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="D4"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="D3"/>
+<connect gate="G$1" pin="P2.0/A8" pad="A8"/>
+<connect gate="G$1" pin="P2.1/A9" pad="C7"/>
+<connect gate="G$1" pin="P2.2/A10" pad="C8"/>
+<connect gate="G$1" pin="P2.3/A11" pad="E8"/>
+<connect gate="G$1" pin="P2.4/A12" pad="D9"/>
+<connect gate="G$1" pin="P2.5/A13" pad="C9"/>
+<connect gate="G$1" pin="P2.6/A14" pad="D8"/>
+<connect gate="G$1" pin="P2.7/A15" pad="E6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="J3"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="H3"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="J4"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="H4"/>
+<connect gate="G$1" pin="P3.4/T0" pad="F4"/>
+<connect gate="G$1" pin="P3.5/T1" pad="G4"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="J5"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="G5"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="A7"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="B7"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="A6"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="B6"/>
+<connect gate="G$1" pin="P4.4" pad="B9"/>
+<connect gate="G$1" pin="P4.5" pad="D7"/>
+<connect gate="G$1" pin="P4.6" pad="A9"/>
+<connect gate="G$1" pin="P4.7" pad="B8"/>
+<connect gate="G$1" pin="P5.0" pad="A2"/>
+<connect gate="G$1" pin="P5.1" pad="C4"/>
+<connect gate="G$1" pin="P5.2" pad="J8"/>
+<connect gate="G$1" pin="P5.3" pad="G6"/>
+<connect gate="G$1" pin="RST" pad="F9"/>
+<connect gate="G$1" pin="SCLK" pad="G8"/>
+<connect gate="G$1" pin="X1" pad="E2"/>
+<connect gate="G$1" pin="X2" pad="F1"/>
+<connect gate="P" pin="PVDD" pad="E3"/>
+<connect gate="P" pin="PVSS" pad="F2"/>
+<connect gate="P" pin="UVDD" pad="H1"/>
+<connect gate="P" pin="UVSS" pad="F3"/>
+<connect gate="P" pin="VDD@1" pad="A5"/>
+<connect gate="P" pin="VDD@2" pad="E1"/>
+<connect gate="P" pin="VDD@3" pad="E9"/>
+<connect gate="P" pin="VDD@4" pad="G3"/>
+<connect gate="P" pin="VDD@5" pad="J9"/>
+<connect gate="P" pin="VSS@1" pad="C5"/>
+<connect gate="P" pin="VSS@2" pad="E7"/>
+<connect gate="P" pin="VSS@3" pad="G1"/>
+<connect gate="P" pin="VSS@4" pad="H8"/>
+<connect gate="P" pin="VSS@5" pad="J2"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PC" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="31"/>
+<connect gate="G$1" pin="!PSEN" pad="29"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0" pad="1"/>
+<connect gate="G$1" pin="P1.1" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="10"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="11"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="17"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="JC" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="35"/>
+<connect gate="G$1" pin="!PSEN" pad="32"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0" pad="2"/>
+<connect gate="G$1" pin="P1.1" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="14"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="19"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51RE2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1455062" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3857" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-RLTUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095726" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1802" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51?*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="always"/>
+</gates>
+<devices>
+<device name="AC" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="QC" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="P" symbol="AT89S51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="31"/>
+<connect gate="P" pin="!PSEN" pad="29"/>
+<connect gate="P" pin="ALE/!PROG" pad="30"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="P0.0_AD0" pad="39"/>
+<connect gate="P" pin="P0.1_AD1" pad="38"/>
+<connect gate="P" pin="P0.2_AD2" pad="37"/>
+<connect gate="P" pin="P0.3_AD3" pad="36"/>
+<connect gate="P" pin="P0.4_AD4" pad="35"/>
+<connect gate="P" pin="P0.5_AD5" pad="34"/>
+<connect gate="P" pin="P0.6_AD6" pad="33"/>
+<connect gate="P" pin="P0.7_AD7" pad="32"/>
+<connect gate="P" pin="P1.0" pad="1"/>
+<connect gate="P" pin="P1.1" pad="2"/>
+<connect gate="P" pin="P1.2" pad="3"/>
+<connect gate="P" pin="P1.3" pad="4"/>
+<connect gate="P" pin="P1.4" pad="5"/>
+<connect gate="P" pin="P1.5_MOSI" pad="6"/>
+<connect gate="P" pin="P1.6_MISO" pad="7"/>
+<connect gate="P" pin="P1.7_SCK" pad="8"/>
+<connect gate="P" pin="P2.0_A8" pad="21"/>
+<connect gate="P" pin="P2.1_A9" pad="22"/>
+<connect gate="P" pin="P2.2_A10" pad="23"/>
+<connect gate="P" pin="P2.3_A11" pad="24"/>
+<connect gate="P" pin="P2.4_A12" pad="25"/>
+<connect gate="P" pin="P2.5_A13" pad="26"/>
+<connect gate="P" pin="P2.6_A14" pad="27"/>
+<connect gate="P" pin="P2.7_A15" pad="28"/>
+<connect gate="P" pin="P3.0/RXD" pad="10"/>
+<connect gate="P" pin="P3.1/TXD" pad="11"/>
+<connect gate="P" pin="P3.2/!INT0" pad="12"/>
+<connect gate="P" pin="P3.3/!INT1" pad="13"/>
+<connect gate="P" pin="P3.4/T0" pad="14"/>
+<connect gate="P" pin="P3.5/T1" pad="15"/>
+<connect gate="P" pin="P3.6/!WR" pad="16"/>
+<connect gate="P" pin="P3.7/!RD" pad="17"/>
+<connect gate="P" pin="RST" pad="9"/>
+<connect gate="P" pin="VCC" pad="40"/>
+<connect gate="P" pin="XTAL1" pad="19"/>
+<connect gate="P" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6577" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="S44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51*P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89S51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5_MOSI" pad="1"/>
+<connect gate="G$1" pin="P1.6_MISO" pad="2"/>
+<connect gate="G$1" pin="P1.7_SCK" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-?IM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02" x="0" y="0"/>
+</gates>
+<devices>
+<device name="TIS" package="SO28W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SIS" package="PLCC28">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="RAT" package="VQFP32">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="27"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="26"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="25"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="24"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="23"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="22"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="21"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="20"/>
+<connect gate="G$1" pin="P2.0" pad="19"/>
+<connect gate="G$1" pin="P2.1" pad="2"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="6"/>
+<connect gate="G$1" pin="P3.5/T1" pad="5"/>
+<connect gate="G$1" pin="P3.6" pad="4"/>
+<connect gate="G$1" pin="P3.7" pad="3"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="1"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="32"/>
+<connect gate="G$1" pin="RST" pad="17"/>
+<connect gate="G$1" pin="VAGND" pad="29"/>
+<connect gate="G$1" pin="VAREF" pad="28"/>
+<connect gate="G$1" pin="VAVCC" pad="31"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="G$1" pin="VSS" pad="16"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-TDSIM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02-SO24" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SO24W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="24"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="23"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="22"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="21"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="20"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="19"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="18"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="17"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="7"/>
+<connect gate="G$1" pin="P3.5/T1" pad="6"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="16"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91RM9200" prefix="IC">
+<description>Auto generated by &lt;b&gt;make-symbol-device-package(bsdl).ulp&lt;/b&gt;&lt;p&gt;
+Source: at91rm9200_bga.bsd</description>
+<gates>
+<gate name="G$1" symbol="AT91RM9200_BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LFBGA256_A_291X326">
+<connects>
+<connect gate="G$1" pin="A10_SDRAM" pad="N6"/>
+<connect gate="G$1" pin="A16_BA0" pad="U3"/>
+<connect gate="G$1" pin="A17_BA1" pad="T3"/>
+<connect gate="G$1" pin="A1_DQM2" pad="M4"/>
+<connect gate="G$1" pin="A_10" pad="M5"/>
+<connect gate="G$1" pin="A_11" pad="P5"/>
+<connect gate="G$1" pin="A_12" pad="P3"/>
+<connect gate="G$1" pin="A_13" pad="P2"/>
+<connect gate="G$1" pin="A_14" pad="N5"/>
+<connect gate="G$1" pin="A_15" pad="T1"/>
+<connect gate="G$1" pin="A_18" pad="R3"/>
+<connect gate="G$1" pin="A_19" pad="U4"/>
+<connect gate="G$1" pin="A_2" pad="M6"/>
+<connect gate="G$1" pin="A_20" pad="R4"/>
+<connect gate="G$1" pin="A_21" pad="N8"/>
+<connect gate="G$1" pin="A_22" pad="P6"/>
+<connect gate="G$1" pin="A_3" pad="M3"/>
+<connect gate="G$1" pin="A_4" pad="N4"/>
+<connect gate="G$1" pin="A_5" pad="N2"/>
+<connect gate="G$1" pin="A_6" pad="L4"/>
+<connect gate="G$1" pin="A_7" pad="P1"/>
+<connect gate="G$1" pin="A_8" pad="N7"/>
+<connect gate="G$1" pin="A_9" pad="N3"/>
+<connect gate="G$1" pin="CAS" pad="U8"/>
+<connect gate="G$1" pin="DM" pad="K2"/>
+<connect gate="G$1" pin="DP" pad="K5"/>
+<connect gate="G$1" pin="D_0" pad="R9"/>
+<connect gate="G$1" pin="D_1" pad="P10"/>
+<connect gate="G$1" pin="D_10" pad="P12"/>
+<connect gate="G$1" pin="D_11" pad="U12"/>
+<connect gate="G$1" pin="D_12" pad="T12"/>
+<connect gate="G$1" pin="D_13" pad="R12"/>
+<connect gate="G$1" pin="D_14" pad="U13"/>
+<connect gate="G$1" pin="D_15" pad="P13"/>
+<connect gate="G$1" pin="D_2" pad="N11"/>
+<connect gate="G$1" pin="D_3" pad="U9"/>
+<connect gate="G$1" pin="D_4" pad="M11"/>
+<connect gate="G$1" pin="D_5" pad="P11"/>
+<connect gate="G$1" pin="D_6" pad="U10"/>
+<connect gate="G$1" pin="D_7" pad="U11"/>
+<connect gate="G$1" pin="D_8" pad="R11"/>
+<connect gate="G$1" pin="D_9" pad="T11"/>
+<connect gate="G$1" pin="HDMA" pad="K3"/>
+<connect gate="G$1" pin="HDMB" pad="L3"/>
+<connect gate="G$1" pin="HDPA" pad="K1"/>
+<connect gate="G$1" pin="HDPB" pad="L2"/>
+<connect gate="G$1" pin="ICETCK" pad="E5"/>
+<connect gate="G$1" pin="ICETDI" pad="A1"/>
+<connect gate="G$1" pin="ICETDO" pad="B1"/>
+<connect gate="G$1" pin="ICETMS" pad="C1"/>
+<connect gate="G$1" pin="JTAGSEL" pad="A2"/>
+<connect gate="G$1" pin="MIX33VDD@1" pad="P16"/>
+<connect gate="G$1" pin="MIX33VDD@10" pad="D5"/>
+<connect gate="G$1" pin="MIX33VDD@11" pad="D2"/>
+<connect gate="G$1" pin="MIX33VDD@12" pad="D3"/>
+<connect gate="G$1" pin="MIX33VDD@13" pad="H5"/>
+<connect gate="G$1" pin="MIX33VDD@14" pad="K4"/>
+<connect gate="G$1" pin="MIX33VDD@15" pad="L6"/>
+<connect gate="G$1" pin="MIX33VDD@16" pad="M1"/>
+<connect gate="G$1" pin="MIX33VDD@17" pad="P4"/>
+<connect gate="G$1" pin="MIX33VDD@18" pad="R6"/>
+<connect gate="G$1" pin="MIX33VDD@19" pad="T5"/>
+<connect gate="G$1" pin="MIX33VDD@2" pad="R17"/>
+<connect gate="G$1" pin="MIX33VDD@20" pad="R10"/>
+<connect gate="G$1" pin="MIX33VDD@21" pad="R14"/>
+<connect gate="G$1" pin="MIX33VDD@3" pad="K16"/>
+<connect gate="G$1" pin="MIX33VDD@4" pad="H14"/>
+<connect gate="G$1" pin="MIX33VDD@5" pad="A16"/>
+<connect gate="G$1" pin="MIX33VDD@6" pad="A11"/>
+<connect gate="G$1" pin="MIX33VDD@7" pad="B11"/>
+<connect gate="G$1" pin="MIX33VDD@8" pad="D8"/>
+<connect gate="G$1" pin="MIX33VDD@9" pad="A7"/>
+<connect gate="G$1" pin="MIX33VSS@1" pad="M12"/>
+<connect gate="G$1" pin="MIX33VSS@10" pad="E6"/>
+<connect gate="G$1" pin="MIX33VSS@11" pad="D4"/>
+<connect gate="G$1" pin="MIX33VSS@12" pad="E3"/>
+<connect gate="G$1" pin="MIX33VSS@13" pad="G3"/>
+<connect gate="G$1" pin="MIX33VSS@14" pad="L1"/>
+<connect gate="G$1" pin="MIX33VSS@15" pad="L5"/>
+<connect gate="G$1" pin="MIX33VSS@16" pad="M2"/>
+<connect gate="G$1" pin="MIX33VSS@17" pad="R1"/>
+<connect gate="G$1" pin="MIX33VSS@18" pad="M7"/>
+<connect gate="G$1" pin="MIX33VSS@19" pad="U5"/>
+<connect gate="G$1" pin="MIX33VSS@2" pad="P17"/>
+<connect gate="G$1" pin="MIX33VSS@20" pad="T9"/>
+<connect gate="G$1" pin="MIX33VSS@21" pad="T13"/>
+<connect gate="G$1" pin="MIX33VSS@3" pad="J12"/>
+<connect gate="G$1" pin="MIX33VSS@4" pad="H16"/>
+<connect gate="G$1" pin="MIX33VSS@5" pad="C15"/>
+<connect gate="G$1" pin="MIX33VSS@6" pad="C11"/>
+<connect gate="G$1" pin="MIX33VSS@7" pad="D11"/>
+<connect gate="G$1" pin="MIX33VSS@8" pad="B7"/>
+<connect gate="G$1" pin="MIX33VSS@9" pad="E8"/>
+<connect gate="G$1" pin="NBS3" pad="R8"/>
+<connect gate="G$1" pin="NCS0_BFCS" pad="U6"/>
+<connect gate="G$1" pin="NCS1_SDCS" pad="M9"/>
+<connect gate="G$1" pin="NCS2" pad="T6"/>
+<connect gate="G$1" pin="NCS3" pad="R7"/>
+<connect gate="G$1" pin="NLBA0_DQM0" pad="N1"/>
+<connect gate="G$1" pin="NRDNOE" pad="N9"/>
+<connect gate="G$1" pin="NRST" pad="E1"/>
+<connect gate="G$1" pin="NRW0NWE" pad="P8"/>
+<connect gate="G$1" pin="NRW1_NUB_DQM1" pad="T7"/>
+<connect gate="G$1" pin="NTRST" pad="E2"/>
+<connect gate="G$1" pin="OSC32K_XIN" pad="G17"/>
+<connect gate="G$1" pin="OSC32K_XOUT" pad="H17"/>
+<connect gate="G$1" pin="OSC9M_XIN" pad="J17"/>
+<connect gate="G$1" pin="OSC9M_XOUT" pad="K17"/>
+<connect gate="G$1" pin="PA0" pad="G13"/>
+<connect gate="G$1" pin="PA1" pad="G14"/>
+<connect gate="G$1" pin="PA10" pad="D15"/>
+<connect gate="G$1" pin="PA11" pad="B15"/>
+<connect gate="G$1" pin="PA12" pad="B16"/>
+<connect gate="G$1" pin="PA13" pad="A17"/>
+<connect gate="G$1" pin="PA14" pad="A15"/>
+<connect gate="G$1" pin="PA15" pad="B14"/>
+<connect gate="G$1" pin="PA16" pad="D14"/>
+<connect gate="G$1" pin="PA17" pad="B13"/>
+<connect gate="G$1" pin="PA18" pad="C13"/>
+<connect gate="G$1" pin="PA19" pad="A13"/>
+<connect gate="G$1" pin="PA2" pad="G15"/>
+<connect gate="G$1" pin="PA20" pad="C12"/>
+<connect gate="G$1" pin="PA21" pad="D13"/>
+<connect gate="G$1" pin="PA22" pad="D12"/>
+<connect gate="G$1" pin="PA23" pad="A12"/>
+<connect gate="G$1" pin="PA24" pad="B12"/>
+<connect gate="G$1" pin="PA25" pad="E13"/>
+<connect gate="G$1" pin="PA26" pad="E12"/>
+<connect gate="G$1" pin="PA27" pad="G12"/>
+<connect gate="G$1" pin="PA28" pad="F12"/>
+<connect gate="G$1" pin="PA29" pad="E11"/>
+<connect gate="G$1" pin="PA3" pad="G16"/>
+<connect gate="G$1" pin="PA30" pad="F11"/>
+<connect gate="G$1" pin="PA31" pad="A10"/>
+<connect gate="G$1" pin="PA4" pad="F13"/>
+<connect gate="G$1" pin="PA5" pad="F16"/>
+<connect gate="G$1" pin="PA6" pad="E15"/>
+<connect gate="G$1" pin="PA7" pad="B17"/>
+<connect gate="G$1" pin="PA8" pad="C16"/>
+<connect gate="G$1" pin="PA9" pad="E14"/>
+<connect gate="G$1" pin="PB0" pad="B10"/>
+<connect gate="G$1" pin="PB1" pad="C10"/>
+<connect gate="G$1" pin="PB10" pad="B8"/>
+<connect gate="G$1" pin="PB11" pad="F9"/>
+<connect gate="G$1" pin="PB12" pad="C8"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="D7"/>
+<connect gate="G$1" pin="PB15" pad="E7"/>
+<connect gate="G$1" pin="PB16" pad="F7"/>
+<connect gate="G$1" pin="PB17" pad="A4"/>
+<connect gate="G$1" pin="PB18" pad="B3"/>
+<connect gate="G$1" pin="PB19" pad="C5"/>
+<connect gate="G$1" pin="PB2" pad="D10"/>
+<connect gate="G$1" pin="PB20" pad="A3"/>
+<connect gate="G$1" pin="PB21" pad="B4"/>
+<connect gate="G$1" pin="PB22" pad="C4"/>
+<connect gate="G$1" pin="PB23" pad="F3"/>
+<connect gate="G$1" pin="PB24" pad="F5"/>
+<connect gate="G$1" pin="PB25" pad="F4"/>
+<connect gate="G$1" pin="PB26" pad="G4"/>
+<connect gate="G$1" pin="PB27" pad="G6"/>
+<connect gate="G$1" pin="PB28" pad="J5"/>
+<connect gate="G$1" pin="PB29" pad="J6"/>
+<connect gate="G$1" pin="PB3" pad="E10"/>
+<connect gate="G$1" pin="PB4" pad="A9"/>
+<connect gate="G$1" pin="PB5" pad="B9"/>
+<connect gate="G$1" pin="PB6" pad="C9"/>
+<connect gate="G$1" pin="PB7" pad="E9"/>
+<connect gate="G$1" pin="PB8" pad="D9"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PC0" pad="M15"/>
+<connect gate="G$1" pin="PC1" pad="M14"/>
+<connect gate="G$1" pin="PC10" pad="L12"/>
+<connect gate="G$1" pin="PC11" pad="N16"/>
+<connect gate="G$1" pin="PC12" pad="N17"/>
+<connect gate="G$1" pin="PC13" pad="M13"/>
+<connect gate="G$1" pin="PC14" pad="M17"/>
+<connect gate="G$1" pin="PC15" pad="L13"/>
+<connect gate="G$1" pin="PC16" pad="U14"/>
+<connect gate="G$1" pin="PC17" pad="R13"/>
+<connect gate="G$1" pin="PC18" pad="U15"/>
+<connect gate="G$1" pin="PC19" pad="T14"/>
+<connect gate="G$1" pin="PC2" pad="L14"/>
+<connect gate="G$1" pin="PC20" pad="U16"/>
+<connect gate="G$1" pin="PC21" pad="T15"/>
+<connect gate="G$1" pin="PC22" pad="U17"/>
+<connect gate="G$1" pin="PC23" pad="T16"/>
+<connect gate="G$1" pin="PC24" pad="R15"/>
+<connect gate="G$1" pin="PC25" pad="T17"/>
+<connect gate="G$1" pin="PC26" pad="P14"/>
+<connect gate="G$1" pin="PC27" pad="P15"/>
+<connect gate="G$1" pin="PC28" pad="N13"/>
+<connect gate="G$1" pin="PC29" pad="R16"/>
+<connect gate="G$1" pin="PC3" pad="L15"/>
+<connect gate="G$1" pin="PC30" pad="N15"/>
+<connect gate="G$1" pin="PC31" pad="N14"/>
+<connect gate="G$1" pin="PC4" pad="K14"/>
+<connect gate="G$1" pin="PC5" pad="K13"/>
+<connect gate="G$1" pin="PC6" pad="K15"/>
+<connect gate="G$1" pin="PC7" pad="T4"/>
+<connect gate="G$1" pin="PC8" pad="R5"/>
+<connect gate="G$1" pin="PC9" pad="P7"/>
+<connect gate="G$1" pin="PD0" pad="E17"/>
+<connect gate="G$1" pin="PD1" pad="F15"/>
+<connect gate="G$1" pin="PD10" pad="C6"/>
+<connect gate="G$1" pin="PD11" pad="A5"/>
+<connect gate="G$1" pin="PD12" pad="B5"/>
+<connect gate="G$1" pin="PD13" pad="B2"/>
+<connect gate="G$1" pin="PD14" pad="C3"/>
+<connect gate="G$1" pin="PD15" pad="C2"/>
+<connect gate="G$1" pin="PD16" pad="F1"/>
+<connect gate="G$1" pin="PD17" pad="G2"/>
+<connect gate="G$1" pin="PD18" pad="G5"/>
+<connect gate="G$1" pin="PD19" pad="G1"/>
+<connect gate="G$1" pin="PD2" pad="F14"/>
+<connect gate="G$1" pin="PD20" pad="H2"/>
+<connect gate="G$1" pin="PD21" pad="H4"/>
+<connect gate="G$1" pin="PD22" pad="H3"/>
+<connect gate="G$1" pin="PD23" pad="H1"/>
+<connect gate="G$1" pin="PD24" pad="J3"/>
+<connect gate="G$1" pin="PD25" pad="J1"/>
+<connect gate="G$1" pin="PD26" pad="J4"/>
+<connect gate="G$1" pin="PD27" pad="J2"/>
+<connect gate="G$1" pin="PD3" pad="E16"/>
+<connect gate="G$1" pin="PD4" pad="D17"/>
+<connect gate="G$1" pin="PD5" pad="C17"/>
+<connect gate="G$1" pin="PD6" pad="D16"/>
+<connect gate="G$1" pin="PD7" pad="D6"/>
+<connect gate="G$1" pin="PD8" pad="A6"/>
+<connect gate="G$1" pin="PD9" pad="B6"/>
+<connect gate="G$1" pin="PLL_A_RC" pad="L17"/>
+<connect gate="G$1" pin="PLL_B_RC" pad="F17"/>
+<connect gate="G$1" pin="RAS" pad="N10"/>
+<connect gate="G$1" pin="SDRAMCKE" pad="P9"/>
+<connect gate="G$1" pin="SDRAMCLK" pad="U7"/>
+<connect gate="G$1" pin="TST0" pad="E4"/>
+<connect gate="G$1" pin="TST1" pad="D1"/>
+<connect gate="G$1" pin="VDDI@1" pad="L16"/>
+<connect gate="G$1" pin="VDDI@2" pad="C14"/>
+<connect gate="G$1" pin="VDDI@3" pad="F6"/>
+<connect gate="G$1" pin="VDDI@4" pad="U1"/>
+<connect gate="G$1" pin="VDDI@5" pad="T2"/>
+<connect gate="G$1" pin="VDDI@6" pad="T10"/>
+<connect gate="G$1" pin="VDDI@7" pad="J15"/>
+<connect gate="G$1" pin="VDDI@8" pad="J14"/>
+<connect gate="G$1" pin="VDDI@9" pad="H13"/>
+<connect gate="G$1" pin="VSSI@1" pad="M16"/>
+<connect gate="G$1" pin="VSSI@2" pad="A14"/>
+<connect gate="G$1" pin="VSSI@3" pad="F2"/>
+<connect gate="G$1" pin="VSSI@4" pad="U2"/>
+<connect gate="G$1" pin="VSSI@5" pad="R2"/>
+<connect gate="G$1" pin="VSSI@6" pad="N12"/>
+<connect gate="G$1" pin="VSSI@7" pad="J16"/>
+<connect gate="G$1" pin="VSSI@8" pad="J13"/>
+<connect gate="G$1" pin="VSSI@9" pad="H15"/>
+<connect gate="G$1" pin="WE" pad="T8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91RM9200-EK" constant="no"/>
+<attribute name="OC_FARNELL" value="1629536" constant="no"/>
+<attribute name="OC_NEWARK" value="02P6234" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATF16V8B" prefix="IC">
+<description>&lt;b&gt;High perfomance CMOS (electrically erasable) programmable logic device (PLD)&lt;/b&gt;&lt;p&gt;
+ABLE-Atmel-ABEL - P18V8R, P16V8C, P16V8AS, P17V8&lt;br&gt;
+COPL Atmel-WinCUPL - G16V8MS, G16V8MA, G16V8AS, G16V8&lt;br&gt;
+LOG/IC - GAL16V8_R, GAL16V8_G7, GAL16V8_C), GAL16V8&lt;br&gt;
+Tango-PLD - G16V8R, G16V8C, G16V8AS, G16V8&lt;br&gt;
+
+
+Source: http://www.atmel.com/dyn/resources/prod_documents/DOC0364.PDF</description>
+<gates>
+<gate name="G$1" symbol="ATF16V8B" x="0" y="0"/>
+</gates>
+<devices>
+<device name="X" package="TSSOP20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551767" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6253" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P3" package="DIL20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551768" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6254" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="-MI" package="MLF32">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-AI" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171371" constant="no"/>
+<attribute name="OC_NEWARK" value="73M8863" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 4-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="8"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="14"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="15"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="16"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="17"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="18"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="19"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="9"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="10"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="1"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="2"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="3"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="4"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="5"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="6"/>
+<connect gate="G$1" pin="PD5(T1)" pad="11"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="13"/>
+<connect gate="G$1" pin="VCC@1" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455107" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6885" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171274" constant="no"/>
+<attribute name="OC_NEWARK" value="69K6677" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1661729" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1794" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171355" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6899" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171118" constant="no"/>
+<attribute name="OC_NEWARK" value="95K7364" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA169PV-8AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1617046" constant="no"/>
+<attribute name="OC_NEWARK" value="03P4011" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA1284" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+16 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA1284" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0/PCINT0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1/PCINT1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2/PCINT2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3/PCINT3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4/PCINT4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5/PCINT5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6/PCINT6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7/PCINT7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2/PCINT10)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0A/PCINT11)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP/OC2B/PCINT30)PD6" pad="15"/>
+<connect gate="G$1" pin="(MISO/OC3A/PCINT14)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI/PCINT13/ICP3)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A/PCINT29)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B/XCK1/PCINT28)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2A/PCINT31)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD0/T3/PCINT24)PD0" pad="9"/>
+<connect gate="G$1" pin="(RXD1/INT0/PCINT26)PD2" pad="11"/>
+<connect gate="G$1" pin="(SCK/OC3B/PCINT15)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS/OCB0/PCINT12)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK0/PCINT8)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1/CLKO/PCINT9)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK/PCINT18)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI/PCINT21)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO/PCINT20)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS/PCINT19)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1/PCINT22)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2/PCINT23)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD0/PCINT25)PD1" pad="10"/>
+<connect gate="G$1" pin="(TXD1/INT1/PCINT27)PD3" pad="12"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL/PCINT16)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA/PCINT17)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171410" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6904" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="16"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="35"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="33"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="32"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562625" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6261" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-7" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="14"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="31"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="30"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="29"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171401" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6905" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1528437" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6908" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="GND1" pad="12"/>
+<connect gate="G$1" pin="GND2" pad="24"/>
+<connect gate="G$1" pin="GND@1" pad="34"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="25"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="11"/>
+<connect gate="G$1" pin="VCC1" pad="23"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562626" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6263" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/OC0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/INT2)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171444" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6909" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C513*-" prefix="IC">
+<description>&lt;b&gt;8-bit Flash Microcontroller with Full Speed USB Device&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4136.pdf&lt;p&gt;
+&lt;b&gt;&lt;i&gt;Data sheet mistake:&lt;/i&gt; &lt;/b&gt;define Packge type pin description for MLF48 but Order Number for QFN32 !?</description>
+<gates>
+<gate name="G$1" symbol="AT89C5131" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="26"/>
+<connect gate="G$1" pin="!PSEN" pad="28"/>
+<connect gate="G$1" pin="!RST" pad="43"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="AVDD" pad="17"/>
+<connect gate="G$1" pin="AVSS" pad="19"/>
+<connect gate="G$1" pin="D+" pad="23"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="FREV" pad="24"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="52"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="45"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="44"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="42"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="47"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="48"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="49"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="50"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="51"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="4"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="5"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="6"/>
+<connect gate="G$1" pin="P2.0_A8" pad="1"/>
+<connect gate="G$1" pin="P2.1_A9" pad="2"/>
+<connect gate="G$1" pin="P2.2_A10" pad="3"/>
+<connect gate="G$1" pin="P2.3_A11" pad="9"/>
+<connect gate="G$1" pin="P2.4_A12" pad="10"/>
+<connect gate="G$1" pin="P2.5_A13" pad="11"/>
+<connect gate="G$1" pin="P2.6_A14" pad="14"/>
+<connect gate="G$1" pin="P2.7_A15" pad="15"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="29"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="30"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="31"/>
+<connect gate="G$1" pin="P3.4/T0" pad="32"/>
+<connect gate="G$1" pin="P3.5/T1" pad="33"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="7"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="8"/>
+<connect gate="G$1" pin="PLLF" pad="21"/>
+<connect gate="G$1" pin="VDD" pad="16"/>
+<connect gate="G$1" pin="VSS" pad="41"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C5131A-S3SUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095721" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6570" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="VQFP64">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="24"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="!RST" pad="44"/>
+<connect gate="G$1" pin="ALE" pad="25"/>
+<connect gate="G$1" pin="AVDD" pad="10"/>
+<connect gate="G$1" pin="AVSS" pad="12"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="20"/>
+<connect gate="G$1" pin="FREV" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="55"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="46"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="45"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="43"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="50"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="51"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="52"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="53"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="54"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="59"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="60"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="61"/>
+<connect gate="G$1" pin="P2.0_A8" pad="56"/>
+<connect gate="G$1" pin="P2.1_A9" pad="57"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="2"/>
+<connect gate="G$1" pin="P2.4_A12" pad="3"/>
+<connect gate="G$1" pin="P2.5_A13" pad="4"/>
+<connect gate="G$1" pin="P2.6_A14" pad="7"/>
+<connect gate="G$1" pin="P2.7_A15" pad="8"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="27"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="28"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="29"/>
+<connect gate="G$1" pin="P3.4/T0" pad="30"/>
+<connect gate="G$1" pin="P3.5/T1" pad="31"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="62"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="63"/>
+<connect gate="G$1" pin="PLLF" pad="19"/>
+<connect gate="G$1" pin="VDD" pad="9"/>
+<connect gate="G$1" pin="VSS" pad="42"/>
+<connect gate="G$1" pin="XTAL1" pad="6"/>
+<connect gate="G$1" pin="XTAL2" pad="5"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C5132" prefix="IC">
+<description>&lt;b&gt;USB Microcontroller with 64K Bytes Flash Memory&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4173.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C5132" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="DSEL" pad="45"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0_A8" pad="64"/>
+<connect gate="G$1" pin="P2.1_A9" pad="63"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="57"/>
+<connect gate="G$1" pin="P2.4_A12" pad="56"/>
+<connect gate="G$1" pin="P2.5_A13" pad="55"/>
+<connect gate="G$1" pin="P2.6_A14" pad="54"/>
+<connect gate="G$1" pin="P2.7_A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="PVDD" pad="12"/>
+<connect gate="G$1" pin="PVSS" pad="14"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="UVDD" pad="19"/>
+<connect gate="G$1" pin="UVSS" pad="20"/>
+<connect gate="G$1" pin="VDD" pad="11"/>
+<connect gate="G$1" pin="VDD@1" pad="23"/>
+<connect gate="G$1" pin="VDD@2" pad="41"/>
+<connect gate="G$1" pin="VDD@3" pad="51"/>
+<connect gate="G$1" pin="VDD@4" pad="71"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="VSS@1" pad="24"/>
+<connect gate="G$1" pin="VSS@2" pad="42"/>
+<connect gate="G$1" pin="VSS@3" pad="52"/>
+<connect gate="G$1" pin="VSS@4" pad="72"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="DEVELOP" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="DSEL" pad="58"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0_A8" pad="78"/>
+<connect gate="G$1" pin="P2.1_A9" pad="77"/>
+<connect gate="G$1" pin="P2.2_A10" pad="71"/>
+<connect gate="G$1" pin="P2.3_A11" pad="70"/>
+<connect gate="G$1" pin="P2.4_A12" pad="69"/>
+<connect gate="G$1" pin="P2.5_A13" pad="68"/>
+<connect gate="G$1" pin="P2.6_A14" pad="67"/>
+<connect gate="G$1" pin="P2.7_A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="PVDD" pad="23"/>
+<connect gate="G$1" pin="PVSS" pad="25"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="UVDD" pad="31"/>
+<connect gate="G$1" pin="UVSS" pad="32"/>
+<connect gate="G$1" pin="VDD" pad="1"/>
+<connect gate="G$1" pin="VDD@1" pad="22"/>
+<connect gate="G$1" pin="VDD@2" pad="35"/>
+<connect gate="G$1" pin="VDD@3" pad="54"/>
+<connect gate="G$1" pin="VDD@4" pad="64"/>
+<connect gate="G$1" pin="VSS" pad="2"/>
+<connect gate="G$1" pin="VSS@1" pad="26"/>
+<connect gate="G$1" pin="VSS@2" pad="36"/>
+<connect gate="G$1" pin="VSS@3" pad="55"/>
+<connect gate="G$1" pin="VSS@4" pad="65"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-MI" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O_MI" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A_M" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455097" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535_M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*-M" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455123" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3748" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="QFN44ML8X8">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748529" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5637" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644E" x="0" y="0"/>
+</gates>
+<devices>
+<device name="M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="EXP" pad="TH"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644P-20MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748528" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5636" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-AU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LQFP100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="3"/>
+<connect gate="G$1" pin="AD5" pad="4"/>
+<connect gate="G$1" pin="AD6" pad="5"/>
+<connect gate="G$1" pin="AD7" pad="6"/>
+<connect gate="G$1" pin="ADVREF" pad="1"/>
+<connect gate="G$1" pin="DDM" pad="93"/>
+<connect gate="G$1" pin="DDP" pad="94"/>
+<connect gate="G$1" pin="ERASE" pad="92"/>
+<connect gate="G$1" pin="GND@1" pad="2"/>
+<connect gate="G$1" pin="GND@2" pad="16"/>
+<connect gate="G$1" pin="GND@3" pad="32"/>
+<connect gate="G$1" pin="GND@4" pad="52"/>
+<connect gate="G$1" pin="GND@5" pad="68"/>
+<connect gate="G$1" pin="GND@6" pad="83"/>
+<connect gate="G$1" pin="GND@7" pad="96"/>
+<connect gate="G$1" pin="JTAGSEL" pad="77"/>
+<connect gate="G$1" pin="NRST" pad="57"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="81"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="82"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="18"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="19"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="20"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="21"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="22"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="23"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="24"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="25"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="26"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="86"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="47"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="49"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="50"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="55"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="56"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="59"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="60"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="73"/>
+<connect gate="G$1" pin="PA28" pad="74"/>
+<connect gate="G$1" pin="PA29" pad="75"/>
+<connect gate="G$1" pin="PA3" pad="85"/>
+<connect gate="G$1" pin="PA30" pad="80"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="88"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="89"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="90"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="91"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="13"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="14"/>
+<connect gate="G$1" pin="PB0" pad="40"/>
+<connect gate="G$1" pin="PB1" pad="41"/>
+<connect gate="G$1" pin="PB10" pad="44"/>
+<connect gate="G$1" pin="PB11" pad="45"/>
+<connect gate="G$1" pin="PB12" pad="39"/>
+<connect gate="G$1" pin="PB13" pad="30"/>
+<connect gate="G$1" pin="PB14" pad="29"/>
+<connect gate="G$1" pin="PB15" pad="35"/>
+<connect gate="G$1" pin="PB16" pad="53"/>
+<connect gate="G$1" pin="PB17" pad="36"/>
+<connect gate="G$1" pin="PB18" pad="63"/>
+<connect gate="G$1" pin="PB19" pad="64"/>
+<connect gate="G$1" pin="PB2" pad="42"/>
+<connect gate="G$1" pin="PB20" pad="65"/>
+<connect gate="G$1" pin="PB21" pad="66"/>
+<connect gate="G$1" pin="PB22" pad="67"/>
+<connect gate="G$1" pin="PB23" pad="69"/>
+<connect gate="G$1" pin="PB24" pad="70"/>
+<connect gate="G$1" pin="PB25" pad="71"/>
+<connect gate="G$1" pin="PB26" pad="72"/>
+<connect gate="G$1" pin="PB27/AD0" pad="9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="10"/>
+<connect gate="G$1" pin="PB29/AD2" pad="11"/>
+<connect gate="G$1" pin="PB3" pad="43"/>
+<connect gate="G$1" pin="PB30/AD3" pad="12"/>
+<connect gate="G$1" pin="PB4" pad="54"/>
+<connect gate="G$1" pin="PB5" pad="34"/>
+<connect gate="G$1" pin="PB6" pad="31"/>
+<connect gate="G$1" pin="PB7" pad="38"/>
+<connect gate="G$1" pin="PB8" pad="28"/>
+<connect gate="G$1" pin="PB9" pad="27"/>
+<connect gate="G$1" pin="PLLRC" pad="99"/>
+<connect gate="G$1" pin="TCK" pad="79"/>
+<connect gate="G$1" pin="TDI" pad="51"/>
+<connect gate="G$1" pin="TDO" pad="76"/>
+<connect gate="G$1" pin="TMS" pad="78"/>
+<connect gate="G$1" pin="TST" pad="58"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="15"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="37"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="62"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="87"/>
+<connect gate="G$1" pin="VDDFLASH" pad="95"/>
+<connect gate="G$1" pin="VDDIN@1" pad="8"/>
+<connect gate="G$1" pin="VDDIO@1" pad="17"/>
+<connect gate="G$1" pin="VDDIO@2" pad="33"/>
+<connect gate="G$1" pin="VDDIO@3" pad="48"/>
+<connect gate="G$1" pin="VDDIO@4" pad="61"/>
+<connect gate="G$1" pin="VDDIO@5" pad="84"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="7"/>
+<connect gate="G$1" pin="VDDPLL" pad="100"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="97"/>
+<connect gate="G$1" pin="XOUT" pad="98"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X128B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288326" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5682" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X256B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288327" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5683" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X512-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288328" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5090" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-CU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X-BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TFBGA100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="K9"/>
+<connect gate="G$1" pin="AD5" pad="K8"/>
+<connect gate="G$1" pin="AD6" pad="K7"/>
+<connect gate="G$1" pin="AD7" pad="K6"/>
+<connect gate="G$1" pin="ADVREF" pad="K10"/>
+<connect gate="G$1" pin="DDM" pad="K4"/>
+<connect gate="G$1" pin="DDP" pad="K3"/>
+<connect gate="G$1" pin="ERASE" pad="F7"/>
+<connect gate="G$1" pin="GND@1" pad="E6"/>
+<connect gate="G$1" pin="GND@2" pad="E10"/>
+<connect gate="G$1" pin="GND@3" pad="F9"/>
+<connect gate="G$1" pin="GND@4" pad="G8"/>
+<connect gate="G$1" pin="GND@5" pad="J6"/>
+<connect gate="G$1" pin="GND@6" pad="J9"/>
+<connect gate="G$1" pin="GND@7" pad="K5"/>
+<connect gate="G$1" pin="JTAGSEL" pad="H3"/>
+<connect gate="G$1" pin="NRST" pad="D3"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="J3"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="J4"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="D7"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="D10"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="C9"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="C8"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="B8"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="C10"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="B9"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="B10"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="A9"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="B2"/>
+<connect gate="G$1" pin="PA2" pad="G5"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="A3"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="A2"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="A1"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="D1"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="D2"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="E1"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="E2"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="G3"/>
+<connect gate="G$1" pin="PA28" pad="H2"/>
+<connect gate="G$1" pin="PA29" pad="J1"/>
+<connect gate="G$1" pin="PA3" pad="H4"/>
+<connect gate="G$1" pin="PA30" pad="J2"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="H5"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="G6"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="F6"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="H6"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="H8"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="H7"/>
+<connect gate="G$1" pin="PB0" pad="C5"/>
+<connect gate="G$1" pin="PB1" pad="A4"/>
+<connect gate="G$1" pin="PB10" pad="C3"/>
+<connect gate="G$1" pin="PB11" pad="B3"/>
+<connect gate="G$1" pin="PB12" pad="B5"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="B7"/>
+<connect gate="G$1" pin="PB15" pad="B6"/>
+<connect gate="G$1" pin="PB16" pad="C1"/>
+<connect gate="G$1" pin="PB17" pad="C6"/>
+<connect gate="G$1" pin="PB18" pad="E3"/>
+<connect gate="G$1" pin="PB19" pad="D5"/>
+<connect gate="G$1" pin="PB2" pad="B4"/>
+<connect gate="G$1" pin="PB20" pad="E4"/>
+<connect gate="G$1" pin="PB21" pad="F1"/>
+<connect gate="G$1" pin="PB22" pad="G1"/>
+<connect gate="G$1" pin="PB23" pad="F2"/>
+<connect gate="G$1" pin="PB24" pad="G2"/>
+<connect gate="G$1" pin="PB25" pad="F3"/>
+<connect gate="G$1" pin="PB26" pad="F4"/>
+<connect gate="G$1" pin="PB27/AD0" pad="D9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="E8"/>
+<connect gate="G$1" pin="PB29/AD2" pad="H9"/>
+<connect gate="G$1" pin="PB3" pad="C4"/>
+<connect gate="G$1" pin="PB30/AD3" pad="G9"/>
+<connect gate="G$1" pin="PB4" pad="C2"/>
+<connect gate="G$1" pin="PB5" pad="A6"/>
+<connect gate="G$1" pin="PB6" pad="D6"/>
+<connect gate="G$1" pin="PB7" pad="A5"/>
+<connect gate="G$1" pin="PB8" pad="A7"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PLLRC" pad="H10"/>
+<connect gate="G$1" pin="TCK" pad="F5"/>
+<connect gate="G$1" pin="TDI" pad="B1"/>
+<connect gate="G$1" pin="TDO" pad="G4"/>
+<connect gate="G$1" pin="TMS" pad="E5"/>
+<connect gate="G$1" pin="TST" pad="D4"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="F8"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="G7"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="H1"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="K1"/>
+<connect gate="G$1" pin="VDDCORE@5" pad="K2"/>
+<connect gate="G$1" pin="VDDFLASH" pad="J5"/>
+<connect gate="G$1" pin="VDDIN@1" pad="F10"/>
+<connect gate="G$1" pin="VDDIO@1" pad="A10"/>
+<connect gate="G$1" pin="VDDIO@2" pad="D8"/>
+<connect gate="G$1" pin="VDDIO@3" pad="E7"/>
+<connect gate="G$1" pin="VDDIO@4" pad="E9"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="G10"/>
+<connect gate="G$1" pin="VDDPLL" pad="J10"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="J7"/>
+<connect gate="G$1" pin="XOUT" pad="J8"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C46A-10?Q-2.7" prefix="IC">
+<description>&lt;b&gt;Three-wire Automotive Temperature Serial EEPROM&lt;/b&gt; 1K (64 x 16)&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc5089.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT93C46A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46DN-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1455086" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3879" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSSOP8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PU" package="DIL08">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171550" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6521" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171576" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6523" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SSU" package="8S1">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455133" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3771" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455135" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3773" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171568" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6522" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171584" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6524" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13*" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+<gate name="P" symbol="GND" x="35.56" y="0" addlevel="request"/>
+</gates>
+<devices>
+<device name="MM0" package="10M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="6"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="7"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="9"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="4"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="P" pin="GND" pad="11"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MU" package="20M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="11"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="12"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="14"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="5"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="P" pin="GND" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715517" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0299" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455134" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3772" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T7024" prefix="IC">
+<description>&lt;b&gt;Bluetooth/ISM 2.4-GHz Front-End IC&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4533.pdf</description>
+<gates>
+<gate name="G$1" symbol="T7024" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF20-5X5-TH">
+<connects>
+<connect gate="G$1" pin="EXP" pad="EXP"/>
+<connect gate="G$1" pin="GND@1" pad="6"/>
+<connect gate="G$1" pin="GND@2" pad="8"/>
+<connect gate="G$1" pin="GND@3" pad="10"/>
+<connect gate="G$1" pin="GND@4" pad="14"/>
+<connect gate="G$1" pin="GND@5" pad="18"/>
+<connect gate="G$1" pin="LNA_IN" pad="7"/>
+<connect gate="G$1" pin="LNA_OUT" pad="1"/>
+<connect gate="G$1" pin="PA_IN" pad="20"/>
+<connect gate="G$1" pin="PU" pad="3"/>
+<connect gate="G$1" pin="RAMP" pad="15"/>
+<connect gate="G$1" pin="RX_ON" pad="2"/>
+<connect gate="G$1" pin="R_SWITCH" pad="4"/>
+<connect gate="G$1" pin="SWITCH_OUT" pad="5"/>
+<connect gate="G$1" pin="V1_PA" pad="19"/>
+<connect gate="G$1" pin="V2_PA@1" pad="16"/>
+<connect gate="G$1" pin="V2_PA@2" pad="17"/>
+<connect gate="G$1" pin="V3_PA_OUT@1" pad="11"/>
+<connect gate="G$1" pin="V3_PA_OUT@2" pad="12"/>
+<connect gate="G$1" pin="V3_PA_OUT@3" pad="13"/>
+<connect gate="G$1" pin="VS_LNA" pad="9"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA16A4" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt; High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 16 KB - 128 KB of In-System Self-Programmable Flash&lt;br&gt;
+- 4 KB - 8 KB Boot Code Section with Independent Lock Bits&lt;br&gt;
+- 1 KB - 2 KB EEPROM&lt;br&gt;
+- 2 KB - 8 KB Internal SRAM
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Five 16-bit Timer/Counters
+&lt;ul&gt;Three Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Two Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extensions on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on one Timer/Counter&lt;/ul&gt;
+- Five USARTs
+&lt;ul&gt;IrDA Extension on one USART&lt;/ul&gt;
+- Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Two SPIs (Serial Peripheral Interfaces) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with Separate Oscillator&lt;br&gt;
+- One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter&lt;br&gt;
+- One Two-channel, 12-bit, 1 Msps Digital to Analog Converter&lt;br&gt;
+- Two Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;&lt;br&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;PDI (Program and Debug Interface) for programming, test and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 34 Programmable I/O Lines&lt;br&gt;
+- 44 - lead TQFP&lt;br&gt;
+- 44 - pad VQFN/QFN&lt;br&gt;
+- 49 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA16A4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M1" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA128A1" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt;High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 64K - 384K Bytes of In-System Self-Programmable Flash&lt;br&gt;
+- 4K - 8K Bytes Boot Section with Independent Lock Bits&lt;br&gt;
+- 2 KB - 4 KB EEPROM&lt;br&gt;
+- 4 KB - 32 KB Internal SRAM
+&lt;ul&gt;External Bus Interface for up to 16M bytes SRAM&lt;/ul&gt;
+&lt;ul&gt;External Bus Interface for up to 128M bit SDRAM&lt;/ul&gt;
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Eight 16-bit Timer/Counters
+&lt;ul&gt;Four Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Four Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extension on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on two Timer/Counters&lt;/ul&gt;
+- Eight USARTs
+&lt;ul&gt;IrDA modulation/demodulation for one USART&lt;/ul&gt;
+- Four Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Four SPI (Serial Peripheral Interface) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with separate Oscillator&lt;br&gt;
+- Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters&lt;br&gt;
+- Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters&lt;br&gt;
+- Four Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL and Prescaler&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;JTAG (IEEE 1149.1 Compliant) Interface for programming, test and debugging&lt;/ul&gt;
+&lt;ul&gt;PDI (Program and Debug Interface) for programming and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 78 Programmable I/O Lines&lt;br&gt;
+- 100 - lead TQFP&lt;br&gt;
+- 100 - ball CBGA&lt;br&gt;
+- 100 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA128A1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="90"/>
+<connect gate="G$1" pin="AVCC" pad="4"/>
+<connect gate="G$1" pin="AVCC1" pad="94"/>
+<connect gate="G$1" pin="GND" pad="3"/>
+<connect gate="G$1" pin="GND1" pad="13"/>
+<connect gate="G$1" pin="GND2" pad="23"/>
+<connect gate="G$1" pin="GND3" pad="33"/>
+<connect gate="G$1" pin="GND4" pad="43"/>
+<connect gate="G$1" pin="GND5" pad="53"/>
+<connect gate="G$1" pin="GND6" pad="63"/>
+<connect gate="G$1" pin="GND7" pad="73"/>
+<connect gate="G$1" pin="GND8" pad="84"/>
+<connect gate="G$1" pin="GND9" pad="93"/>
+<connect gate="G$1" pin="PA0" pad="95"/>
+<connect gate="G$1" pin="PA1" pad="96"/>
+<connect gate="G$1" pin="PA2" pad="97"/>
+<connect gate="G$1" pin="PA3" pad="98"/>
+<connect gate="G$1" pin="PA4" pad="99"/>
+<connect gate="G$1" pin="PA5" pad="100"/>
+<connect gate="G$1" pin="PA6" pad="1"/>
+<connect gate="G$1" pin="PA7" pad="2"/>
+<connect gate="G$1" pin="PB0" pad="5"/>
+<connect gate="G$1" pin="PB1" pad="6"/>
+<connect gate="G$1" pin="PB2" pad="7"/>
+<connect gate="G$1" pin="PB3" pad="8"/>
+<connect gate="G$1" pin="PB4" pad="9"/>
+<connect gate="G$1" pin="PB5" pad="10"/>
+<connect gate="G$1" pin="PB6" pad="11"/>
+<connect gate="G$1" pin="PB7" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="15"/>
+<connect gate="G$1" pin="PC1" pad="16"/>
+<connect gate="G$1" pin="PC2" pad="17"/>
+<connect gate="G$1" pin="PC3" pad="18"/>
+<connect gate="G$1" pin="PC4" pad="19"/>
+<connect gate="G$1" pin="PC5" pad="20"/>
+<connect gate="G$1" pin="PC6" pad="21"/>
+<connect gate="G$1" pin="PC7" pad="22"/>
+<connect gate="G$1" pin="PD0" pad="25"/>
+<connect gate="G$1" pin="PD1" pad="26"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PDI_DATA" pad="89"/>
+<connect gate="G$1" pin="PE0" pad="35"/>
+<connect gate="G$1" pin="PE1" pad="36"/>
+<connect gate="G$1" pin="PE2" pad="37"/>
+<connect gate="G$1" pin="PE3" pad="38"/>
+<connect gate="G$1" pin="PE4" pad="39"/>
+<connect gate="G$1" pin="PE5" pad="40"/>
+<connect gate="G$1" pin="PE6" pad="41"/>
+<connect gate="G$1" pin="PE7" pad="42"/>
+<connect gate="G$1" pin="PF0" pad="45"/>
+<connect gate="G$1" pin="PF1" pad="46"/>
+<connect gate="G$1" pin="PF2" pad="47"/>
+<connect gate="G$1" pin="PF3" pad="48"/>
+<connect gate="G$1" pin="PF4" pad="49"/>
+<connect gate="G$1" pin="PF5" pad="50"/>
+<connect gate="G$1" pin="PF6" pad="51"/>
+<connect gate="G$1" pin="PF7" pad="52"/>
+<connect gate="G$1" pin="PH0" pad="55"/>
+<connect gate="G$1" pin="PH1" pad="56"/>
+<connect gate="G$1" pin="PH2" pad="57"/>
+<connect gate="G$1" pin="PH3" pad="58"/>
+<connect gate="G$1" pin="PH4" pad="59"/>
+<connect gate="G$1" pin="PH5" pad="60"/>
+<connect gate="G$1" pin="PH6" pad="61"/>
+<connect gate="G$1" pin="PH7" pad="62"/>
+<connect gate="G$1" pin="PJ0" pad="65"/>
+<connect gate="G$1" pin="PJ1" pad="66"/>
+<connect gate="G$1" pin="PJ2" pad="67"/>
+<connect gate="G$1" pin="PJ3" pad="68"/>
+<connect gate="G$1" pin="PJ4" pad="69"/>
+<connect gate="G$1" pin="PJ5" pad="70"/>
+<connect gate="G$1" pin="PJ6" pad="71"/>
+<connect gate="G$1" pin="PJ7" pad="72"/>
+<connect gate="G$1" pin="PK0" pad="75"/>
+<connect gate="G$1" pin="PK1" pad="76"/>
+<connect gate="G$1" pin="PK2" pad="77"/>
+<connect gate="G$1" pin="PK3" pad="78"/>
+<connect gate="G$1" pin="PK4" pad="79"/>
+<connect gate="G$1" pin="PK5" pad="80"/>
+<connect gate="G$1" pin="PK6" pad="81"/>
+<connect gate="G$1" pin="PK7" pad="82"/>
+<connect gate="G$1" pin="PQ0" pad="85"/>
+<connect gate="G$1" pin="PQ1" pad="86"/>
+<connect gate="G$1" pin="PQ2" pad="87"/>
+<connect gate="G$1" pin="PQ3" pad="88"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="91"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="92"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VCC1" pad="24"/>
+<connect gate="G$1" pin="VCC2" pad="34"/>
+<connect gate="G$1" pin="VCC3" pad="44"/>
+<connect gate="G$1" pin="VCC4" pad="54"/>
+<connect gate="G$1" pin="VCC5" pad="64"/>
+<connect gate="G$1" pin="VCC6" pad="74"/>
+<connect gate="G$1" pin="VCC7" pad="83"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA325P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 32K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc8023.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA325P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="64M1">
+<connects>
+<connect gate="G$1" pin="!RESET!/PG5" pad="20"/>
+<connect gate="G$1" pin="!SS!/PCINT8/PB0" pad="10"/>
+<connect gate="G$1" pin="ADC0/PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1/PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2/PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3/PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4/TCK/PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5/TMS/PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6/TDO/PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7/TDI/PF7" pad="54"/>
+<connect gate="G$1" pin="AIN1/PCINT3/PE3" pad="5"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="CLKO/PCINT7/PE7" pad="9"/>
+<connect gate="G$1" pin="DI/SDA/PCINT5/PE5" pad="7"/>
+<connect gate="G$1" pin="DNC" pad="1"/>
+<connect gate="G$1" pin="DO/PCINT6/PE6" pad="8"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="53"/>
+<connect gate="G$1" pin="GND@2" pad="63"/>
+<connect gate="G$1" pin="ICP1/PD0" pad="25"/>
+<connect gate="G$1" pin="INT0/PD1" pad="26"/>
+<connect gate="G$1" pin="MISO/PCINT11/PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI/PCINT10/PB2" pad="12"/>
+<connect gate="G$1" pin="OC0A/PCINT12/PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A/PCINT13/PB5" pad="16"/>
+<connect gate="G$1" pin="OC1B/PCINT14/PB6" pad="15"/>
+<connect gate="G$1" pin="OC2A/PCINT15/PB7" pad="17"/>
+<connect gate="G$1" pin="PA0" pad="51"/>
+<connect gate="G$1" pin="PA1" pad="50"/>
+<connect gate="G$1" pin="PA2" pad="49"/>
+<connect gate="G$1" pin="PA3" pad="48"/>
+<connect gate="G$1" pin="PA4" pad="47"/>
+<connect gate="G$1" pin="PA5" pad="46"/>
+<connect gate="G$1" pin="PA6" pad="45"/>
+<connect gate="G$1" pin="PA7" pad="44"/>
+<connect gate="G$1" pin="PC0" pad="35"/>
+<connect gate="G$1" pin="PC1" pad="36"/>
+<connect gate="G$1" pin="PC2" pad="37"/>
+<connect gate="G$1" pin="PC3" pad="38"/>
+<connect gate="G$1" pin="PC4" pad="39"/>
+<connect gate="G$1" pin="PC5" pad="40"/>
+<connect gate="G$1" pin="PC6" pad="41"/>
+<connect gate="G$1" pin="PC7" pad="42"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PG0" pad="33"/>
+<connect gate="G$1" pin="PG1" pad="34"/>
+<connect gate="G$1" pin="PG2" pad="43"/>
+<connect gate="G$1" pin="RXD/PCINT0/PE0" pad="2"/>
+<connect gate="G$1" pin="SCK/PCINT9/PB1" pad="11"/>
+<connect gate="G$1" pin="T0/PG4" pad="19"/>
+<connect gate="G$1" pin="T1/PG3" pad="18"/>
+<connect gate="G$1" pin="TOSC1/XTAL1" pad="24"/>
+<connect gate="G$1" pin="TOSC2/XTAL2" pad="23"/>
+<connect gate="G$1" pin="TXD/PCINT1/PE1" pad="3"/>
+<connect gate="G$1" pin="USCK/SCL/PCINT4/PE4" pad="6"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XCK/AIN0/PCINT2/PE2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA325PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1636939" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2025" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB642D" prefix="IC">
+<description>&lt;b&gt;Flash-Memory 64-Megabit&lt;/b&gt; 2 .7-volt, Dual-interface, DataFlash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB642D" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="28T-TSOP-1">
+<connects>
+<connect gate="G$1" pin="!CS" pad="11"/>
+<connect gate="G$1" pin="!RESET" pad="2"/>
+<connect gate="G$1" pin="!WP" pad="3"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="GNDP" pad="21"/>
+<connect gate="G$1" pin="I/O0" pad="17"/>
+<connect gate="G$1" pin="I/O1" pad="18"/>
+<connect gate="G$1" pin="I/O2" pad="19"/>
+<connect gate="G$1" pin="I/O3" pad="20"/>
+<connect gate="G$1" pin="I/O4" pad="23"/>
+<connect gate="G$1" pin="I/O5" pad="24"/>
+<connect gate="G$1" pin="I/O6" pad="25"/>
+<connect gate="G$1" pin="I/O7" pad="26"/>
+<connect gate="G$1" pin="RDY/!BUSY" pad="1"/>
+<connect gate="G$1" pin="SCK/CLK" pad="12"/>
+<connect gate="G$1" pin="SER/!BYTE" pad="16"/>
+<connect gate="G$1" pin="SI" pad="13"/>
+<connect gate="G$1" pin="SO" pad="14"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+<connect gate="G$1" pin="VCCP" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT45DB642D-TU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095799" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1801" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644-20PU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!RESET" pad="9"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PCINT0/ADC0_PA0" pad="40"/>
+<connect gate="G$1" pin="PCINT1/ADC1_PA1" pad="39"/>
+<connect gate="G$1" pin="PCINT10/INT2/AIN0_PB2" pad="3"/>
+<connect gate="G$1" pin="PCINT11/OC0A/AIN1_PB3" pad="4"/>
+<connect gate="G$1" pin="PCINT12/OC0B/SS_PB4" pad="5"/>
+<connect gate="G$1" pin="PCINT13/MOSI_PB5" pad="6"/>
+<connect gate="G$1" pin="PCINT14/MISO_PB6" pad="7"/>
+<connect gate="G$1" pin="PCINT15/SCK_PB7" pad="8"/>
+<connect gate="G$1" pin="PCINT16/SCL_PC0" pad="22"/>
+<connect gate="G$1" pin="PCINT17/SDA_PC1" pad="23"/>
+<connect gate="G$1" pin="PCINT18/TCK_PC2" pad="24"/>
+<connect gate="G$1" pin="PCINT19/TMS_PC3" pad="25"/>
+<connect gate="G$1" pin="PCINT2/ADC2_PA2" pad="38"/>
+<connect gate="G$1" pin="PCINT20/TDO_PC4" pad="26"/>
+<connect gate="G$1" pin="PCINT21/TDI_PC5" pad="27"/>
+<connect gate="G$1" pin="PCINT22/TOSC1_PC6" pad="28"/>
+<connect gate="G$1" pin="PCINT23/TOSC2_PC7" pad="29"/>
+<connect gate="G$1" pin="PCINT24/RXD0_PD0" pad="14"/>
+<connect gate="G$1" pin="PCINT25/TXD0_PD1" pad="15"/>
+<connect gate="G$1" pin="PCINT26/INT0_PD2" pad="16"/>
+<connect gate="G$1" pin="PCINT27/INT1_PD3" pad="17"/>
+<connect gate="G$1" pin="PCINT28/OC1B_PD4" pad="18"/>
+<connect gate="G$1" pin="PCINT29/OC1A_PD5" pad="19"/>
+<connect gate="G$1" pin="PCINT3/ADC3_PA3" pad="37"/>
+<connect gate="G$1" pin="PCINT30/OC2B/ICP_PD6" pad="20"/>
+<connect gate="G$1" pin="PCINT31/OC2A_PD7" pad="21"/>
+<connect gate="G$1" pin="PCINT4/ADC4_PA4" pad="36"/>
+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB161D" prefix="IC">
+<description>&lt;b&gt;16-megabit 2.5V or 2.7V DataFlash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3500.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB161VFN8" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-MU" package="VDFN-8">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>
diff --git a/maxstream.lbr b/maxstream.lbr
new file mode 100644 (file)
index 0000000..fe45c61
--- /dev/null
@@ -0,0 +1,398 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.05" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.025" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="no" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>
+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>
+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
+<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+</layers>
+<library>
+<description>&lt;b&gt;MaxSream&lt;/b&gt; XBee Products&lt;p&gt;
+http://www.maxstream.net</description>
+<packages>
+<package name="XBEE">
+<description>&lt;b&gt;XBEE&lt;/b&gt;&lt;p&gt;
+Source: http://www.maxstream.net/products/xbee/datasheet_XBee_OEM_RF-Modules.pdf</description>
+<wire x1="-12.1" y1="-11.975" x2="-12.1" y2="9.1" width="0.2032" layer="21"/>
+<wire x1="-12.1" y1="9.1" x2="-5.775" y2="15.425" width="0.2032" layer="21"/>
+<wire x1="-5.775" y1="15.425" x2="5.775" y2="15.425" width="0.2032" layer="21"/>
+<wire x1="5.775" y1="15.425" x2="12.1" y2="9.1" width="0.2032" layer="21"/>
+<wire x1="12.1" y1="9.1" x2="12.1" y2="-11.975" width="0.2032" layer="21"/>
+<wire x1="12.1" y1="-11.975" x2="-12.1" y2="-11.975" width="0.2032" layer="21"/>
+<wire x1="-8.3829" y1="2.8685" x2="7.4359" y2="2.8685" width="0.1524" layer="21"/>
+<wire x1="-8.3829" y1="-2.4369" x2="7.4359" y2="-2.4369" width="0.1524" layer="21"/>
+<wire x1="-7.4082" y1="2.1723" x2="-5.8764" y2="2.1723" width="0.1016" layer="21"/>
+<wire x1="-5.8764" y1="2.1723" x2="-5.8764" y2="2.0887" width="0.1016" layer="21"/>
+<wire x1="-5.8764" y1="2.0887" x2="-5.9182" y2="2.0052" width="0.1016" layer="21"/>
+<wire x1="-5.9182" y1="2.0052" x2="-5.8764" y2="1.9355" width="0.1016" layer="21"/>
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+<pad name="8" x="-11" y="-5" drill="0.8" diameter="1.27"/>
+<pad name="9" x="-11" y="-7" drill="0.8" diameter="1.27"/>
+<pad name="10" x="-11" y="-9" drill="0.8" diameter="1.27"/>
+<pad name="11" x="11" y="-9" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="12" x="11" y="-7" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="13" x="11" y="-5" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="14" x="11" y="-3" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="15" x="11" y="-1" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="16" x="11" y="1" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="17" x="11" y="3" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="18" x="11" y="5" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="19" x="11" y="7" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="20" x="11" y="9" drill="0.8" diameter="1.27" rot="R180"/>
+<text x="-11.43" y="13.97" size="1.27" layer="25">&gt;NAME</text>
+<text x="-11.43" y="-13.97" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+<package name="XBEE-PRO">
+<description>&lt;b&gt;XBEE Pro&lt;/b&gt;&lt;p&gt;
+Source: http://www.maxstream.net/products/xbee/datasheet_XBee_OEM_RF-Modules.pdf</description>
+<wire x1="-12.1" y1="-17.305" x2="-12.1" y2="9.1" width="0.2032" layer="21"/>
+<wire x1="-12.1" y1="9.1" x2="-5.775" y2="15.425" width="0.2032" layer="21"/>
+<wire x1="-5.775" y1="15.425" x2="5.775" y2="15.425" width="0.2032" layer="21"/>
+<wire x1="5.775" y1="15.425" x2="12.1" y2="9.1" width="0.2032" layer="21"/>
+<wire x1="12.1" y1="9.1" x2="12.1" y2="-17.305" width="0.2032" layer="21"/>
+<wire x1="12.1" y1="-17.305" x2="-12.1" y2="-17.305" width="0.2032" layer="21"/>
+<pad name="1" x="-11" y="9" drill="0.8" diameter="1.27"/>
+<pad name="2" x="-11" y="7" drill="0.8" diameter="1.27"/>
+<pad name="3" x="-11" y="5" drill="0.8" diameter="1.27"/>
+<pad name="4" x="-11" y="3" drill="0.8" diameter="1.27"/>
+<pad name="5" x="-11" y="1" drill="0.8" diameter="1.27"/>
+<pad name="6" x="-11" y="-1" drill="0.8" diameter="1.27"/>
+<pad name="7" x="-11" y="-3" drill="0.8" diameter="1.27"/>
+<pad name="8" x="-11" y="-5" drill="0.8" diameter="1.27"/>
+<pad name="9" x="-11" y="-7" drill="0.8" diameter="1.27"/>
+<pad name="10" x="-11" y="-9" drill="0.8" diameter="1.27"/>
+<pad name="11" x="11" y="-9" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="12" x="11" y="-7" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="13" x="11" y="-5" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="14" x="11" y="-3" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="15" x="11" y="-1" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="16" x="11" y="1" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="17" x="11" y="3" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="18" x="11" y="5" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="19" x="11" y="7" drill="0.8" diameter="1.27" rot="R180"/>
+<pad name="20" x="11" y="9" drill="0.8" diameter="1.27" rot="R180"/>
+<text x="-11.43" y="13.97" size="1.27" layer="25">&gt;NAME</text>
+<text x="-11.43" y="-19.3" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+</packages>
+<symbols>
+<symbol name="XBEE">
+<wire x1="-12.7" y1="27.94" x2="-12.7" y2="-30.48" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="-30.48" x2="15.24" y2="-30.48" width="0.254" layer="94"/>
+<wire x1="15.24" y1="-30.48" x2="15.24" y2="27.94" width="0.254" layer="94"/>
+<wire x1="15.24" y1="27.94" x2="-12.7" y2="27.94" width="0.254" layer="94"/>
+<text x="-12.7" y="29.21" size="1.778" layer="95" font="vector">&gt;NAME</text>
+<text x="-12.7" y="-33.02" size="1.778" layer="96" font="vector">&gt;VALUE</text>
+<pin name="VCC" x="-15.24" y="25.4" length="short" direction="pwr"/>
+<pin name="DOUT" x="-15.24" y="7.62" length="short" direction="out"/>
+<pin name="DIN/!CONFIG" x="-15.24" y="10.16" length="short" direction="in"/>
+<pin name="CD/DOUT_EN/DO8" x="-15.24" y="2.54" length="short" direction="out"/>
+<pin name="!RESET" x="-15.24" y="22.86" length="short" direction="in"/>
+<pin name="PWM0/RSSI" x="-15.24" y="15.24" length="short" direction="out"/>
+<pin name="!DTR!/SLEEP_RQ/DI8" x="-15.24" y="0" length="short"/>
+<pin name="GND" x="-15.24" y="-27.94" length="short" direction="pwr"/>
+<pin name="RF_TX/AD4/DIO4" x="-15.24" y="-10.16" length="short"/>
+<pin name="!CTS!/DIO7" x="-15.24" y="-2.54" length="short"/>
+<pin name="ON/!SLEEP" x="-15.24" y="17.78" length="short" direction="out"/>
+<pin name="VREF" x="-15.24" y="-25.4" length="short" direction="in"/>
+<pin name="ASSOC/AD5/DIO5" x="-15.24" y="-7.62" length="short"/>
+<pin name="!RTS!/AD6/DIO6" x="-15.24" y="-5.08" length="short"/>
+<pin name="COORD_SEL/AD3/DIO3" x="-15.24" y="-12.7" length="short"/>
+<pin name="AD2/DIO2" x="-15.24" y="-15.24" length="short"/>
+<pin name="AD1/DIO1" x="-15.24" y="-17.78" length="short"/>
+<pin name="AD0/DIO0" x="-15.24" y="-20.32" length="short"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="XBEE" prefix="XB">
+<description>&lt;b&gt;XBee (TM) /XBee-PRO(TM) OEM RF Modules&lt;/b&gt;&lt;p&gt;
+Source: MaxStream, Inc. xbee_productmanual.pdf</description>
+<gates>
+<gate name="G$1" symbol="XBEE" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="XBEE">
+<connects>
+<connect gate="G$1" pin="!CTS!/DIO7" pad="12"/>
+<connect gate="G$1" pin="!DTR!/SLEEP_RQ/DI8" pad="9"/>
+<connect gate="G$1" pin="!RESET" pad="5"/>
+<connect gate="G$1" pin="!RTS!/AD6/DIO6" pad="16"/>
+<connect gate="G$1" pin="AD0/DIO0" pad="20"/>
+<connect gate="G$1" pin="AD1/DIO1" pad="19"/>
+<connect gate="G$1" pin="AD2/DIO2" pad="18"/>
+<connect gate="G$1" pin="ASSOC/AD5/DIO5" pad="15"/>
+<connect gate="G$1" pin="CD/DOUT_EN/DO8" pad="4"/>
+<connect gate="G$1" pin="COORD_SEL/AD3/DIO3" pad="17"/>
+<connect gate="G$1" pin="DIN/!CONFIG" pad="3"/>
+<connect gate="G$1" pin="DOUT" pad="2"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="ON/!SLEEP" pad="13"/>
+<connect gate="G$1" pin="PWM0/RSSI" pad="6"/>
+<connect gate="G$1" pin="RF_TX/AD4/DIO4" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="1"/>
+<connect gate="G$1" pin="VREF" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="XBP24-Z7UIT-004" constant="no"/>
+<attribute name="OC_FARNELL" value="1751799" constant="no"/>
+<attribute name="OC_NEWARK" value="34R5507" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-PRO" package="XBEE-PRO">
+<connects>
+<connect gate="G$1" pin="!CTS!/DIO7" pad="12"/>
+<connect gate="G$1" pin="!DTR!/SLEEP_RQ/DI8" pad="9"/>
+<connect gate="G$1" pin="!RESET" pad="5"/>
+<connect gate="G$1" pin="!RTS!/AD6/DIO6" pad="16"/>
+<connect gate="G$1" pin="AD0/DIO0" pad="20"/>
+<connect gate="G$1" pin="AD1/DIO1" pad="19"/>
+<connect gate="G$1" pin="AD2/DIO2" pad="18"/>
+<connect gate="G$1" pin="ASSOC/AD5/DIO5" pad="15"/>
+<connect gate="G$1" pin="CD/DOUT_EN/DO8" pad="4"/>
+<connect gate="G$1" pin="COORD_SEL/AD3/DIO3" pad="17"/>
+<connect gate="G$1" pin="DIN/!CONFIG" pad="3"/>
+<connect gate="G$1" pin="DOUT" pad="2"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="ON/!SLEEP" pad="13"/>
+<connect gate="G$1" pin="PWM0/RSSI" pad="6"/>
+<connect gate="G$1" pin="RF_TX/AD4/DIO4" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="1"/>
+<connect gate="G$1" pin="VREF" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="XBP24-AWI-001" constant="no"/>
+<attribute name="OC_FARNELL" value="1337916" constant="no"/>
+<attribute name="OC_NEWARK" value="42M2667" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>
index 024dc221d4631deb87c2e73b3439a8d952fc49ca..601d6d96d394d8c756350d0f4470115c951d550d 100644 (file)
@@ -1,5 +1,5 @@
 [Eagle]
-Version="05 12 00"
+Version="06 04 00"
 Platform="Linux"
 Serial="62191E841E-LSR-WLM-1EL"
 Globals="Globals"
@@ -7,26 +7,32 @@ Desktop="Desktop"
 
 [Globals]
 AutoSaveProject=1
+UsedLibrary="/home/zer0/.eagle/lbr/pot.lbr"
 UsedLibrary="/home/zer0/eagle/xbee-elec/sparkfun/SparkFun-Eagle-Library/SparkFun.lbr"
+UsedLibrary="/home/zer0/eagle/xbee-elec/atmel.lbr"
 
 [Win_1]
 Type="Library Editor"
-Loc="0 19 957 1077"
+Loc="0 19 1917 1077"
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+DimensionExtLengths=" 1.27 2.54 1 2 3 0"
+DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
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 WireBend=0
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@@ -34,10 +40,13 @@ MiterStyle=0
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+DimensionShowUnit=0
 PinDirection=3
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@@ -47,15 +56,111 @@ ArcDirection=0
 AddLevel=2
 PadsSameType=0
 Layer=94
-Device="5V"
+Device="MEGA1284"
 
 [Win_2]
+Type="Schematic Editor"
+Loc="0 19 1917 1077"
+State=2
+Number=2
+File="mainboard.sch"
+View="-22.8492 122.854 257.487 311.468"
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+Views=" 1: -22.8492 122.854 257.487 311.468"
+Sheet=1
+
+[Win_3]
 Type="Control Panel"
-Loc="0 19 957 1077"
+Loc="0 19 1917 1077"
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+[Win_4]
+Type="Board Editor"
+Loc="0 19 1917 1077"
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+<text x="86.9442" y="6.477" size="0.762" layer="25" font="vector" ratio="15" rot="R90">POWER</text>
+<text x="65.9384" y="18.8468" size="0.762" layer="25" font="vector" ratio="15" rot="R90">OUT6</text>
+<text x="81.9658" y="29.0322" size="0.762" layer="25" font="vector" ratio="15">IN6</text>
+<text x="88.8746" y="4.6736" size="0.762" layer="25" font="vector" ratio="15" rot="R90">+</text>
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+<text x="80.6958" y="21.463" size="0.762" layer="25" font="vector" ratio="15" rot="R90">OUT1</text>
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@@ -119,309 +135,6 @@ Source: http://www.maxstream.net/products/xbee/datasheet_XBee_OEM_RF-Modules.pdf
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@@ -449,145 +162,6 @@ Source: http://www.maxstream.net/products/xbee/datasheet_XBee_OEM_RF-Modules.pdf
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-<rectangle x1="4.1021" y1="7.0866" x2="4.5593" y2="8.1788" layer="51"/>
-<rectangle x1="4.8895" y1="7.0866" x2="5.3467" y2="8.1788" layer="51"/>
-<rectangle x1="5.6769" y1="7.0866" x2="6.1341" y2="8.1788" layer="51"/>
-</package>
 <package name="TQFP32-08">
 <description>&lt;B&gt;Thin Plasic Quad Flat Package&lt;/B&gt; Grid 0.8 mm</description>
 <wire x1="3.505" y1="3.505" x2="3.505" y2="-3.505" width="0.1524" layer="21"/>
@@ -979,53 +553,71 @@ Source: http://www.molex.com/product/ffc/52745.html</description>
 <text x="-1.27" y="-3.175" size="1.27" layer="27">&gt;VALUE</text>
 <rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
 </package>
-<package name="0603-RES">
-<wire x1="-1.473" y1="0.983" x2="1.473" y2="0.983" width="0.0508" layer="39"/>
-<wire x1="1.473" y1="0.983" x2="1.473" y2="-0.983" width="0.0508" layer="39"/>
-<wire x1="1.473" y1="-0.983" x2="-1.473" y2="-0.983" width="0.0508" layer="39"/>
-<wire x1="-1.473" y1="-0.983" x2="-1.473" y2="0.983" width="0.0508" layer="39"/>
-<wire x1="-0.356" y1="0.432" x2="0.356" y2="0.432" width="0.1016" layer="51"/>
-<wire x1="-0.356" y1="-0.419" x2="0.356" y2="-0.419" width="0.1016" layer="51"/>
-<smd name="1" x="-0.85" y="0" dx="1.1" dy="1" layer="1"/>
-<smd name="2" x="0.85" y="0" dx="1.1" dy="1" layer="1"/>
-<text x="-0.889" y="0.762" size="0.4064" layer="25" font="vector">&gt;NAME</text>
-<text x="-1.016" y="-1.143" size="0.4064" layer="27" font="vector">&gt;VALUE</text>
-<rectangle x1="-0.8382" y1="-0.4699" x2="-0.3381" y2="0.4801" layer="51"/>
-<rectangle x1="0.3302" y1="-0.4699" x2="0.8303" y2="0.4801" layer="51"/>
-<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
-<rectangle x1="-0.2286" y1="-0.381" x2="0.2286" y2="0.381" layer="21"/>
+<package name="0805">
+<wire x1="-0.3" y1="0.6" x2="0.3" y2="0.6" width="0.1524" layer="21"/>
+<wire x1="-0.3" y1="-0.6" x2="0.3" y2="-0.6" width="0.1524" layer="21"/>
+<smd name="1" x="-0.9" y="0" dx="0.8" dy="1.2" layer="1"/>
+<smd name="2" x="0.9" y="0" dx="0.8" dy="1.2" layer="1"/>
+<text x="-0.762" y="0.8255" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-1.397" size="0.4064" layer="27">&gt;VALUE</text>
+</package>
+<package name="LED-1206">
+<wire x1="-1" y1="1" x2="-2.4" y2="1" width="0.2032" layer="21"/>
+<wire x1="-2.4" y1="1" x2="-2.4" y2="-1" width="0.2032" layer="21"/>
+<wire x1="-2.4" y1="-1" x2="-1" y2="-1" width="0.2032" layer="21"/>
+<wire x1="1" y1="1" x2="2.4" y2="1" width="0.2032" layer="21"/>
+<wire x1="2.4" y1="1" x2="2.4" y2="-1" width="0.2032" layer="21"/>
+<wire x1="2.4" y1="-1" x2="1" y2="-1" width="0.2032" layer="21"/>
+<wire x1="0.3" y1="0.7" x2="0.3" y2="0" width="0.2032" layer="21"/>
+<wire x1="0.3" y1="0" x2="0.3" y2="-0.7" width="0.2032" layer="21"/>
+<wire x1="0.3" y1="0" x2="-0.3" y2="0.6" width="0.2032" layer="21"/>
+<wire x1="-0.3" y1="0.6" x2="-0.3" y2="-0.6" width="0.2032" layer="21"/>
+<wire x1="-0.3" y1="-0.6" x2="0.3" y2="0" width="0.2032" layer="21"/>
+<smd name="A" x="-1.5" y="0" dx="1.2" dy="1.4" layer="1"/>
+<smd name="C" x="1.5" y="0" dx="1.2" dy="1.4" layer="1"/>
+<text x="-0.889" y="1.397" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-1.778" size="0.4064" layer="27">&gt;VALUE</text>
+</package>
+<package name="SOD-323">
+<wire x1="-0.9" y1="0.65" x2="-0.5" y2="0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="0.65" x2="0.9" y2="0.65" width="0.2032" layer="21"/>
+<wire x1="-0.9" y1="-0.65" x2="-0.5" y2="-0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="-0.65" x2="0.9" y2="-0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="0.65" x2="-0.5" y2="-0.65" width="0.2032" layer="21"/>
+<smd name="1" x="-1.15" y="0" dx="0.63" dy="0.83" layer="1"/>
+<smd name="2" x="1.15" y="0" dx="0.63" dy="0.83" layer="1"/>
+<text x="-0.889" y="1.016" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-1.397" size="0.4064" layer="27">&gt;VALUE</text>
 </package>
-<package name="0603-CAP">
-<wire x1="-1.473" y1="0.983" x2="1.473" y2="0.983" width="0.0508" layer="39"/>
-<wire x1="1.473" y1="0.983" x2="1.473" y2="-0.983" width="0.0508" layer="39"/>
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-<text x="-0.889" y="0.762" size="0.4064" layer="25" font="vector">&gt;NAME</text>
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-<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
+<package name="BUZZER-12MM-NS">
+<circle x="0" y="0" radius="5.9" width="0.2032" layer="51"/>
+<circle x="0" y="0" radius="1.27" width="0.2032" layer="51"/>
+<pad name="-" x="-3.25" y="0" drill="0.9"/>
+<pad name="+" x="3.25" y="0" drill="0.9"/>
+<text x="-2.54" y="2.54" size="0.6096" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.175" y="-3.048" size="0.6096" layer="27" ratio="10">&gt;VALUE</text>
+<text x="2.667" y="1.143" size="1.778" layer="51">+</text>
 </package>
-<package name="LED-0603">
-<wire x1="0.46" y1="0.17" x2="0" y2="0.17" width="0.2032" layer="21"/>
-<wire x1="-0.46" y1="0.17" x2="0" y2="0.17" width="0.2032" layer="21"/>
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-<text x="1.0795" y="-1.016" size="0.4064" layer="27" rot="R90">&gt;VALUE</text>
+<package name="SOT23-3">
+<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.6604" width="0.1524" layer="51"/>
+<wire x1="1.4224" y1="-0.6604" x2="-1.4224" y2="-0.6604" width="0.1524" layer="51"/>
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+<wire x1="-1.4" y1="0.7" x2="-1.4" y2="-0.1" width="0.2032" layer="21"/>
+<wire x1="0.8" y1="0.7" x2="1.4" y2="0.7" width="0.2032" layer="21"/>
+<wire x1="1.4" y1="0.7" x2="1.4" y2="-0.1" width="0.2032" layer="21"/>
+<smd name="3" x="0" y="1.1" dx="0.8" dy="0.9" layer="1"/>
+<smd name="2" x="0.95" y="-1" dx="0.8" dy="0.9" layer="1"/>
+<smd name="1" x="-0.95" y="-1" dx="0.8" dy="0.9" layer="1"/>
+<text x="-0.8255" y="1.778" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-0.1905" size="0.4064" layer="27">&gt;VALUE</text>
 </package>
 </packages>
 </library>
 <library name="rcl">
 <packages>
-<package name="C3216">
+<package name="C1206">
 <description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>
 <wire x1="-2.473" y1="0.983" x2="2.473" y2="0.983" width="0.0508" layer="39"/>
 <wire x1="2.473" y1="-0.983" x2="-2.473" y2="-0.983" width="0.0508" layer="39"/>
@@ -1039,7 +631,7 @@ Source: http://www.molex.com/product/ffc/52745.html</description>
 <text x="-1.27" y="-2.54" size="1.27" layer="27">&gt;VALUE</text>
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+<rectangle x1="-0.1999" y1="-0.4001" x2="0.1999" y2="0.4001" layer="35"/>
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 </packages>
 </library>
@@ -1101,6 +693,147 @@ Source: http://www.molex.com/product/ffc/52745.html</description>
 </package>
 </packages>
 </library>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="TQFP44">
+<description>&lt;b&gt;44-lead Thin Quad Flat Package&lt;/b&gt;</description>
+<wire x1="-4.8" y1="4.4" x2="-4.4" y2="4.8" width="0.2032" layer="21"/>
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+<wire x1="4.4" y1="4.8" x2="4.8" y2="4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="4.4" x2="4.8" y2="-4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="-4.4" x2="4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="4.4" y1="-4.8" x2="-4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="-4.4" y1="-4.8" x2="-4.8" y2="-4.4" width="0.2032" layer="21"/>
+<wire x1="-4.8" y1="-4.4" x2="-4.8" y2="4.4" width="0.2032" layer="21"/>
+<circle x="-4" y="4" radius="0.2827" width="0.254" layer="21"/>
+<smd name="1" x="-5.8" y="4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="2" x="-5.8" y="3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="3" x="-5.8" y="2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="4" x="-5.8" y="1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="5" x="-5.8" y="0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="6" x="-5.8" y="0" dx="1.5" dy="0.5" layer="1"/>
+<smd name="7" x="-5.8" y="-0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="8" x="-5.8" y="-1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="9" x="-5.8" y="-2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="10" x="-5.8" y="-3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="11" x="-5.8" y="-4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="12" x="-4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="13" x="-3.2" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="14" x="-2.4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="15" x="-1.6" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="16" x="-0.8" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="17" x="0" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="18" x="0.8" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="19" x="1.6" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="20" x="2.4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="21" x="3.2" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="22" x="4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="23" x="5.8" y="-4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="24" x="5.8" y="-3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="25" x="5.8" y="-2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="26" x="5.8" y="-1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="27" x="5.8" y="-0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="28" x="5.8" y="0" dx="1.5" dy="0.5" layer="1"/>
+<smd name="29" x="5.8" y="0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="30" x="5.8" y="1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="31" x="5.8" y="2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="32" x="5.8" y="3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="33" x="5.8" y="4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="34" x="4" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="35" x="3.2" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="36" x="2.4" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="37" x="1.6" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="38" x="0.8" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="39" x="0" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="40" x="-0.8" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="41" x="-1.6" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="42" x="-2.4" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="43" x="-3.2" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="44" x="-4" y="5.8" dx="0.5" dy="1.5" layer="1"/>
+<text x="-3.81" y="6.985" size="1.778" layer="25">&gt;NAME</text>
+<text x="-4.445" y="-8.7551" size="1.778" layer="27">&gt;VALUE</text>
+<rectangle x1="-6.1001" y1="3.8001" x2="-4.95" y2="4.1999" layer="51"/>
+<rectangle x1="-6.1001" y1="3" x2="-4.95" y2="3.4" layer="51"/>
+<rectangle x1="-6.1001" y1="2.1999" x2="-4.95" y2="2.5999" layer="51"/>
+<rectangle x1="-6.1001" y1="1.4" x2="-4.95" y2="1.8001" layer="51"/>
+<rectangle x1="-6.1001" y1="0.5999" x2="-4.95" y2="1" layer="51"/>
+<rectangle x1="-6.1001" y1="-0.1999" x2="-4.95" y2="0.1999" layer="51"/>
+<rectangle x1="-6.1001" y1="-1" x2="-4.95" y2="-0.5999" layer="51"/>
+<rectangle x1="-6.1001" y1="-1.8001" x2="-4.95" y2="-1.4" layer="51"/>
+<rectangle x1="-6.1001" y1="-2.5999" x2="-4.95" y2="-2.1999" layer="51"/>
+<rectangle x1="-6.1001" y1="-3.4" x2="-4.95" y2="-3" layer="51"/>
+<rectangle x1="-6.1001" y1="-4.1999" x2="-4.95" y2="-3.8001" layer="51"/>
+<rectangle x1="-4.1999" y1="-6.1001" x2="-3.8001" y2="-4.95" layer="51"/>
+<rectangle x1="-3.4" y1="-6.1001" x2="-3" y2="-4.95" layer="51"/>
+<rectangle x1="-2.5999" y1="-6.1001" x2="-2.1999" y2="-4.95" layer="51"/>
+<rectangle x1="-1.8001" y1="-6.1001" x2="-1.4" y2="-4.95" layer="51"/>
+<rectangle x1="-1" y1="-6.1001" x2="-0.5999" y2="-4.95" layer="51"/>
+<rectangle x1="-0.1999" y1="-6.1001" x2="0.1999" y2="-4.95" layer="51"/>
+<rectangle x1="0.5999" y1="-6.1001" x2="1" y2="-4.95" layer="51"/>
+<rectangle x1="1.4" y1="-6.1001" x2="1.8001" y2="-4.95" layer="51"/>
+<rectangle x1="2.1999" y1="-6.1001" x2="2.5999" y2="-4.95" layer="51"/>
+<rectangle x1="3" y1="-6.1001" x2="3.4" y2="-4.95" layer="51"/>
+<rectangle x1="3.8001" y1="-6.1001" x2="4.1999" y2="-4.95" layer="51"/>
+<rectangle x1="4.95" y1="-4.1999" x2="6.1001" y2="-3.8001" layer="51"/>
+<rectangle x1="4.95" y1="-3.4" x2="6.1001" y2="-3" layer="51"/>
+<rectangle x1="4.95" y1="-2.5999" x2="6.1001" y2="-2.1999" layer="51"/>
+<rectangle x1="4.95" y1="-1.8001" x2="6.1001" y2="-1.4" layer="51"/>
+<rectangle x1="4.95" y1="-1" x2="6.1001" y2="-0.5999" layer="51"/>
+<rectangle x1="4.95" y1="-0.1999" x2="6.1001" y2="0.1999" layer="51"/>
+<rectangle x1="4.95" y1="0.5999" x2="6.1001" y2="1" layer="51"/>
+<rectangle x1="4.95" y1="1.4" x2="6.1001" y2="1.8001" layer="51"/>
+<rectangle x1="4.95" y1="2.1999" x2="6.1001" y2="2.5999" layer="51"/>
+<rectangle x1="4.95" y1="3" x2="6.1001" y2="3.4" layer="51"/>
+<rectangle x1="4.95" y1="3.8001" x2="6.1001" y2="4.1999" layer="51"/>
+<rectangle x1="3.8001" y1="4.95" x2="4.1999" y2="6.1001" layer="51"/>
+<rectangle x1="3" y1="4.95" x2="3.4" y2="6.1001" layer="51"/>
+<rectangle x1="2.1999" y1="4.95" x2="2.5999" y2="6.1001" layer="51"/>
+<rectangle x1="1.4" y1="4.95" x2="1.8001" y2="6.1001" layer="51"/>
+<rectangle x1="0.5999" y1="4.95" x2="1" y2="6.1001" layer="51"/>
+<rectangle x1="-0.1999" y1="4.95" x2="0.1999" y2="6.1001" layer="51"/>
+<rectangle x1="-1" y1="4.95" x2="-0.5999" y2="6.1001" layer="51"/>
+<rectangle x1="-1.8001" y1="4.95" x2="-1.4" y2="6.1001" layer="51"/>
+<rectangle x1="-2.5999" y1="4.95" x2="-2.1999" y2="6.1001" layer="51"/>
+<rectangle x1="-3.4" y1="4.95" x2="-3" y2="6.1001" layer="51"/>
+<rectangle x1="-4.1999" y1="4.95" x2="-3.8001" y2="6.1001" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="pot">
+<description>&lt;b&gt;Potentiometers&lt;/b&gt;&lt;p&gt;
+Beckman, Copal, Piher, Spectrol, Schukat&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="3223J">
+<description>&lt;b&gt;3 mm SMD Trimming Potentiometer&lt;/b&gt; Side Adjust&lt;p&gt;
+Source: http://www.bourns.com/data/global/PDFs/3223.PDF</description>
+<wire x1="-1.85" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="-1.85" x2="-1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="-1.85" y1="-1.85" x2="-1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="-0.8975" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="1.0075" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.85" x2="-0.8975" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.0075" x2="1.85" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="-1.85" y1="-0.58" x2="-1.85" y2="0.58" width="0.2032" layer="21"/>
+<smd name="1" x="-2" y="1.4" dx="1.6" dy="0.9" layer="1"/>
+<smd name="2" x="2" y="0" dx="1.6" dy="1.3" layer="1"/>
+<smd name="3" x="-2" y="-1.4" dx="1.6" dy="0.9" layer="1"/>
+<text x="-1.5875" y="2.2225" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.905" y="-3.4925" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+</packages>
+</library>
 </libraries>
 <attributes>
 </attributes>
@@ -1110,7 +843,7 @@ Source: http://www.molex.com/product/ffc/52745.html</description>
 <class number="0" name="default" width="0" drill="0">
 </class>
 </classes>
-<designrules name="default *">
+<designrules name="Fusion_eagle_rule_v1.1 *">
 <description language="de">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
 &lt;p&gt;
 Die Standard-Design-Rules sind so gewählt, dass sie für 
@@ -1125,31 +858,33 @@ a wide range of applications. Your particular design
 may have different requirements, so please make the
 necessary adjustments and save your customized
 design rules under a new name.</description>
+<description language="zh">&lt;b&gt;Seeed Studio EAGLE Design Rules&lt;/b&gt;
+</description>
 <param name="layerSetup" value="(1*16)"/>
 <param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
 <param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
-<param name="mdWireWire" value="0.2mm"/>
-<param name="mdWirePad" value="0.2mm"/>
-<param name="mdWireVia" value="0.2mm"/>
-<param name="mdPadPad" value="0.2mm"/>
-<param name="mdPadVia" value="0.2mm"/>
-<param name="mdViaVia" value="0.2mm"/>
-<param name="mdSmdPad" value="0.2mm"/>
-<param name="mdSmdVia" value="0.2mm"/>
-<param name="mdSmdSmd" value="0.2mm"/>
+<param name="mdWireWire" value="6mil"/>
+<param name="mdWirePad" value="6.5mil"/>
+<param name="mdWireVia" value="6mil"/>
+<param name="mdPadPad" value="6mil"/>
+<param name="mdPadVia" value="6mil"/>
+<param name="mdViaVia" value="6mil"/>
+<param name="mdSmdPad" value="0mil"/>
+<param name="mdSmdVia" value="0mil"/>
+<param name="mdSmdSmd" value="0mil"/>
 <param name="mdViaViaSameLayer" value="8mil"/>
 <param name="mnLayersViaInSmd" value="2"/>
-<param name="mdCopperDimension" value="0.2mm"/>
-<param name="mdDrill" value="0.2mm"/>
+<param name="mdCopperDimension" value="10mil"/>
+<param name="mdDrill" value="10mil"/>
 <param name="mdSmdStop" value="0mil"/>
-<param name="msWidth" value="0.2mm"/>
-<param name="msDrill" value="0.6mm"/>
-<param name="msMicroVia" value="9.99mm"/>
+<param name="msWidth" value="6mil"/>
+<param name="msDrill" value="12mil"/>
+<param name="msMicroVia" value="12mil"/>
 <param name="msBlindViaRatio" value="0.5"/>
 <param name="rvPadTop" value="0.25"/>
 <param name="rvPadInner" value="0.25"/>
 <param name="rvPadBottom" value="0.25"/>
-<param name="rvViaOuter" value="0.5"/>
+<param name="rvViaOuter" value="0.25"/>
 <param name="rvViaInner" value="0.25"/>
 <param name="rvMicroViaOuter" value="0.25"/>
 <param name="rvMicroViaInner" value="0.25"/>
@@ -1159,9 +894,9 @@ design rules under a new name.</description>
 <param name="rlMaxPadInner" value="20mil"/>
 <param name="rlMinPadBottom" value="10mil"/>
 <param name="rlMaxPadBottom" value="20mil"/>
-<param name="rlMinViaOuter" value="0.2mm"/>
-<param name="rlMaxViaOuter" value="0.4mm"/>
-<param name="rlMinViaInner" value="8mil"/>
+<param name="rlMinViaOuter" value="6mil"/>
+<param name="rlMaxViaOuter" value="20mil"/>
+<param name="rlMinViaInner" value="6mil"/>
 <param name="rlMaxViaInner" value="20mil"/>
 <param name="rlMinMicroViaOuter" value="4mil"/>
 <param name="rlMaxMicroViaOuter" value="20mil"/>
@@ -1169,16 +904,16 @@ design rules under a new name.</description>
 <param name="rlMaxMicroViaInner" value="20mil"/>
 <param name="psTop" value="-1"/>
 <param name="psBottom" value="-1"/>
-<param name="psFirst" value="-1"/>
+<param name="psFirst" value="0"/>
 <param name="psElongationLong" value="100"/>
 <param name="psElongationOffset" value="100"/>
 <param name="mvStopFrame" value="1"/>
 <param name="mvCreamFrame" value="0"/>
-<param name="mlMinStopFrame" value="4mil"/>
-<param name="mlMaxStopFrame" value="4mil"/>
+<param name="mlMinStopFrame" value="2mil"/>
+<param name="mlMaxStopFrame" value="2mil"/>
 <param name="mlMinCreamFrame" value="0mil"/>
 <param name="mlMaxCreamFrame" value="0mil"/>
-<param name="mlViaStopLimit" value="0mil"/>
+<param name="mlViaStopLimit" value="100mil"/>
 <param name="srRoundness" value="0"/>
 <param name="srMinRoundness" value="0mil"/>
 <param name="srMaxRoundness" value="0mil"/>
@@ -1189,7 +924,7 @@ design rules under a new name.</description>
 <param name="checkGrid" value="0"/>
 <param name="checkAngle" value="0"/>
 <param name="checkFont" value="1"/>
-<param name="checkRestrict" value="1"/>
+<param name="checkRestrict" value="0"/>
 <param name="useDiameter" value="13"/>
 <param name="maxErrors" value="50"/>
 </designrules>
@@ -1287,107 +1022,248 @@ design rules under a new name.</description>
 </pass>
 </autorouter>
 <elements>
-<element name="XB1" library="maxstream" package="XBEE-PRO" value="XBEE-PRO" x="15.59" y="15.4" rot="MR270">
+<element name="XB1" library="maxstream" package="XBEE-PRO" value="XBEE-PRO" x="15.59" y="15.4" smashed="yes" rot="MR270">
 <attribute name="MF" value="" x="15.59" y="15.4" size="1.778" layer="28" rot="MR270" display="off"/>
 <attribute name="MPN" value="XBP24-AWI-001" x="15.59" y="15.4" size="1.778" layer="28" rot="MR270" display="off"/>
 <attribute name="OC_FARNELL" value="1337916" x="15.59" y="15.4" size="1.778" layer="28" rot="MR270" display="off"/>
 <attribute name="OC_NEWARK" value="42M2667" x="15.59" y="15.4" size="1.778" layer="28" rot="MR270" display="off"/>
 </element>
-<element name="U$1" library="avr-7" package="TQFP64" value="XMEGA-A3TQFP" x="39.4152" y="14.2902" rot="R90"/>
-<element name="IC1" library="avr-7" package="TQFP32-08" value="MEGA48/88/168-AU" x="73.405" y="13.7244" rot="R270"/>
-<element name="IC2" library="74xx-eu" package="SO14" value="74HC126D" x="42.8244" y="19.0246" rot="MR90"/>
-<element name="X1" library="con-molex" package="52745-1690" value="52745-1690" x="42.8042" y="2.196">
+<element name="IC1" library="avr-7" package="TQFP32-08" value="M168" x="73.405" y="13.7244" smashed="yes" rot="R270">
+<attribute name="VALUE" x="70.4766" y="12.4958" size="0.762" layer="27" font="vector" ratio="15"/>
+</element>
+<element name="IC2" library="74xx-eu" package="SO14" value="74HC126D" x="45.9486" y="13.0302" smashed="yes">
+<attribute name="VALUE" x="43.942" y="13.3096" size="0.762" layer="27" font="vector" ratio="15"/>
+<attribute name="NAME" x="41.1226" y="11.1252" size="0.762" layer="25" font="vector" ratio="15" rot="R90"/>
+</element>
+<element name="X1" library="con-molex" package="52745-1690" value="52745-1690" x="42.8042" y="2.196" smashed="yes">
 <attribute name="MF" value="MOLEX" x="42.8042" y="2.196" size="1.778" layer="27" display="off"/>
 <attribute name="MPN" value="52745-1690" x="42.8042" y="2.196" size="1.778" layer="27" display="off"/>
 <attribute name="OC_FARNELL" value="unknown" x="42.8042" y="2.196" size="1.778" layer="27" display="off"/>
 <attribute name="OC_NEWARK" value="57H4224" x="42.8042" y="2.196" size="1.778" layer="27" display="off"/>
 </element>
-<element name="X2" library="con-molex" package="52745-1690" value="52745-1690" x="82.4448" y="2.2214">
+<element name="X2" library="con-molex" package="52745-1690" value="52745-1690" x="82.4448" y="2.2214" smashed="yes">
 <attribute name="MF" value="MOLEX" x="82.4448" y="2.2214" size="1.778" layer="27" display="off"/>
 <attribute name="MPN" value="52745-1690" x="82.4448" y="2.2214" size="1.778" layer="27" display="off"/>
 <attribute name="OC_FARNELL" value="unknown" x="82.4448" y="2.2214" size="1.778" layer="27" display="off"/>
 <attribute name="OC_NEWARK" value="57H4224" x="82.4448" y="2.2214" size="1.778" layer="27" display="off"/>
 </element>
-<element name="JP1" library="SparkFun" package="1X08" value="" x="55.118" y="20.574" rot="R270"/>
-<element name="JP2" library="SparkFun" package="1X08" value="" x="1.778" y="20.574" rot="R270"/>
-<element name="JP3" library="SparkFun" package="1X03" value="" x="78.4098" y="28.194" rot="R270"/>
-<element name="JP4" library="SparkFun" package="1X03" value="" x="75.8698" y="28.194" rot="R270"/>
-<element name="JP5" library="SparkFun" package="1X03" value="" x="73.3298" y="28.194" rot="R270"/>
-<element name="JP6" library="SparkFun" package="1X03" value="" x="70.7898" y="28.194" rot="R270"/>
-<element name="JP7" library="SparkFun" package="1X03" value="" x="68.2498" y="28.194" rot="R270"/>
-<element name="JP8" library="SparkFun" package="1X03" value="" x="65.7098" y="28.194" rot="R270"/>
-<element name="JP9" library="SparkFun" package="1X03" value="" x="88.3666" y="14.8082" rot="R180"/>
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+<element name="R8" library="SparkFun" package="0805" value="180" x="63.1928" y="23.067" smashed="yes" rot="R270">
+<attribute name="NAME" x="62.658" y="20.7113" size="0.762" layer="25" font="vector" ratio="15"/>
+<attribute name="VALUE" x="61.5926" y="23.4988" size="0.762" layer="27" font="vector" ratio="15" rot="R270"/>
+</element>
+<element name="R9" library="SparkFun" package="0805" value="5k" x="42.7736" y="19.2786" smashed="yes" rot="R180">
+<attribute name="NAME" x="42.1894" y="18.4531" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="44.069" y="18.4658" size="0.762" layer="27" font="vector" ratio="15" rot="R180"/>
+</element>
+<element name="R10" library="SparkFun" package="0805" value="10k" x="52.1716" y="7.9502" smashed="yes" rot="R180">
+<attribute name="NAME" x="52.9336" y="7.1247" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="53.1876" y="9.3472" size="0.762" layer="27" font="vector" ratio="15" rot="R180"/>
+</element>
+<element name="R13" library="SparkFun" package="0805" value="10k" x="20.9804" y="27.9908" smashed="yes" rot="R180">
+<attribute name="NAME" x="20.6756" y="29.5783" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="23.4188" y="29.5656" size="0.762" layer="27" font="vector" ratio="15" rot="R180"/>
+</element>
+<element name="IC4" library="atmel" package="TQFP44" value="M1284" x="24.638" y="15.621" smashed="yes">
+<attribute name="OC_NEWARK" value="unknown" x="24.638" y="15.621" size="1.778" layer="27" display="off"/>
+<attribute name="MPN" value="" x="24.638" y="15.621" size="1.778" layer="27" display="off"/>
+<attribute name="MF" value="" x="24.638" y="15.621" size="1.778" layer="27" display="off"/>
+<attribute name="OC_FARNELL" value="unknown" x="24.638" y="15.621" size="1.778" layer="27" display="off"/>
+<attribute name="VALUE" x="20.8788" y="14.1303" size="0.762" layer="27" font="vector" ratio="15"/>
+</element>
+<element name="D1" library="SparkFun" package="SOD-323" value="" x="16.002" y="19.4056" smashed="yes" rot="R270">
+<attribute name="NAME" x="16.891" y="20.574" size="0.762" layer="25" font="vector" ratio="15" rot="R270"/>
+<attribute name="VALUE" x="14.605" y="20.4216" size="0.4064" layer="27" rot="R270"/>
+</element>
+<element name="R12" library="SparkFun" package="0805" value="10k" x="13.9446" y="17.5006" smashed="yes" rot="R270">
+<attribute name="NAME" x="11.5951" y="18.3642" size="0.762" layer="25" font="vector" ratio="15" rot="R270"/>
+<attribute name="VALUE" x="12.4968" y="18.3134" size="0.762" layer="27" font="vector" ratio="15" rot="R270"/>
+</element>
+<element name="R2" library="SparkFun" package="0805" value="10k" x="76.7588" y="6.2992" smashed="yes" rot="R270">
+<attribute name="NAME" x="77.6097" y="6.477" size="0.762" layer="25" font="vector" ratio="15" rot="R270"/>
+<attribute name="VALUE" x="75.184" y="7.3406" size="0.762" layer="27" font="vector" ratio="15" rot="R270"/>
+</element>
+<element name="D2" library="SparkFun" package="SOD-323" value="" x="79.3242" y="7.3152" smashed="yes" rot="R180">
+<attribute name="NAME" x="80.8228" y="6.3754" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="80.3402" y="8.7122" size="0.4064" layer="27" rot="R180"/>
+</element>
+<element name="SG1" library="SparkFun" package="BUZZER-12MM-NS" value="BUZZERNS" x="49.022" y="23.8252" smashed="yes">
+<attribute name="VALUE" x="45.847" y="20.7772" size="0.762" layer="27" font="vector" ratio="15"/>
+</element>
+<element name="T1" library="SparkFun" package="SOT23-3" value="" x="40.9194" y="22.4028" smashed="yes" rot="R270">
+<attribute name="NAME" x="41.0591" y="24.1554" size="0.762" layer="25" font="vector" ratio="15"/>
+<attribute name="VALUE" x="40.7289" y="23.4188" size="0.4064" layer="27" rot="R270"/>
+</element>
+<element name="R1" library="pot" package="3223J" value="200" x="57.3024" y="26.6192" smashed="yes" rot="R90">
+<attribute name="NAME" x="55.8673" y="29.5021" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="56.2356" y="26.2763" size="0.762" layer="27" font="vector" ratio="15"/>
+</element>
+<element name="R11" library="SparkFun" package="0805" value="10k" x="31.3944" y="21.3868" smashed="yes" rot="R180">
+<attribute name="NAME" x="33.6804" y="20.5613" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="33.4772" y="19.6088" size="0.762" layer="27" font="vector" ratio="15" rot="R180"/>
+</element>
+<element name="IC5" library="SparkFun" package="SOT223" value="" x="69.596" y="3.7592" smashed="yes" rot="R90">
+<attribute name="VALUE" x="69.7865" y="2.6797" size="0.4064" layer="27" rot="R90"/>
+</element>
+<element name="C3" library="rcl" package="C1206" value="10u" x="62.103" y="5.08" smashed="yes" rot="R180">
+<attribute name="NAME" x="59.7408" y="6.096" size="0.762" layer="25" font="vector" ratio="15" rot="R180"/>
+<attribute name="VALUE" x="60.2742" y="7.0358" size="0.762" layer="27" font="vector" ratio="15" rot="R180"/>
 </element>
-<element name="C17" library="SparkFun" package="0603-CAP" value="18p" x="65.151" y="12.0396" rot="R270"/>
-<element name="C18" library="SparkFun" package="0603-CAP" value="18p" x="65.151" y="16.1036" rot="R90"/>
-<element name="R9" library="SparkFun" package="0603-RES" value="5k" x="36.1188" y="28.7782" rot="MR0"/>
-<element name="R10" library="SparkFun" package="0603-RES" value="10k" x="30.9626" y="24.9936" rot="R90"/>
-<element name="R11" library="SparkFun" package="0603-RES" value="100" x="84.1248" y="7.5946" rot="R270"/>
-<element name="R12" library="SparkFun" package="0603-RES" value="100" x="86.1568" y="6.9342" rot="R270"/>
-<element name="R13" library="SparkFun" package="0603-RES" value="10k" x="21.844" y="28.702" rot="R180"/>
 </elements>
 <signals>
 <signal name="+5V">
-<contactref element="JP15" pad="2"/>
 <contactref element="IC3" pad="3"/>
 <contactref element="C1" pad="1"/>
 <contactref element="JP18" pad="1"/>
-<contactref element="R2" pad="1"/>
 <contactref element="C5" pad="2"/>
 <contactref element="C6" pad="2"/>
 <contactref element="IC1" pad="4"/>
 <contactref element="IC1" pad="6"/>
 <contactref element="IC1" pad="18"/>
-<contactref element="JP2" pad="8"/>
 <contactref element="X2" pad="1"/>
 <contactref element="JP14" pad="2"/>
 <contactref element="JP13" pad="2"/>
@@ -1402,38 +1278,8 @@ design rules under a new name.</description>
 <contactref element="X2" pad="2"/>
 <contactref element="JP3" pad="2"/>
 <contactref element="JP5" pad="2"/>
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-<wire x1="2.032" y1="2.794" x2="3.556" y2="1.27" width="0.254" layer="16"/>
-<wire x1="3.556" y1="1.27" x2="7.366" y2="1.27" width="0.254" layer="16"/>
-<wire x1="7.366" y1="1.27" x2="7.62" y2="1.524" width="0.254" layer="16"/>
-<wire x1="17.6276" y1="2.8448" x2="19.8882" y2="0.508" width="0.254" layer="16"/>
-<wire x1="8.8646" y1="2.8194" x2="17.6276" y2="2.8448" width="0.254" layer="16"/>
-<wire x1="7.62" y1="1.524" x2="8.8646" y2="2.8194" width="0.254" layer="16"/>
-<wire x1="32.0294" y1="17.0942" x2="34.0496" y2="17.0942" width="0.254" layer="16"/>
-<wire x1="26.543" y1="22.5806" x2="32.0294" y2="17.0942" width="0.254" layer="16"/>
-<wire x1="19.5326" y1="22.5806" x2="26.543" y2="22.5806" width="0.254" layer="16"/>
-<wire x1="17.5768" y1="20.701" x2="19.5326" y2="22.5806" width="0.254" layer="16"/>
-<wire x1="17.5768" y1="2.8956" x2="17.5768" y2="20.701" width="0.254" layer="16"/>
-<wire x1="17.6276" y1="2.8448" x2="17.5768" y2="2.8956" width="0.254" layer="16"/>
-<wire x1="66.7258" y1="1.2446" x2="66.7766" y2="1.2446" width="0.254" layer="1"/>
-<wire x1="66.7766" y1="1.2446" x2="66.802" y2="1.27" width="0.254" layer="1"/>
 <wire x1="78.6948" y1="4.7214" x2="79.1948" y2="4.7214" width="0.254" layer="1"/>
-<wire x1="71.374" y1="6.5024" x2="71.374" y2="9.4008" width="0.4064" layer="1"/>
-<wire x1="71.374" y1="9.4008" x2="71.405" y2="9.4318" width="0.254" layer="1"/>
 <wire x1="73.805" y1="18.017" x2="73.8124" y2="18.0096" width="0.254" layer="1"/>
-<wire x1="78.616" y1="4.7214" x2="78.6948" y2="4.7214" width="0.254" layer="1"/>
-<wire x1="77.597" y1="5.5118" x2="78.616" y2="4.7214" width="0.254" layer="1"/>
-<wire x1="72.7456" y1="6.1976" x2="71.6788" y2="6.1976" width="0.254" layer="1"/>
-<wire x1="71.6788" y1="6.1976" x2="71.374" y2="6.5024" width="0.254" layer="1"/>
-<wire x1="66.6496" y1="1.2446" x2="66.7258" y2="1.2446" width="0.254" layer="1"/>
-<wire x1="65.7606" y1="0.508" x2="66.6496" y2="1.2446" width="0.254" layer="1"/>
-<wire x1="64.0588" y1="0.508" x2="65.7606" y2="0.508" width="0.254" layer="1"/>
-<wire x1="63.8586" y1="0.632" x2="63.8586" y2="2.1844" width="0.254" layer="1"/>
-<wire x1="64.0588" y1="0.508" x2="63.8586" y2="0.632" width="0.254" layer="1"/>
-<wire x1="73.6854" y1="5.5118" x2="77.597" y2="5.5118" width="0.254" layer="16"/>
-<wire x1="72.7456" y1="6.1976" x2="73.6854" y2="5.5118" width="0.254" layer="16"/>
-<wire x1="19.8882" y1="0.508" x2="25.781" y2="0.508" width="0.254" layer="16"/>
-<wire x1="85.8266" y1="14.8082" x2="85.8266" y2="17.3482" width="0.6096" layer="16"/>
 <wire x1="85.8266" y1="17.3482" x2="85.8266" y2="19.8882" width="0.6096" layer="16"/>
 <wire x1="85.8266" y1="19.8882" x2="85.8266" y2="22.4282" width="0.6096" layer="16"/>
 <wire x1="85.8266" y1="22.4282" x2="85.8266" y2="24.9682" width="0.6096" layer="16"/>
@@ -1442,14 +1288,6 @@ design rules under a new name.</description>
 <wire x1="70.7898" y1="25.654" x2="68.2498" y2="25.654" width="0.6096" layer="16"/>
 <wire x1="73.3298" y1="25.654" x2="70.7898" y2="25.654" width="0.6096" layer="16"/>
 <wire x1="75.8698" y1="25.654" x2="73.3298" y2="25.654" width="0.6096" layer="16"/>
-<wire x1="78.4098" y1="25.654" x2="75.8698" y2="25.654" width="0.6096" layer="16"/>
-<wire x1="66.802" y1="1.27" x2="68.6054" y2="1.27" width="0.4064" layer="1"/>
-<wire x1="68.6054" y1="1.27" x2="69.5198" y2="2.1844" width="0.4064" layer="1"/>
-<wire x1="69.5198" y1="2.1844" x2="69.7992" y2="2.4638" width="0.4064" layer="1"/>
-<wire x1="69.7992" y1="2.4638" x2="69.7992" y2="5.207" width="0.4064" layer="1"/>
-<wire x1="69.7992" y1="5.207" x2="70.8914" y2="6.2992" width="0.4064" layer="1"/>
-<wire x1="70.8914" y1="6.2992" x2="72.644" y2="6.2992" width="0.4064" layer="1"/>
-<wire x1="72.644" y1="6.2992" x2="72.7456" y2="6.1976" width="0.4064" layer="1"/>
 <wire x1="71.405" y1="9.4318" x2="71.405" y2="10.922" width="0.4064" layer="1"/>
 <wire x1="71.405" y1="10.922" x2="71.405" y2="13.874" width="0.4064" layer="1"/>
 <wire x1="71.405" y1="13.874" x2="72.898" y2="15.367" width="0.4064" layer="1"/>
@@ -1457,1327 +1295,994 @@ design rules under a new name.</description>
 <wire x1="72.898" y1="15.367" x2="72.205" y2="16.06" width="0.4064" layer="1"/>
 <wire x1="73.805" y1="16.274" x2="73.805" y2="18.017" width="0.4064" layer="1"/>
 <wire x1="72.898" y1="15.367" x2="73.805" y2="16.274" width="0.4064" layer="1"/>
-<wire x1="68.7696" y1="9.105" x2="68.7696" y2="8.7122" width="0.3048" layer="1"/>
-<wire x1="70.5612" y1="10.8966" x2="68.7696" y2="9.105" width="0.3048" layer="1"/>
-<wire x1="71.3796" y1="10.8966" x2="70.5612" y2="10.8966" width="0.3048" layer="1"/>
 <wire x1="71.405" y1="10.922" x2="71.3796" y2="10.8966" width="0.3048" layer="1"/>
 <wire x1="72.205" y1="18.017" x2="72.205" y2="19.655" width="0.4064" layer="1"/>
-<wire x1="72.205" y1="19.655" x2="71.6162" y2="20.1676" width="0.4064" layer="1"/>
-<wire x1="25.781" y1="0.508" x2="27.9654" y2="2.6924" width="0.254" layer="16"/>
-<wire x1="27.9654" y1="2.6924" x2="50.2412" y2="2.6924" width="0.254" layer="16"/>
-<wire x1="50.2412" y1="2.6924" x2="50.673" y2="2.032" width="0.254" layer="16"/>
-<wire x1="50.673" y1="2.032" x2="51.6636" y2="2.032" width="0.254" layer="16"/>
-<wire x1="51.6636" y1="2.032" x2="52.197" y2="2.6162" width="0.254" layer="16"/>
-<wire x1="52.197" y1="2.6162" x2="52.7304" y2="2.6162" width="0.254" layer="16"/>
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-<wire x1="53.2638" y1="2.0828" x2="53.2638" y2="1.6764" width="0.254" layer="16"/>
-<wire x1="53.2638" y1="1.6764" x2="53.8734" y2="1.0668" width="0.254" layer="16"/>
-<wire x1="80.2386" y1="25.654" x2="78.4098" y2="25.654" width="0.6096" layer="16"/>
-<wire x1="81.4324" y1="26.8478" x2="80.2386" y2="25.654" width="0.6096" layer="16"/>
-<wire x1="81.4324" y1="27.7622" x2="81.4324" y2="26.8478" width="0.6096" layer="16"/>
-<wire x1="82.6262" y1="29.0322" x2="81.4324" y2="27.7622" width="0.6096" layer="16"/>
-<wire x1="84.9376" y1="29.0322" x2="82.6262" y2="29.0322" width="0.6096" layer="16"/>
-<wire x1="85.8266" y1="28.1432" x2="84.9376" y2="29.0322" width="0.6096" layer="16"/>
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-<wire x1="86.233" y1="8.9662" x2="86.233" y2="14.4018" width="0.6096" layer="16"/>
-<wire x1="86.233" y1="14.4018" x2="85.8266" y2="14.8082" width="0.6096" layer="16"/>
-<wire x1="87.8332" y1="6.7818" x2="88.5444" y2="6.7818" width="0.254" layer="16"/>
-<wire x1="82.169" y1="1.1176" x2="87.8332" y2="6.7818" width="0.254" layer="16"/>
-<wire x1="74.7014" y1="1.1176" x2="82.169" y2="1.1176" width="0.254" layer="16"/>
-<wire x1="74.676" y1="0.9652" x2="74.7014" y2="1.1176" width="0.254" layer="16"/>
-<wire x1="70.8406" y1="0.9652" x2="74.676" y2="0.9652" width="0.254" layer="1"/>
-<wire x1="69.5198" y1="2.1844" x2="70.8406" y2="0.9652" width="0.254" layer="1"/>
-<wire x1="86.3854" y1="8.9662" x2="86.233" y2="8.9662" width="0.6096" layer="16"/>
-<wire x1="88.5444" y1="6.7818" x2="86.3854" y2="8.9662" width="0.6096" layer="16"/>
-<wire x1="53.8734" y1="1.0668" x2="58.9788" y2="1.0668" width="0.254" layer="16"/>
-<wire x1="58.9788" y1="1.0668" x2="59.0804" y2="1.1684" width="0.254" layer="16"/>
-<wire x1="59.2074" y1="0.508" x2="64.0588" y2="0.508" width="0.254" layer="1"/>
-<wire x1="59.0804" y1="0.635" x2="59.2074" y2="0.508" width="0.254" layer="1"/>
-<wire x1="59.0804" y1="1.1684" x2="59.0804" y2="0.635" width="0.254" layer="1"/>
-<via x="77.597" y="5.5118" extent="1-16" drill="0.6"/>
-<via x="72.7456" y="6.1976" extent="1-16" drill="0.6"/>
-<via x="59.0804" y="1.1684" extent="1-16" drill="0.6"/>
-<via x="74.676" y="0.9652" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="MOSI_XMEGA">
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+<wire x1="71.374" y1="8.128" x2="71.374" y2="9.4008" width="0.3048" layer="1"/>
+<wire x1="71.374" y1="9.4008" x2="71.405" y2="9.4318" width="0.3048" layer="1"/>
+<wire x1="64.008" y1="1.016" x2="67.945" y2="1.016" width="0.6096" layer="1"/>
+<wire x1="67.945" y1="1.016" x2="68.58" y2="1.651" width="0.6096" layer="1"/>
+<wire x1="68.58" y1="1.651" x2="68.58" y2="2.667" width="0.6096" layer="1"/>
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+<wire x1="71.9836" y1="3.048" x2="72.6948" y2="3.7592" width="0.6096" layer="1"/>
+<wire x1="64.2112" y1="11.7348" x2="64.2112" y2="14.2748" width="0.6096" layer="1"/>
+<wire x1="64.2112" y1="14.2748" x2="63.7794" y2="14.7066" width="0.6096" layer="1"/>
+<wire x1="85.8266" y1="14.8082" x2="85.8266" y2="14.5796" width="0.6096" layer="16"/>
+<wire x1="85.8266" y1="14.5796" x2="87.0458" y2="13.3604" width="0.6096" layer="16"/>
+<wire x1="87.0458" y1="13.3604" x2="87.0458" y2="8.1026" width="0.6096" layer="16"/>
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+<wire x1="79.5528" y1="6.477" x2="78.7146" y2="7.3152" width="0.6096" layer="16"/>
+<wire x1="78.7146" y1="7.3152" x2="74.8428" y2="7.3152" width="0.6096" layer="16"/>
+<wire x1="74.8428" y1="7.3152" x2="74.8428" y2="7.3516" width="0.6096" layer="16"/>
+<wire x1="74.8428" y1="7.3516" x2="74.4982" y2="7.6962" width="0.6096" layer="16"/>
+<via x="74.4982" y="7.6962" extent="1-16" drill="0.6"/>
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+<wire x1="74.676" y1="7.4676" x2="74.676" y2="5.0292" width="0.6096" layer="1"/>
+<wire x1="74.676" y1="5.0292" x2="73.8378" y2="4.191" width="0.6096" layer="1"/>
+<wire x1="73.8378" y1="4.191" x2="73.406" y2="4.191" width="0.6096" layer="1"/>
+<wire x1="73.406" y1="4.191" x2="73.279" y2="4.064" width="0.6096" layer="1"/>
+<wire x1="73.279" y1="4.064" x2="72.9996" y2="4.064" width="0.6096" layer="1"/>
+<wire x1="72.9996" y1="4.064" x2="72.6948" y2="3.7592" width="0.6096" layer="1"/>
+<wire x1="75.692" y1="4.826" x2="74.8792" y2="4.826" width="0.3048" layer="1"/>
+<wire x1="74.8792" y1="4.826" x2="74.676" y2="5.0292" width="0.3048" layer="1"/>
+<wire x1="85.8266" y1="14.8082" x2="85.8266" y2="17.3482" width="0.6096" layer="16"/>
+<wire x1="63.0428" y1="14.7066" x2="60.0964" y2="11.7602" width="0.6096" layer="16"/>
+<wire x1="60.0964" y1="11.7602" x2="60.0964" y2="4.191" width="0.6096" layer="16"/>
+<wire x1="60.0964" y1="4.191" x2="58.7502" y2="2.8448" width="0.6096" layer="16"/>
+<wire x1="58.7502" y1="2.8448" x2="56.9468" y2="2.8448" width="0.6096" layer="16"/>
+<wire x1="56.9468" y1="2.8448" x2="56.896" y2="2.794" width="0.6096" layer="16"/>
+<wire x1="61.468" y1="28.194" x2="64.008" y2="25.654" width="0.3048" layer="16"/>
+<wire x1="64.008" y1="25.654" x2="65.7098" y2="25.654" width="0.3048" layer="16"/>
+<via x="63.0428" y="14.7066" extent="1-16" drill="0.6"/>
+<wire x1="63.0428" y1="14.7066" x2="63.7794" y2="14.7066" width="0.6096" layer="1"/>
+</signal>
+<signal name="SCK_1284">
+<contactref element="IC2" pad="5"/>
+<contactref element="IC4" pad="3"/>
+<contactref element="X1" pad="15"/>
+<wire x1="47.1932" y1="9.9314" x2="47.2186" y2="9.9568" width="0.3048" layer="1"/>
+<wire x1="18.838" y1="18.021" x2="20.7648" y2="18.021" width="0.3048" layer="1"/>
+<wire x1="20.7648" y1="18.021" x2="21.2344" y2="17.5514" width="0.3048" layer="1"/>
+<via x="21.2344" y="17.5514" extent="1-16" drill="0.6"/>
+<wire x1="21.2344" y1="17.5514" x2="21.6408" y2="17.5514" width="0.3048" layer="16"/>
+<wire x1="21.6408" y1="17.5514" x2="22.3774" y2="16.8148" width="0.3048" layer="16"/>
+<wire x1="22.3774" y1="16.8148" x2="28.0162" y2="16.8148" width="0.3048" layer="16"/>
+<wire x1="28.0162" y1="16.8148" x2="32.2326" y2="12.5984" width="0.3048" layer="16"/>
+<wire x1="46.0542" y1="4.696" x2="46.0542" y2="5.4824" width="0.3048" layer="1"/>
+<wire x1="46.0542" y1="5.4824" x2="46.0502" y2="5.4864" width="0.3048" layer="1"/>
+<wire x1="46.0502" y1="5.4864" x2="46.0502" y2="5.5372" width="0.3048" layer="1"/>
+<wire x1="43.9928" y1="7.747" x2="43.9928" y2="7.4168" width="0.3048" layer="16"/>
+<wire x1="43.9928" y1="7.4168" x2="44.7548" y2="6.6548" width="0.3048" layer="16"/>
+<wire x1="44.7548" y1="6.6548" x2="46.609" y2="6.6548" width="0.3048" layer="16"/>
+<wire x1="46.609" y1="6.6548" x2="47.0662" y2="6.1976" width="0.3048" layer="16"/>
+<via x="47.0662" y="6.1976" extent="1-16" drill="0.6"/>
+<wire x1="47.0662" y1="6.1976" x2="46.7106" y2="6.1976" width="0.3048" layer="1"/>
+<wire x1="46.7106" y1="6.1976" x2="46.0502" y2="5.5372" width="0.3048" layer="1"/>
+<wire x1="47.1932" y1="6.3246" x2="47.0662" y2="6.1976" width="0.3048" layer="1"/>
+<wire x1="47.1932" y1="9.9314" x2="47.1932" y2="8.8646" width="0.3048" layer="1"/>
+<wire x1="47.1932" y1="8.8646" x2="47.7266" y2="8.3312" width="0.3048" layer="1"/>
+<wire x1="47.7266" y1="8.3312" x2="49.0982" y2="8.3312" width="0.3048" layer="1"/>
+<wire x1="50.038" y1="6.477" x2="49.3268" y2="5.7658" width="0.3048" layer="1"/>
+<wire x1="49.3268" y1="5.7658" x2="47.498" y2="5.7658" width="0.3048" layer="1"/>
+<wire x1="47.498" y1="5.7658" x2="47.0662" y2="6.1976" width="0.3048" layer="1"/>
+<wire x1="49.0982" y1="8.3312" x2="50.038" y2="7.3914" width="0.3048" layer="1"/>
+<wire x1="50.038" y1="7.3914" x2="50.038" y2="6.477" width="0.3048" layer="1"/>
+<wire x1="32.2326" y1="12.5984" x2="36.7284" y2="12.5984" width="0.3048" layer="16"/>
+<wire x1="40.4622" y1="11.2776" x2="43.9928" y2="7.747" width="0.3048" layer="16"/>
+<wire x1="36.7284" y1="12.5984" x2="38.0492" y2="11.2776" width="0.3048" layer="16"/>
+<wire x1="38.0492" y1="11.2776" x2="40.4622" y2="11.2776" width="0.3048" layer="16"/>
 </signal>
-<signal name="GPIO5">
-<contactref element="U$1" pad="62"/>
+<signal name="GPIO4">
 <contactref element="JP2" pad="6"/>
-<wire x1="1.778" y1="7.874" x2="9.906" y2="7.874" width="0.254" layer="16"/>
-<wire x1="31.6555" y1="9.9595" x2="31.602" y2="9.906" width="0.254" layer="1"/>
-<wire x1="31.6555" y1="9.9595" x2="31.6528" y2="9.9568" width="0.254" layer="1"/>
-<wire x1="9.906" y1="7.874" x2="28.6766" y2="7.874" width="0.254" layer="1"/>
-<wire x1="28.6766" y1="7.874" x2="30.7848" y2="9.9822" width="0.254" layer="1"/>
-<wire x1="30.7848" y1="9.9822" x2="31.6328" y2="9.9822" width="0.254" layer="1"/>
-<wire x1="31.6328" y1="9.9822" x2="31.6555" y2="9.9595" width="0.254" layer="1"/>
-<via x="9.906" y="7.874" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="14"/>
+<wire x1="22.238" y1="9.821" x2="22.238" y2="9.03" width="0.3048" layer="1"/>
+<wire x1="21.59" y1="6.604" x2="16.51" y2="6.604" width="0.3048" layer="1"/>
+<wire x1="16.51" y1="6.604" x2="15.748" y2="5.842" width="0.3048" layer="1"/>
+<wire x1="15.748" y1="5.842" x2="7.62" y2="5.842" width="0.3048" layer="1"/>
+<wire x1="7.62" y1="5.842" x2="5.588" y2="7.874" width="0.3048" layer="1"/>
+<wire x1="5.588" y1="7.874" x2="1.778" y2="7.874" width="0.3048" layer="1"/>
+<wire x1="21.59" y1="6.604" x2="21.717" y2="6.731" width="0.3048" layer="1"/>
+<wire x1="21.717" y1="6.731" x2="21.717" y2="8.509" width="0.3048" layer="1"/>
+<wire x1="21.717" y1="8.509" x2="22.238" y2="9.03" width="0.3048" layer="1"/>
 </signal>
 <signal name="GPIO6">
-<contactref element="U$1" pad="63"/>
-<contactref element="JP2" pad="7"/>
-<wire x1="1.778" y1="5.334" x2="3.81" y2="5.334" width="0.254" layer="16"/>
-<wire x1="3.81" y1="5.334" x2="4.572" y2="6.096" width="0.254" layer="16"/>
-<wire x1="4.572" y1="6.096" x2="9.906" y2="6.096" width="0.254" layer="16"/>
-<wire x1="9.906" y1="6.096" x2="20.6502" y2="6.096" width="0.254" layer="1"/>
-<wire x1="20.6502" y1="6.096" x2="21.5646" y2="7.0104" width="0.254" layer="1"/>
-<wire x1="31.6555" y1="9.1721" x2="31.6274" y2="9.144" width="0.254" layer="1"/>
-<wire x1="21.5646" y1="7.0104" x2="28.6512" y2="7.0104" width="0.254" layer="1"/>
-<wire x1="28.6512" y1="7.0104" x2="30.8102" y2="9.1694" width="0.254" layer="1"/>
-<wire x1="30.8102" y1="9.1694" x2="31.6528" y2="9.1694" width="0.254" layer="1"/>
-<wire x1="31.6528" y1="9.1694" x2="31.6555" y2="9.1721" width="0.254" layer="1"/>
-<via x="9.906" y="6.096" extent="1-16" drill="0.6"/>
+<contactref element="JP1" pad="5"/>
+<contactref element="IC4" pad="32"/>
+<wire x1="30.438" y1="18.821" x2="33.807" y2="18.821" width="0.3048" layer="1"/>
+<wire x1="33.807" y1="18.821" x2="34.036" y2="19.05" width="0.3048" layer="1"/>
+<wire x1="34.036" y1="19.05" x2="36.322" y2="19.05" width="0.3048" layer="1"/>
+<via x="36.322" y="19.05" extent="1-16" drill="0.6"/>
+<wire x1="51.943" y1="10.414" x2="56.896" y2="10.414" width="0.3048" layer="16"/>
+<wire x1="36.322" y1="19.05" x2="37.0332" y2="19.05" width="0.3048" layer="16"/>
+<wire x1="37.0332" y1="19.05" x2="37.4142" y2="18.669" width="0.3048" layer="16"/>
+<wire x1="37.4142" y1="18.669" x2="43.688" y2="18.669" width="0.3048" layer="16"/>
+<wire x1="43.688" y1="18.669" x2="51.943" y2="10.414" width="0.3048" layer="16"/>
 </signal>
 <signal name="GPIO7">
-<contactref element="U$1" pad="64"/>
-<contactref element="JP1" pad="5"/>
-<wire x1="30.84" y1="7.5692" x2="31.6555" y2="8.3847" width="0.254" layer="1"/>
-<wire x1="30.4546" y1="7.4676" x2="30.84" y2="7.5692" width="0.254" layer="1"/>
-<wire x1="55.118" y1="10.414" x2="55.118" y2="10.3632" width="0.254" layer="16"/>
-<wire x1="55.4736" y1="10.414" x2="55.118" y2="10.414" width="0.254" layer="16"/>
-<wire x1="56.5658" y1="9.3218" x2="55.4736" y2="10.414" width="0.254" layer="16"/>
-<wire x1="56.5658" y1="5.7912" x2="56.5658" y2="9.3218" width="0.254" layer="16"/>
-<wire x1="53.7718" y1="2.1082" x2="54.356" y2="1.524" width="0.254" layer="16"/>
-<wire x1="53.7718" y1="2.9718" x2="53.7718" y2="2.1082" width="0.254" layer="16"/>
-<wire x1="30.4546" y1="7.4676" x2="31.3182" y2="7.4676" width="0.254" layer="16"/>
-<wire x1="32.4866" y1="4.6736" x2="33.2486" y2="3.9116" width="0.254" layer="16"/>
-<wire x1="32.4866" y1="6.2992" x2="32.4866" y2="4.6736" width="0.254" layer="16"/>
-<wire x1="31.3182" y1="7.4676" x2="32.4866" y2="6.2992" width="0.254" layer="16"/>
-<wire x1="54.356" y1="1.524" x2="57.912" y2="1.524" width="0.254" layer="16"/>
-<wire x1="57.912" y1="1.524" x2="58.1152" y2="1.7272" width="0.254" layer="16"/>
-<wire x1="58.1152" y1="1.7272" x2="58.1152" y2="4.2418" width="0.254" layer="16"/>
-<wire x1="58.1152" y1="4.2418" x2="56.5658" y2="5.7912" width="0.254" layer="16"/>
-<wire x1="33.2486" y1="3.9116" x2="50.1904" y2="3.9116" width="0.254" layer="16"/>
-<wire x1="50.1904" y1="3.9116" x2="50.3682" y2="4.0894" width="0.254" layer="16"/>
-<wire x1="50.3682" y1="4.0894" x2="51.7144" y2="4.0894" width="0.254" layer="16"/>
-<wire x1="51.7144" y1="4.0894" x2="51.8668" y2="3.937" width="0.254" layer="16"/>
-<wire x1="51.8668" y1="3.937" x2="52.8066" y2="3.937" width="0.254" layer="16"/>
-<wire x1="52.8066" y1="3.937" x2="53.7718" y2="2.9718" width="0.254" layer="16"/>
-<via x="30.4546" y="7.4676" extent="1-16" drill="0.6"/>
+<contactref element="JP1" pad="6"/>
+<contactref element="IC4" pad="31"/>
+<wire x1="30.438" y1="18.021" x2="35.039" y2="18.021" width="0.3048" layer="1"/>
+<wire x1="35.039" y1="18.021" x2="35.052" y2="18.034" width="0.3048" layer="1"/>
+<via x="35.052" y="18.034" extent="1-16" drill="0.6"/>
+<wire x1="35.052" y1="18.034" x2="43.434" y2="18.034" width="0.3048" layer="16"/>
+<wire x1="43.434" y1="18.034" x2="53.594" y2="7.874" width="0.3048" layer="16"/>
+<wire x1="53.594" y1="7.874" x2="56.896" y2="7.874" width="0.3048" layer="16"/>
 </signal>
 <signal name="GPIO8">
-<contactref element="JP1" pad="6"/>
-<contactref element="U$1" pad="21"/>
-<wire x1="47.1749" y1="11.5343" x2="47.223" y2="11.5824" width="0.254" layer="1"/>
-<wire x1="50.9524" y1="11.0998" x2="54.2036" y2="7.874" width="0.254" layer="16"/>
-<wire x1="54.2036" y1="7.874" x2="55.118" y2="7.874" width="0.254" layer="16"/>
-<wire x1="48.514" y1="11.7348" x2="48.5902" y2="11.7348" width="0.254" layer="1"/>
-<wire x1="48.4124" y1="11.6332" x2="48.514" y2="11.7348" width="0.254" layer="1"/>
-<wire x1="47.2738" y1="11.6332" x2="48.4124" y2="11.6332" width="0.254" layer="1"/>
-<wire x1="47.1749" y1="11.5343" x2="47.2738" y2="11.6332" width="0.254" layer="1"/>
-<wire x1="48.5902" y1="11.7348" x2="49.1744" y2="11.7348" width="0.254" layer="16"/>
-<wire x1="49.1744" y1="11.7348" x2="49.7078" y2="11.2014" width="0.254" layer="16"/>
-<wire x1="49.7078" y1="11.2014" x2="50.8508" y2="11.2014" width="0.254" layer="16"/>
-<wire x1="50.8508" y1="11.2014" x2="50.9524" y2="11.0998" width="0.254" layer="16"/>
-<via x="48.5902" y="11.7348" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="GPIO9">
 <contactref element="JP1" pad="7"/>
-<contactref element="U$1" pad="20"/>
-<wire x1="47.1749" y1="10.7469" x2="47.203" y2="10.7188" width="0.254" layer="1"/>
-<wire x1="47.203" y1="10.7188" x2="49.1744" y2="10.7188" width="0.254" layer="1"/>
-<wire x1="49.1744" y1="10.7188" x2="49.5046" y2="10.3886" width="0.254" layer="1"/>
-<wire x1="49.5046" y1="10.3886" x2="49.8602" y2="10.3886" width="0.254" layer="1"/>
-<wire x1="49.8602" y1="10.3886" x2="50.2158" y2="10.033" width="0.254" layer="1"/>
-<wire x1="50.2158" y1="10.033" x2="50.4444" y2="10.033" width="0.254" layer="1"/>
-<wire x1="50.4444" y1="10.033" x2="55.118" y2="5.334" width="0.254" layer="16"/>
-<via x="50.4444" y="10.033" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="GPIO1">
+<contactref element="IC4" pad="30"/>
+<wire x1="30.438" y1="17.221" x2="33.579" y2="17.221" width="0.3048" layer="1"/>
+<wire x1="33.579" y1="17.221" x2="34.036" y2="16.764" width="0.3048" layer="1"/>
+<via x="34.036" y="16.764" extent="1-16" drill="0.6"/>
+<wire x1="34.036" y1="16.764" x2="43.18" y2="16.764" width="0.3048" layer="16"/>
+<wire x1="43.18" y1="16.764" x2="54.61" y2="5.334" width="0.3048" layer="16"/>
+<wire x1="54.61" y1="5.334" x2="56.896" y2="5.334" width="0.3048" layer="16"/>
+</signal>
+<signal name="GPIO0">
 <contactref element="JP2" pad="2"/>
-<contactref element="U$1" pad="50"/>
-<wire x1="1.778" y1="18.034" x2="9.906" y2="18.034" width="0.254" layer="16"/>
-<wire x1="9.906" y1="18.034" x2="11.2803" y2="19.4083" width="0.254" layer="1"/>
-<wire x1="11.2803" y1="19.4083" x2="18.9965" y2="19.4083" width="0.254" layer="1"/>
-<wire x1="18.9965" y1="19.4083" x2="19.1516" y2="19.2532" width="0.254" layer="1"/>
-<wire x1="19.1516" y1="19.2532" x2="20.8534" y2="19.2532" width="0.254" layer="1"/>
-<wire x1="20.8534" y1="19.2532" x2="21.1328" y2="19.5326" width="0.254" layer="1"/>
-<wire x1="21.1328" y1="19.5326" x2="31.5312" y2="19.5326" width="0.254" layer="1"/>
-<wire x1="31.5312" y1="19.5326" x2="31.6555" y2="19.4083" width="0.254" layer="1"/>
-<via x="9.906" y="18.034" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="41"/>
+<wire x1="23.038" y1="21.421" x2="23.038" y2="22.936" width="0.3048" layer="1"/>
+<wire x1="23.038" y1="22.936" x2="21.336" y2="24.638" width="0.3048" layer="1"/>
+<wire x1="4.318" y1="19.304" x2="3.048" y2="18.034" width="0.3048" layer="1"/>
+<wire x1="3.048" y1="18.034" x2="1.778" y2="18.034" width="0.3048" layer="1"/>
+<wire x1="21.336" y1="24.638" x2="4.953" y2="24.638" width="0.3048" layer="1"/>
+<wire x1="4.953" y1="24.638" x2="4.318" y2="24.003" width="0.3048" layer="1"/>
+<wire x1="4.318" y1="24.003" x2="4.318" y2="19.304" width="0.3048" layer="1"/>
 </signal>
-<signal name="GPIO3">
+<signal name="GPIO2">
 <contactref element="JP2" pad="4"/>
-<contactref element="U$1" pad="54"/>
-<wire x1="1.778" y1="12.954" x2="1.8034" y2="12.9286" width="0.254" layer="16"/>
-<wire x1="31.6555" y1="16.2587" x2="31.6074" y2="16.3068" width="0.254" layer="1"/>
-<wire x1="1.8034" y1="12.9286" x2="3.429" y2="12.9286" width="0.254" layer="16"/>
-<wire x1="3.429" y1="12.9286" x2="6.4008" y2="15.9004" width="0.254" layer="16"/>
-<wire x1="6.4008" y1="15.9004" x2="7.112" y2="15.9004" width="0.254" layer="1"/>
-<wire x1="7.112" y1="15.9004" x2="7.6454" y2="16.3576" width="0.254" layer="1"/>
-<wire x1="7.6454" y1="16.3576" x2="30.7848" y2="16.3576" width="0.254" layer="1"/>
-<wire x1="30.7848" y1="16.3576" x2="30.9372" y2="16.2814" width="0.254" layer="1"/>
-<wire x1="30.9372" y1="16.2814" x2="31.6328" y2="16.2814" width="0.254" layer="1"/>
-<wire x1="31.6328" y1="16.2814" x2="31.6555" y2="16.2587" width="0.254" layer="1"/>
-<via x="6.4008" y="15.9004" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="TMS_XMEGA">
-<contactref element="U$1" pad="10"/>
+<contactref element="IC4" pad="43"/>
+<wire x1="21.438" y1="21.421" x2="21.438" y2="22.504" width="0.3048" layer="1"/>
+<wire x1="21.438" y1="22.504" x2="20.447" y2="23.495" width="0.3048" layer="1"/>
+<wire x1="5.842" y1="23.0632" x2="5.842" y2="13.97" width="0.3048" layer="1"/>
+<wire x1="5.842" y1="13.97" x2="4.826" y2="12.954" width="0.3048" layer="1"/>
+<wire x1="4.826" y1="12.954" x2="1.778" y2="12.954" width="0.3048" layer="1"/>
+<wire x1="5.842" y1="23.0632" x2="6.2738" y2="23.495" width="0.3048" layer="1"/>
+<wire x1="6.2738" y1="23.495" x2="20.447" y2="23.495" width="0.3048" layer="1"/>
+</signal>
+<signal name="TMS_1284">
+<contactref element="IC4" pad="22"/>
 <contactref element="X1" pad="5"/>
-<wire x1="40.5963" y1="6.5305" x2="40.47" y2="6.4042" width="0.254" layer="1"/>
-<wire x1="41.0542" y1="4.696" x2="41.0542" y2="5.2754" width="0.254" layer="1"/>
-<wire x1="41.0542" y1="5.2754" x2="40.6146" y2="5.715" width="0.254" layer="1"/>
-<wire x1="40.6146" y1="5.715" x2="40.6146" y2="6.5122" width="0.254" layer="1"/>
-<wire x1="40.6146" y1="6.5122" x2="40.5963" y2="6.5305" width="0.254" layer="1"/>
-</signal>
-<signal name="TDI_XMEGA">
-<contactref element="U$1" pad="11"/>
-<contactref element="X1" pad="6"/>
-<wire x1="41.5542" y1="4.696" x2="41.5542" y2="5.7406" width="0.254" layer="1"/>
-<wire x1="41.5542" y1="5.7406" x2="41.4274" y2="5.8674" width="0.254" layer="1"/>
-<wire x1="41.4274" y1="5.8674" x2="41.4274" y2="6.4868" width="0.254" layer="1"/>
-<wire x1="41.4274" y1="6.4868" x2="41.3837" y2="6.5305" width="0.254" layer="1"/>
+<wire x1="28.638" y1="9.821" x2="37.296" y2="9.821" width="0.3048" layer="1"/>
+<wire x1="37.296" y1="9.821" x2="41.0718" y2="6.0452" width="0.3048" layer="1"/>
+<wire x1="41.0718" y1="6.0452" x2="41.0718" y2="4.7136" width="0.3048" layer="1"/>
+<wire x1="41.0718" y1="4.7136" x2="41.0542" y2="4.696" width="0.3048" layer="1"/>
 </signal>
-<signal name="TCK_XMEGA">
-<contactref element="U$1" pad="12"/>
+<signal name="TDI_1284">
+<contactref element="IC4" pad="24"/>
 <contactref element="X1" pad="7"/>
-<wire x1="42.0542" y1="4.696" x2="42.0542" y2="6.4136" width="0.254" layer="1"/>
-<wire x1="42.0542" y1="6.4136" x2="42.1711" y2="6.5305" width="0.254" layer="1"/>
-</signal>
-<signal name="TDO_XMEGA">
-<contactref element="U$1" pad="13"/>
-<contactref element="X1" pad="8"/>
-<wire x1="42.9585" y1="6.5305" x2="42.9585" y2="6.1031" width="0.254" layer="1"/>
-<wire x1="42.5542" y1="4.696" x2="42.5542" y2="5.4956" width="0.254" layer="1"/>
-<wire x1="42.5542" y1="5.4956" x2="42.9768" y2="5.9182" width="0.254" layer="1"/>
-<wire x1="42.9768" y1="5.9182" x2="42.9768" y2="6.5122" width="0.254" layer="1"/>
-<wire x1="42.9768" y1="6.5122" x2="42.9585" y2="6.5305" width="0.254" layer="1"/>
+<wire x1="30.438" y1="12.421" x2="36.2708" y2="12.421" width="0.3048" layer="1"/>
+<wire x1="42.0624" y1="6.6294" x2="42.0624" y2="4.7042" width="0.3048" layer="1"/>
+<wire x1="42.0624" y1="4.7042" x2="42.0542" y2="4.696" width="0.3048" layer="1"/>
+<wire x1="42.0624" y1="6.6294" x2="36.2708" y2="12.421" width="0.3048" layer="1"/>
+</signal>
+<signal name="TCK_1284">
+<contactref element="IC4" pad="21"/>
+<contactref element="X1" pad="4"/>
+<wire x1="27.838" y1="9.821" x2="27.838" y2="8.865" width="0.3048" layer="1"/>
+<wire x1="27.838" y1="8.865" x2="28.194" y2="8.509" width="0.3048" layer="1"/>
+<wire x1="28.194" y1="8.509" x2="37.846" y2="8.509" width="0.3048" layer="1"/>
+<wire x1="37.846" y1="8.509" x2="40.5384" y2="5.8166" width="0.3048" layer="1"/>
+<wire x1="40.5384" y1="5.8166" x2="40.5384" y2="4.7118" width="0.3048" layer="1"/>
+<wire x1="40.5384" y1="4.7118" x2="40.5542" y2="4.696" width="0.3048" layer="1"/>
+</signal>
+<signal name="TDO_1284">
+<contactref element="IC4" pad="23"/>
+<contactref element="X1" pad="6"/>
+<wire x1="30.438" y1="11.621" x2="36.258" y2="11.621" width="0.3048" layer="1"/>
+<wire x1="36.258" y1="11.621" x2="41.5798" y2="6.2992" width="0.3048" layer="1"/>
+<wire x1="41.5798" y1="6.2992" x2="41.5798" y2="4.7216" width="0.3048" layer="1"/>
+<wire x1="41.5798" y1="4.7216" x2="41.5542" y2="4.696" width="0.3048" layer="1"/>
 </signal>
 <signal name="SDA">
-<contactref element="U$1" pad="16"/>
 <contactref element="R3" pad="1"/>
 <contactref element="JP1" pad="3"/>
-<wire x1="52.8946" y1="16.549" x2="52.8946" y2="16.8402" width="0.254" layer="1"/>
-<wire x1="53.7591" y1="15.6845" x2="52.8946" y2="16.549" width="0.254" layer="1"/>
-<wire x1="53.7591" y1="15.6845" x2="54.0766" y2="15.367" width="0.254" layer="1"/>
-<wire x1="54.0766" y1="15.367" x2="54.991" y2="15.367" width="0.254" layer="1"/>
-<wire x1="54.991" y1="15.367" x2="55.118" y2="15.494" width="0.254" layer="1"/>
-<wire x1="45.3207" y1="6.5305" x2="45.2472" y2="6.3246" width="0.254" layer="1"/>
-<wire x1="53.0352" y1="5.4356" x2="53.2892" y2="5.9182" width="0.254" layer="1"/>
-<wire x1="53.2892" y1="5.9182" x2="53.2892" y2="14.986" width="0.254" layer="1"/>
-<wire x1="53.2892" y1="14.986" x2="53.7591" y2="15.4559" width="0.254" layer="1"/>
-<wire x1="53.7591" y1="15.4559" x2="53.7591" y2="15.6845" width="0.254" layer="1"/>
-<wire x1="45.2472" y1="6.3246" x2="46.2534" y2="6.3246" width="0.254" layer="1"/>
-<wire x1="46.2534" y1="6.3246" x2="46.4566" y2="6.1214" width="0.254" layer="1"/>
-<wire x1="46.4566" y1="6.1214" x2="47.8536" y2="6.1214" width="0.254" layer="16"/>
-<wire x1="47.8536" y1="6.1214" x2="47.9552" y2="6.223" width="0.254" layer="16"/>
-<wire x1="47.9552" y1="6.223" x2="50.2666" y2="6.223" width="0.254" layer="16"/>
-<wire x1="50.2666" y1="6.223" x2="51.054" y2="5.4356" width="0.254" layer="16"/>
-<wire x1="51.054" y1="5.4356" x2="53.0352" y2="5.4356" width="0.254" layer="16"/>
-<via x="46.4566" y="6.1214" extent="1-16" drill="0.6"/>
-<via x="53.0352" y="5.4356" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="20"/>
+<wire x1="27.038" y1="9.821" x2="27.038" y2="8.914" width="0.3048" layer="1"/>
+<wire x1="27.038" y1="8.914" x2="31.5722" y2="4.3798" width="0.3048" layer="1"/>
+<wire x1="31.5722" y1="4.3798" x2="32.0658" y2="4.3798" width="0.3048" layer="1"/>
+<wire x1="32.0658" y1="4.3798" x2="33.02" y2="5.334" width="0.3048" layer="1"/>
+<via x="33.02" y="5.334" extent="1-16" drill="0.6"/>
+<wire x1="33.02" y1="5.334" x2="34.671" y2="5.334" width="0.3048" layer="16"/>
+<wire x1="58.674" y1="15.494" x2="56.896" y2="15.494" width="0.3048" layer="16"/>
+<wire x1="65.1256" y1="17.2974" x2="64.643" y2="17.78" width="0.3048" layer="16"/>
+<wire x1="64.643" y1="17.78" x2="60.96" y2="17.78" width="0.3048" layer="16"/>
+<wire x1="60.96" y1="17.78" x2="58.674" y2="15.494" width="0.3048" layer="16"/>
+<wire x1="34.671" y1="5.334" x2="38.6969" y2="1.3081" width="0.3048" layer="16"/>
+<wire x1="65.1256" y1="17.2974" x2="65.1256" y2="14.4526" width="0.3048" layer="16"/>
+<wire x1="65.1256" y1="14.4526" x2="63.2714" y2="12.5984" width="0.3048" layer="16"/>
+<wire x1="63.2714" y1="12.5984" x2="63.2714" y2="4.5466" width="0.3048" layer="16"/>
+<wire x1="63.2714" y1="4.5466" x2="59.8424" y2="1.1176" width="0.3048" layer="16"/>
+<wire x1="59.8424" y1="1.1176" x2="38.8874" y2="1.1176" width="0.3048" layer="16"/>
+<wire x1="38.8874" y1="1.1176" x2="38.6969" y2="1.3081" width="0.3048" layer="16"/>
 </signal>
 <signal name="SCL">
-<contactref element="U$1" pad="17"/>
 <contactref element="R4" pad="1"/>
 <contactref element="JP1" pad="2"/>
-<wire x1="53.8344" y1="18.034" x2="52.92" y2="18.9484" width="0.254" layer="1"/>
-<wire x1="55.118" y1="18.034" x2="53.8344" y2="18.034" width="0.254" layer="1"/>
-<wire x1="47.1749" y1="8.3847" x2="47.2792" y2="8.2804" width="0.254" layer="1"/>
-<wire x1="47.2792" y1="8.2804" x2="47.7774" y2="8.2804" width="0.254" layer="1"/>
-<wire x1="47.7774" y1="8.2804" x2="48.9204" y2="7.1374" width="0.254" layer="1"/>
-<wire x1="48.9204" y1="7.1374" x2="49.0982" y2="7.1882" width="0.254" layer="1"/>
-<wire x1="49.0982" y1="7.1882" x2="49.0982" y2="7.0866" width="0.254" layer="16"/>
-<wire x1="49.0982" y1="7.0866" x2="51.1556" y2="7.0866" width="0.254" layer="16"/>
-<wire x1="51.1556" y1="7.0866" x2="51.4858" y2="6.7818" width="0.254" layer="16"/>
-<wire x1="51.7144" y1="13.589" x2="51.7144" y2="12.8778" width="0.254" layer="16"/>
-<wire x1="54.8132" y1="18.034" x2="55.118" y2="18.034" width="0.254" layer="16"/>
-<wire x1="51.7144" y1="12.8778" x2="52.9082" y2="12.8778" width="0.254" layer="16"/>
-<wire x1="52.9082" y1="12.8778" x2="53.2384" y2="13.208" width="0.254" layer="16"/>
-<wire x1="53.2384" y1="13.208" x2="53.2384" y2="16.4592" width="0.254" layer="16"/>
-<wire x1="53.2384" y1="16.4592" x2="54.8132" y2="18.034" width="0.254" layer="16"/>
-<wire x1="51.7144" y1="12.8016" x2="51.7144" y2="13.589" width="0.254" layer="1"/>
-<wire x1="51.9684" y1="12.3952" x2="51.7144" y2="12.8016" width="0.254" layer="1"/>
-<wire x1="51.9684" y1="6.985" x2="51.9684" y2="12.3952" width="0.254" layer="1"/>
-<wire x1="51.4858" y1="6.7818" x2="51.9684" y2="6.985" width="0.254" layer="1"/>
-<via x="49.0982" y="7.1882" extent="1-16" drill="0.6"/>
-<via x="51.4858" y="6.7818" extent="1-16" drill="0.6"/>
-<via x="51.7144" y="13.589" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="19"/>
+<wire x1="26.238" y1="9.821" x2="26.238" y2="8.7632" width="0.3048" layer="1"/>
+<wire x1="26.238" y1="8.7632" x2="29.2862" y2="5.715" width="0.3048" layer="1"/>
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+<wire x1="29.2862" y1="5.715" x2="28.575" y2="5.715" width="0.3048" layer="1"/>
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 </signal>
 <signal name="TX_XBEE">
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 </signal>
 <signal name="RX_XBEE">
-<contactref element="U$1" pad="19"/>
 <contactref element="XB1" pad="3"/>
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-<via x="48.8442" y="9.7028" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="RX_XMEGA">
-<contactref element="U$1" pad="22"/>
+<contactref element="IC4" pad="10"/>
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+<wire x1="16.4338" y1="10.16" x2="16.4338" y2="11.0998" width="0.3048" layer="1"/>
+</signal>
+<signal name="RX_1284">
 <contactref element="X1" pad="11"/>
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-<wire x1="47.9298" y1="5.5626" x2="47.9298" y2="7.2136" width="0.254" layer="1"/>
-</signal>
-<signal name="TX_XMEGA">
-<contactref element="U$1" pad="23"/>
-<contactref element="X1" pad="10"/>
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-<wire x1="50.9016" y1="11.9888" x2="50.8" y2="12.0904" width="0.254" layer="1"/>
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 </signal>
 <signal name="N$6">
-<contactref element="U$1" pad="58"/>
 <contactref element="Q1" pad="2"/>
-<contactref element="C16" pad="2"/>
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+<contactref element="C12" pad="2"/>
+<contactref element="IC4" pad="7"/>
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 </signal>
 <signal name="N$7">
-<contactref element="U$1" pad="59"/>
 <contactref element="Q1" pad="1"/>
-<contactref element="C15" pad="2"/>
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-<wire x1="31.5004" y1="12.1666" x2="31.6555" y2="12.3217" width="0.254" layer="1"/>
-</signal>
-<signal name="N$5">
-<contactref element="U$1" pad="26"/>
-<contactref element="R5" pad="2"/>
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-</signal>
-<signal name="N$8">
-<contactref element="U$1" pad="27"/>
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-<wire x1="50.927" y1="23.8252" x2="50.4288" y2="24.3234" width="0.254" layer="1"/>
-</signal>
-<signal name="N$9">
-<contactref element="U$1" pad="28"/>
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-<wire x1="48.514" y1="24.7734" x2="48.4288" y2="24.8586" width="0.254" layer="1"/>
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 </signal>
 <signal name="N$10">
 <contactref element="R5" pad="1"/>
 <contactref element="LED1" pad="A"/>
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-<wire x1="52.4034" y1="27.7554" x2="52.4034" y2="26.584" width="0.254" layer="1"/>
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 </signal>
 <signal name="N$11">
 <contactref element="R6" pad="1"/>
 <contactref element="LED2" pad="A"/>
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-<wire x1="50.4034" y1="27.7554" x2="50.4034" y2="26.584" width="0.254" layer="1"/>
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 </signal>
 <signal name="N$12">
 <contactref element="R7" pad="1"/>
 <contactref element="LED3" pad="A"/>
-<wire x1="48.4034" y1="27.7554" x2="48.4288" y2="27.7554" width="0.254" layer="1"/>
-<wire x1="48.4288" y1="27.7554" x2="48.4288" y2="26.5586" width="0.254" layer="1"/>
+<wire x1="28.7676" y1="27.7204" x2="30.749" y2="27.7204" width="0.3048" layer="1"/>
+<wire x1="30.749" y1="27.7204" x2="32.9184" y2="25.551" width="0.3048" layer="1"/>
 </signal>
 <signal name="N$14">
 <contactref element="LED4" pad="A"/>
 <contactref element="R8" pad="1"/>
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+<wire x1="63.1928" y1="25.2232" x2="62.738" y2="25.678" width="0.3048" layer="1"/>
 </signal>
 <signal name="LED_AT168">
 <contactref element="R8" pad="2"/>
 <contactref element="IC1" pad="13"/>
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-<wire x1="58.6406" y1="24.8586" x2="59.055" y2="25.3238" width="0.254" layer="1"/>
-<wire x1="57.427" y1="24.8586" x2="58.6406" y2="24.8586" width="0.254" layer="1"/>
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-<wire x1="67.1576" y1="16.5608" x2="67.1576" y2="16.4592" width="0.254" layer="1"/>
-<wire x1="66.0146" y1="16.5608" x2="67.1576" y2="16.5608" width="0.254" layer="16"/>
-<wire x1="63.119" y1="19.4564" x2="66.0146" y2="16.5608" width="0.254" layer="16"/>
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-<wire x1="67.9196" y1="13.7414" x2="68.072" y2="13.7414" width="0.254" layer="1"/>
-<wire x1="68.072" y1="13.7414" x2="68.3768" y2="13.4366" width="0.254" layer="1"/>
-<wire x1="68.3768" y1="13.4366" x2="69.0002" y2="13.4366" width="0.254" layer="1"/>
-<wire x1="69.0002" y1="13.4366" x2="69.1124" y2="13.3244" width="0.254" layer="1"/>
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-<via x="67.1576" y="16.5608" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="SS_XMEGA">
-<contactref element="U$1" pad="30"/>
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+<wire x1="66.294" y1="21.59" x2="63.7698" y2="21.59" width="0.3048" layer="1"/>
+<wire x1="63.7698" y1="21.59" x2="63.1928" y2="22.167" width="0.3048" layer="1"/>
+</signal>
+<signal name="SS_1284">
 <contactref element="IC2" pad="9"/>
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-<wire x1="48.2092" y1="18.6436" x2="48.768" y2="19.2024" width="0.254" layer="1"/>
-<wire x1="47.1976" y1="18.6436" x2="48.2092" y2="18.6436" width="0.254" layer="1"/>
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-<wire x1="47.6504" y1="22.2758" x2="47.1678" y2="21.7932" width="0.254" layer="16"/>
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-<via x="49.4538" y="21.7678" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="MISO_XMEGA">
-<contactref element="U$1" pad="32"/>
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+</signal>
+<signal name="MISO_1284">
 <contactref element="R10" pad="1"/>
 <contactref element="R9" pad="2"/>
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 </signal>
 <signal name="RTS_XBEE">
 <contactref element="XB1" pad="16"/>
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+<contactref element="IC4" pad="15"/>
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 </signal>
 <signal name="CTS_XBEE">
 <contactref element="XB1" pad="12"/>
-<contactref element="U$1" pad="2"/>
-<wire x1="22.59" y1="4.4" x2="23.905" y2="5.715" width="0.254" layer="1"/>
-<wire x1="23.905" y1="5.715" x2="30.48" y2="5.715" width="0.254" layer="1"/>
-<wire x1="30.48" y1="5.715" x2="30.7594" y2="5.4356" width="0.254" layer="1"/>
-<wire x1="30.7594" y1="5.4356" x2="34.0106" y2="5.4356" width="0.254" layer="1"/>
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-<wire x1="34.2971" y1="5.7221" x2="34.2971" y2="6.5305" width="0.254" layer="1"/>
+<contactref element="IC4" pad="16"/>
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+<wire x1="22.86" y1="4.67" x2="22.59" y2="4.4" width="0.3048" layer="1"/>
 </signal>
 <signal name="DTR_XBEE">
 <contactref element="XB1" pad="9"/>
-<contactref element="U$1" pad="49"/>
-<wire x1="22.59" y1="21.86" x2="22.59" y2="26.4" width="0.254" layer="1"/>
-<wire x1="24.384" y1="20.066" x2="22.59" y2="21.86" width="0.254" layer="1"/>
-<wire x1="24.384" y1="20.066" x2="31.5258" y2="20.066" width="0.254" layer="1"/>
-<wire x1="31.5258" y1="20.066" x2="31.6555" y2="20.1957" width="0.254" layer="1"/>
-</signal>
-<signal name="N$15">
-<contactref element="IC1" pad="8"/>
-<contactref element="Q2" pad="1"/>
-<contactref element="C17" pad="2"/>
-<wire x1="61.0616" y1="10.0584" x2="62.3706" y2="11.1896" width="0.254" layer="1"/>
-<wire x1="62.3706" y1="11.1896" x2="65.151" y2="11.1896" width="0.254" layer="1"/>
-<wire x1="70.4258" y1="18.017" x2="70.605" y2="18.017" width="0.254" layer="1"/>
-<wire x1="65.8876" y1="20.9804" x2="66.1924" y2="21.2852" width="0.254" layer="1"/>
-<wire x1="65.8876" y1="18.0594" x2="65.8876" y2="20.9804" width="0.254" layer="1"/>
-<wire x1="66.04" y1="17.7546" x2="65.8876" y2="18.0594" width="0.254" layer="1"/>
-<wire x1="66.04" y1="12.104" x2="66.04" y2="17.7546" width="0.254" layer="1"/>
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-<wire x1="70.4258" y1="18.906" x2="70.4258" y2="18.017" width="0.254" layer="1"/>
-<wire x1="70.2818" y1="19.05" x2="70.4258" y2="18.906" width="0.254" layer="1"/>
-<wire x1="70.2818" y1="21.0312" x2="70.2818" y2="19.05" width="0.254" layer="1"/>
-<wire x1="70.0278" y1="21.2852" x2="70.2818" y2="21.0312" width="0.254" layer="1"/>
-<wire x1="66.1924" y1="21.2852" x2="70.0278" y2="21.2852" width="0.254" layer="1"/>
-</signal>
-<signal name="N$16">
-<contactref element="IC1" pad="7"/>
-<contactref element="Q2" pad="2"/>
-<contactref element="C18" pad="2"/>
-<wire x1="64.1232" y1="16.979" x2="61.0616" y2="19.7104" width="0.254" layer="1"/>
-<wire x1="65.151" y1="16.9536" x2="64.1232" y2="16.979" width="0.254" layer="1"/>
-<wire x1="71.4248" y1="18.0368" x2="71.405" y2="18.017" width="0.254" layer="1"/>
-<wire x1="71.4248" y1="19.05" x2="71.4248" y2="18.0368" width="0.254" layer="1"/>
-<wire x1="71.3232" y1="19.1516" x2="71.4248" y2="19.05" width="0.254" layer="1"/>
-<wire x1="65.151" y1="16.9536" x2="65.151" y2="21.3614" width="0.254" layer="1"/>
-<wire x1="65.151" y1="21.3614" x2="65.5066" y2="21.7424" width="0.254" layer="1"/>
-<wire x1="70.9422" y1="19.1516" x2="71.3232" y2="19.1516" width="0.254" layer="1"/>
-<wire x1="70.739" y1="19.3548" x2="70.9422" y2="19.1516" width="0.254" layer="1"/>
-<wire x1="70.739" y1="21.3614" x2="70.739" y2="19.3548" width="0.254" layer="1"/>
-<wire x1="70.358" y1="21.7424" x2="70.739" y2="21.3614" width="0.254" layer="1"/>
-<wire x1="65.5066" y1="21.7424" x2="70.358" y2="21.7424" width="0.254" layer="1"/>
+<contactref element="IC4" pad="40"/>
+<wire x1="22.59" y1="26.4" x2="22.59" y2="25.908" width="0.3048" layer="1"/>
+<wire x1="22.59" y1="25.908" x2="22.59" y2="25.67" width="0.3048" layer="1"/>
+<wire x1="23.876" y1="21.459" x2="23.838" y2="21.421" width="0.3048" layer="1"/>
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 </signal>
 <signal name="S_IN1_PPM">
 <contactref element="IC1" pad="12"/>
 <contactref element="IC1" pad="23"/>
 <contactref element="JP9" pad="3"/>
-<wire x1="83.2866" y1="14.351" x2="83.2866" y2="14.8082" width="0.254" layer="16"/>
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-<wire x1="75.438" y1="9.3988" x2="75.405" y2="9.4318" width="0.254" layer="1"/>
-<wire x1="82.7024" y1="10.795" x2="82.7278" y2="13.7922" width="0.254" layer="16"/>
-<wire x1="81.026" y1="9.1186" x2="82.7024" y2="10.795" width="0.254" layer="16"/>
 <wire x1="69.1124" y1="14.1244" x2="69.089" y2="14.1478" width="0.254" layer="1"/>
-<wire x1="68.4784" y1="14.2494" x2="72.9234" y2="9.8044" width="0.254" layer="16"/>
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+<wire x1="82.296" y1="13.8176" x2="83.2866" y2="14.8082" width="0.3048" layer="1"/>
 </signal>
 <signal name="SS_MEGA">
 <contactref element="IC1" pad="14"/>
 <contactref element="IC2" pad="8"/>
-<wire x1="67.0814" y1="13.0048" x2="67.6888" y2="12.7022" width="0.254" layer="1"/>
-<wire x1="45.8978" y1="22.8346" x2="56.5912" y2="22.8346" width="0.254" layer="16"/>
-<wire x1="56.5912" y1="22.8346" x2="63.373" y2="16.0528" width="0.254" layer="16"/>
-<wire x1="63.373" y1="16.0528" x2="63.373" y2="14.2748" width="0.254" layer="16"/>
-<wire x1="63.373" y1="14.2748" x2="64.7954" y2="12.8524" width="0.254" layer="16"/>
-<wire x1="64.7954" y1="12.8524" x2="66.9544" y2="12.8524" width="0.254" layer="16"/>
-<wire x1="66.9544" y1="12.8524" x2="67.0814" y2="13.0048" width="0.254" layer="16"/>
-<wire x1="67.6888" y1="12.7022" x2="68.9346" y2="12.7022" width="0.254" layer="1"/>
-<wire x1="68.9346" y1="12.7022" x2="69.1124" y2="12.5244" width="0.254" layer="1"/>
-<via x="67.0814" y="13.0048" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="MOSI_MEGA">
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 </signal>
 <signal name="S_IN4">
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 </signal>
 <signal name="N$1">
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-</signal>
-<signal name="N$3">
-<contactref element="U$1" pad="48"/>
-</signal>
-<signal name="N$4">
-<contactref element="U$1" pad="47"/>
-</signal>
-<signal name="N$13">
-<contactref element="U$1" pad="46"/>
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 <signal name="+3V3">
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+<via x="53.5432" y="11.7094" extent="1-16" drill="0.6"/>
+<wire x1="53.5432" y1="11.7094" x2="52.0192" y2="11.7094" width="0.6096" layer="16"/>
+<wire x1="52.0192" y1="11.7094" x2="40.8178" y2="22.9108" width="0.6096" layer="16"/>
+<wire x1="25.654" y1="27.7622" x2="25.654" y2="27.7876" width="0.6096" layer="16"/>
+<wire x1="25.654" y1="27.7876" x2="25.1206" y2="28.321" width="0.6096" layer="16"/>
+<wire x1="25.1206" y1="28.321" x2="8.511" y2="28.321" width="0.6096" layer="16"/>
+<wire x1="8.511" y1="28.321" x2="6.59" y2="26.4" width="0.6096" layer="16"/>
+<wire x1="1.778" y1="2.794" x2="2.8702" y2="2.794" width="0.6096" layer="16"/>
+<wire x1="2.8702" y1="2.794" x2="3.8608" y2="3.7846" width="0.6096" layer="16"/>
+<wire x1="3.8608" y1="3.7846" x2="3.8608" y2="23.6708" width="0.6096" layer="16"/>
+<wire x1="3.8608" y1="23.6708" x2="6.59" y2="26.4" width="0.6096" layer="16"/>
+<wire x1="18.658" y1="1.1032" x2="14.3908" y2="1.1032" width="0.3048" layer="1"/>
+<wire x1="14.3908" y1="1.1032" x2="13.97" y2="1.524" width="0.3048" layer="1"/>
+<wire x1="40.8178" y1="22.9108" x2="40.8178" y2="25.2476" width="0.6096" layer="16"/>
+<wire x1="40.8178" y1="25.2476" x2="38.1508" y2="27.9146" width="0.6096" layer="16"/>
+<wire x1="38.1508" y1="27.9146" x2="25.8064" y2="27.9146" width="0.6096" layer="16"/>
+<wire x1="25.8064" y1="27.9146" x2="25.654" y2="27.7622" width="0.6096" layer="16"/>
+<wire x1="31.5722" y1="2.5798" x2="33.4408" y2="2.5798" width="0.3048" layer="1"/>
+<wire x1="33.4408" y1="2.5798" x2="34.5186" y2="3.6576" width="0.3048" layer="1"/>
+<wire x1="34.5186" y1="3.6576" x2="34.5186" y2="4.5466" width="0.3048" layer="1"/>
+<wire x1="34.5186" y1="4.5466" x2="34.9758" y2="5.0038" width="0.3048" layer="1"/>
+<wire x1="34.9758" y1="5.0038" x2="38.0238" y2="5.0038" width="0.3048" layer="1"/>
+<wire x1="38.0238" y1="5.0038" x2="38.0746" y2="5.0546" width="0.3048" layer="1"/>
+<wire x1="38.0746" y1="5.0546" x2="38.6956" y2="5.0546" width="0.3048" layer="1"/>
+<wire x1="38.6956" y1="5.0546" x2="39.0542" y2="4.696" width="0.3048" layer="1"/>
+<wire x1="35.1536" y1="11.7348" x2="35.1536" y2="11.7602" width="0" layer="19" extent="16-16"/>
 </signal>
-<signal name="GPIO2">
-<contactref element="U$1" pad="51"/>
+<signal name="GPIO1">
 <contactref element="JP2" pad="3"/>
-<wire x1="21.1809" y1="18.6209" x2="31.6555" y2="18.6209" width="0.254" layer="1"/>
-<wire x1="21.1836" y1="18.6182" x2="21.1809" y2="18.6209" width="0.254" layer="1"/>
-<wire x1="11.9126" y1="18.6436" x2="21.1836" y2="18.6182" width="0.254" layer="1"/>
-<wire x1="10.3632" y1="17.0942" x2="11.9126" y2="18.6436" width="0.254" layer="1"/>
-<wire x1="1.778" y1="15.494" x2="3.1242" y2="15.494" width="0.254" layer="16"/>
-<wire x1="3.1242" y1="15.494" x2="4.064" y2="16.4338" width="0.254" layer="16"/>
-<wire x1="4.064" y1="16.4338" x2="4.7244" y2="17.0942" width="0.254" layer="1"/>
-<wire x1="4.7244" y1="17.0942" x2="10.3632" y2="17.0942" width="0.254" layer="1"/>
-<via x="4.064" y="16.4338" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="42"/>
+<wire x1="22.238" y1="21.421" x2="22.238" y2="22.72" width="0.3048" layer="1"/>
+<wire x1="22.238" y1="22.72" x2="20.9042" y2="24.0538" width="0.3048" layer="1"/>
+<wire x1="5.08" y1="23.7236" x2="5.08" y2="17.272" width="0.3048" layer="1"/>
+<wire x1="5.08" y1="17.272" x2="3.302" y2="15.494" width="0.3048" layer="1"/>
+<wire x1="3.302" y1="15.494" x2="1.778" y2="15.494" width="0.3048" layer="1"/>
+<wire x1="20.9042" y1="24.0538" x2="5.4102" y2="24.0538" width="0.3048" layer="1"/>
+<wire x1="5.4102" y1="24.0538" x2="5.08" y2="23.7236" width="0.3048" layer="1"/>
 </signal>
-<signal name="GPIO4">
-<contactref element="U$1" pad="55"/>
+<signal name="GPIO3">
 <contactref element="JP2" pad="5"/>
-<wire x1="30.7821" y1="15.4713" x2="31.6555" y2="15.4713" width="0.254" layer="1"/>
-<wire x1="30.4546" y1="15.7988" x2="30.7821" y2="15.4713" width="0.254" layer="1"/>
-<wire x1="8.6106" y1="15.7988" x2="30.4546" y2="15.7988" width="0.254" layer="1"/>
-<wire x1="5.6896" y1="12.8778" x2="8.6106" y2="15.7988" width="0.254" layer="1"/>
-<wire x1="3.2766" y1="10.4648" x2="5.6896" y2="12.8778" width="0.254" layer="16"/>
-<wire x1="1.8288" y1="10.4648" x2="3.2766" y2="10.4648" width="0.254" layer="16"/>
-<wire x1="1.778" y1="10.414" x2="1.8288" y2="10.4648" width="0.254" layer="16"/>
-<via x="5.6896" y="12.8778" extent="1-16" drill="0.6"/>
-</signal>
-<signal name="PDI_DATA">
-<contactref element="X1" pad="3"/>
-<contactref element="U$1" pad="56"/>
-<wire x1="39.9034" y1="5.461" x2="40.0558" y2="5.2832" width="0.254" layer="1"/>
-<wire x1="40.0558" y1="5.2832" x2="40.0558" y2="4.7484" width="0.254" layer="1"/>
-<wire x1="40.0558" y1="4.7484" x2="40.0542" y2="4.696" width="0.254" layer="1"/>
-<wire x1="35.5092" y1="9.779" x2="30.3276" y2="14.9606" width="0.254" layer="16"/>
-<wire x1="30.3276" y1="14.9606" x2="29.6926" y2="14.9606" width="0.254" layer="16"/>
-<wire x1="29.6926" y1="14.9606" x2="29.6418" y2="14.859" width="0.254" layer="16"/>
-<wire x1="29.6418" y1="14.859" x2="30.4038" y2="14.859" width="0.254" layer="1"/>
-<wire x1="30.4038" y1="14.859" x2="30.5816" y2="14.7066" width="0.254" layer="1"/>
-<wire x1="30.5816" y1="14.7066" x2="31.6328" y2="14.7066" width="0.254" layer="1"/>
-<wire x1="31.6328" y1="14.7066" x2="31.6555" y2="14.6839" width="0.254" layer="1"/>
-<wire x1="35.5092" y1="5.5626" x2="35.5092" y2="9.779" width="0.254" layer="16"/>
-<wire x1="34.8234" y1="4.8768" x2="35.5092" y2="5.5626" width="0.254" layer="16"/>
-<wire x1="35.4076" y1="5.461" x2="39.9034" y2="5.461" width="0.254" layer="1"/>
-<wire x1="34.8234" y1="4.8768" x2="35.4076" y2="5.461" width="0.254" layer="1"/>
-<via x="34.8234" y="4.8768" extent="1-16" drill="0.6"/>
-<via x="29.6418" y="14.859" extent="1-16" drill="0.6"/>
+<contactref element="IC4" pad="13"/>
+<wire x1="21.438" y1="9.821" x2="21.438" y2="8.992" width="0.3048" layer="1"/>
+<wire x1="21.082" y1="7.112" x2="16.256" y2="7.112" width="0.3048" layer="1"/>
+<wire x1="16.256" y1="7.112" x2="15.494" y2="6.35" width="0.3048" layer="1"/>
+<wire x1="15.494" y1="6.35" x2="7.874" y2="6.35" width="0.3048" layer="1"/>
+<wire x1="7.874" y1="6.35" x2="3.81" y2="10.414" width="0.3048" layer="1"/>
+<wire x1="3.81" y1="10.414" x2="1.778" y2="10.414" width="0.3048" layer="1"/>
+<wire x1="21.082" y1="7.112" x2="21.209" y2="7.239" width="0.3048" layer="1"/>
+<wire x1="21.209" y1="7.239" x2="21.209" y2="8.763" width="0.3048" layer="1"/>
+<wire x1="21.209" y1="8.763" x2="21.438" y2="8.992" width="0.3048" layer="1"/>
 </signal>
 <signal name="GND">
 <contactref element="JP15" pad="1"/>
 <contactref element="JP9" pad="1"/>
 <contactref element="JP10" pad="1"/>
 <contactref element="JP11" pad="1"/>
-<contactref element="C14" pad="1"/>
+<contactref element="C4" pad="1"/>
 <contactref element="JP12" pad="1"/>
 <contactref element="JP13" pad="1"/>
 <contactref element="X1" pad="9"/>
@@ -2787,40 +2292,28 @@ design rules under a new name.</description>
 <contactref element="IC1" pad="5"/>
 <contactref element="JP1" pad="4"/>
 <contactref element="IC3" pad="1"/>
-<contactref element="C3" pad="1"/>
 <contactref element="C6" pad="1"/>
 <contactref element="IC1" pad="3"/>
 <contactref element="C1" pad="2"/>
-<contactref element="U$1" pad="14"/>
 <contactref element="C2" pad="2"/>
-<contactref element="C17" pad="1"/>
 <contactref element="JP3" pad="1"/>
 <contactref element="JP4" pad="1"/>
-<contactref element="C18" pad="1"/>
 <contactref element="JP5" pad="1"/>
-<contactref element="X1" pad="12"/>
 <contactref element="JP6" pad="1"/>
 <contactref element="JP7" pad="1"/>
 <contactref element="JP8" pad="1"/>
-<contactref element="C16" pad="1"/>
+<contactref element="C12" pad="1"/>
 <contactref element="C10" pad="1"/>
-<contactref element="C15" pad="1"/>
+<contactref element="C11" pad="1"/>
 <contactref element="X1" pad="16"/>
 <contactref element="LED4" pad="C"/>
-<contactref element="U$1" pad="34"/>
 <contactref element="LED1" pad="C"/>
 <contactref element="LED2" pad="C"/>
 <contactref element="LED3" pad="C"/>
-<contactref element="U$1" pad="44"/>
 <contactref element="IC2" pad="7"/>
 <contactref element="C8" pad="1"/>
 <contactref element="C7" pad="1"/>
-<contactref element="C12" pad="1"/>
-<contactref element="U$1" pad="60"/>
-<contactref element="U$1" pad="24"/>
-<contactref element="U$1" pad="52"/>
 <contactref element="C9" pad="1"/>
-<contactref element="C4" pad="1"/>
 <contactref element="R10" pad="2"/>
 <contactref element="R13" pad="1"/>
 <contactref element="XB1" pad="10"/>
@@ -2830,261 +2323,514 @@ design rules under a new name.</description>
 <contactref element="X2" pad="12"/>
 <contactref element="X2" pad="9"/>
 <contactref element="IC1" pad="21"/>
-<wire x1="56.134" y1="20.574" x2="55.118" y2="20.574" width="0.254" layer="16"/>
-<wire x1="67.0696" y1="6.2112" x2="67.0696" y2="8.7122" width="0.254" layer="1"/>
-<wire x1="66.7258" y1="5.8674" x2="67.0696" y2="6.2112" width="0.254" layer="1"/>
-<wire x1="56.9976" y1="19.7104" x2="56.134" y2="20.574" width="0.254" layer="16"/>
-<wire x1="55.3466" y1="12.954" x2="55.118" y2="12.954" width="0.254" layer="16"/>
 <wire x1="73.005" y1="19.7294" x2="73.005" y2="18.017" width="0.254" layer="1"/>
-<wire x1="29.2726" y1="2.286" x2="28.829" y2="2.1726" width="0.254" layer="1"/>
-<wire x1="73.3162" y1="20.1676" x2="73.005" y2="19.7294" width="0.254" layer="1"/>
-<wire x1="56.9976" y1="14.605" x2="55.3466" y2="12.954" width="0.254" layer="16"/>
-<wire x1="56.9976" y1="14.605" x2="56.9976" y2="19.7104" width="0.254" layer="16"/>
-<wire x1="66.6242" y1="5.969" x2="66.7258" y2="5.8674" width="0.254" layer="1"/>
-<wire x1="61.6936" y1="5.969" x2="66.6242" y2="5.969" width="0.254" layer="1"/>
-<wire x1="61.0586" y1="3.556" x2="61.0586" y2="2.1844" width="0.254" layer="1"/>
-<wire x1="56.9976" y1="14.3764" x2="56.9976" y2="14.605" width="0.254" layer="16"/>
-<wire x1="74.605" y1="19.8426" x2="74.605" y2="18.017" width="0.254" layer="1"/>
-<wire x1="74.4982" y1="20.1422" x2="73.3162" y2="20.1676" width="0.254" layer="1"/>
+<wire x1="73.3662" y1="20.1676" x2="73.005" y2="19.7294" width="0.254" layer="1"/>
+<wire x1="74.4982" y1="20.1422" x2="73.3662" y2="20.1676" width="0.254" layer="1"/>
 <wire x1="74.7014" y1="19.939" x2="74.4982" y2="20.1422" width="0.254" layer="1"/>
 <wire x1="74.7014" y1="19.939" x2="74.605" y2="19.8426" width="0.254" layer="1"/>
-<wire x1="57.3786" y1="13.9954" x2="56.9976" y2="14.3764" width="0.254" layer="16"/>
-<wire x1="60.1696" y1="4.445" x2="61.0586" y2="3.556" width="0.254" layer="1"/>
-<wire x1="60.1696" y1="4.445" x2="61.6936" y2="5.969" width="0.254" layer="1"/>
-<wire x1="59.1058" y1="5.5088" x2="60.1696" y2="4.445" width="0.254" layer="1"/>
-<wire x1="58.8772" y1="13.9954" x2="57.3786" y2="13.9954" width="0.254" layer="1"/>
-<wire x1="73.4314" y1="21.209" x2="74.7014" y2="19.939" width="0.254" layer="16"/>
-<wire x1="72.9742" y1="21.209" x2="73.4314" y2="21.209" width="0.254" layer="16"/>
-<wire x1="59.1058" y1="14.224" x2="58.8772" y2="13.9954" width="0.254" layer="1"/>
-<wire x1="59.1058" y1="14.224" x2="59.1058" y2="5.5088" width="0.254" layer="1"/>
-<wire x1="65.151" y1="15.2536" x2="65.151" y2="12.8896" width="0.254" layer="1"/>
-<wire x1="59.9322" y1="15.279" x2="65.151" y2="15.2536" width="0.254" layer="1"/>
-<wire x1="59.1058" y1="14.4526" x2="59.1058" y2="14.224" width="0.254" layer="1"/>
-<wire x1="72.0598" y1="22.1488" x2="72.9742" y2="21.209" width="0.254" layer="16"/>
-<wire x1="24.3078" y1="1.9812" x2="24.3078" y2="1.8034" width="0.254" layer="16"/>
-<wire x1="72.0598" y1="23.9776" x2="72.0598" y2="22.1488" width="0.254" layer="16"/>
-<wire x1="59.5884" y1="14.9352" x2="59.1058" y2="14.4526" width="0.254" layer="1"/>
-<wire x1="59.5884" y1="14.9352" x2="59.9322" y2="15.279" width="0.254" layer="1"/>
-<wire x1="59.5376" y1="14.986" x2="59.5884" y2="14.9352" width="0.254" layer="1"/>
-<wire x1="71.6026" y1="24.384" x2="72.0598" y2="23.9776" width="0.254" layer="16"/>
-<wire x1="64.6684" y1="24.384" x2="71.6026" y2="24.384" width="0.254" layer="16"/>
-<wire x1="59.5376" y1="22.5044" x2="59.5376" y2="14.986" width="0.254" layer="1"/>
-<wire x1="60.2742" y1="23.241" x2="59.5376" y2="22.5044" width="0.254" layer="1"/>
-<wire x1="64.1604" y1="26.6446" x2="65.7098" y2="28.194" width="0.254" layer="16"/>
-<wire x1="64.1604" y1="24.9174" x2="64.6684" y2="24.384" width="0.254" layer="16"/>
-<wire x1="26.4786" y1="11.5062" x2="26.4786" y2="13.5128" width="0.254" layer="1"/>
-<wire x1="26.7462" y1="7.3406" x2="26.1112" y2="6.6548" width="0.254" layer="16"/>
-<wire x1="64.1604" y1="25.6286" x2="64.1604" y2="24.9174" width="0.254" layer="16"/>
-<wire x1="64.1604" y1="25.6286" x2="64.1604" y2="26.6446" width="0.254" layer="16"/>
-<wire x1="60.2742" y1="27.2796" x2="60.2742" y2="23.241" width="0.254" layer="1"/>
-<wire x1="59.9186" y1="27.6352" x2="60.2742" y2="27.2796" width="0.254" layer="1"/>
-<wire x1="61.4426" y1="28.3464" x2="64.1604" y2="25.6286" width="0.254" layer="16"/>
-<wire x1="27.6606" y1="7.3406" x2="26.7462" y2="7.3406" width="0.254" layer="16"/>
-<wire x1="26.504" y1="11.4808" x2="26.4786" y2="11.5062" width="0.254" layer="1"/>
-<wire x1="27.2796" y1="11.4808" x2="26.504" y2="11.4808" width="0.254" layer="1"/>
-<wire x1="27.9654" y1="7.6454" x2="27.6606" y2="7.3406" width="0.254" layer="16"/>
-<wire x1="59.9186" y1="28.3464" x2="61.4426" y2="28.3464" width="0.254" layer="16"/>
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@@ -302,309 +302,6 @@ Source: http://www.maxstream.net/products/xbee/datasheet_XBee_OEM_RF-Modules.pdf
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-<wire x1="5.6952" y1="-3.342" x2="5.9877" y2="-3.1889" width="0.1016" layer="21"/>
 <pad name="1" x="-11" y="9" drill="0.8" diameter="1.27"/>
 <pad name="2" x="-11" y="7" drill="0.8" diameter="1.27"/>
 <pad name="3" x="-11" y="5" drill="0.8" diameter="1.27"/>
@@ -731,287 +428,6 @@ Source: MaxStream, Inc. xbee_productmanual.pdf</description>
 </library>
 <library name="avr-7">
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-<text x="-5.715" y="8.9027" size="1.27" layer="25">&gt;NAME</text>
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-<smd name="20" x="-2.25" y="-4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
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-<smd name="22" x="-1.25" y="-4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
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-<smd name="29" x="2.25" y="-4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
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-<smd name="31" x="3.25" y="-4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="32" x="3.75" y="-4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="33" x="4.325" y="-3.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
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-<smd name="35" x="4.325" y="-2.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="36" x="4.325" y="-2.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="37" x="4.325" y="-1.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="38" x="4.325" y="-1.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="39" x="4.325" y="-0.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="40" x="4.325" y="-0.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="41" x="4.325" y="0.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
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-<smd name="43" x="4.325" y="1.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="44" x="4.325" y="1.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="45" x="4.325" y="2.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="46" x="4.325" y="2.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="47" x="4.325" y="3.25" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="48" x="4.325" y="3.75" dx="0.7" dy="0.3" layer="1" roundness="50"/>
-<smd name="49" x="3.75" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="50" x="3.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="51" x="2.75" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="52" x="2.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
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-<smd name="57" x="-0.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
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-<smd name="59" x="-1.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="60" x="-1.75" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="61" x="-2.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="62" x="-2.75" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="63" x="-3.25" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<smd name="64" x="-3.75" y="4.325" dx="0.3" dy="0.7" layer="1" roundness="50"/>
-<text x="-3.302" y="0.558" size="1.27" layer="25">&gt;NAME</text>
-<text x="-3.302" y="-1.855" size="1.27" layer="27">&gt;VALUE</text>
-<rectangle x1="-4.5" y1="3.625" x2="-4" y2="3.875" layer="51"/>
-<rectangle x1="-4.5" y1="3.125" x2="-4" y2="3.375" layer="51"/>
-<rectangle x1="-4.5" y1="2.625" x2="-4" y2="2.875" layer="51"/>
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-<rectangle x1="-2.375" y1="4" x2="-2.125" y2="4.5" layer="51"/>
-<rectangle x1="-2.875" y1="4" x2="-2.625" y2="4.5" layer="51"/>
-<rectangle x1="-3.375" y1="4" x2="-3.125" y2="4.5" layer="51"/>
-<rectangle x1="-3.875" y1="4" x2="-3.625" y2="4.5" layer="51"/>
-</package>
 <package name="MLF32">
 <description>&lt;b&gt;32M1-A&lt;/b&gt; Micro Lead Frame package (MLF)</description>
 <wire x1="-2.35" y1="2.05" x2="-2.05" y2="2.35" width="0.254" layer="21"/>
@@ -1168,78 +584,6 @@ Source: MaxStream, Inc. xbee_productmanual.pdf</description>
 </package>
 </packages>
 <symbols>
-<symbol name="XMEGA-A3">
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-<wire x1="30.48" y1="53.34" x2="30.48" y2="-50.8" width="0.254" layer="94"/>
-<wire x1="30.48" y1="-50.8" x2="-27.94" y2="-50.8" width="0.254" layer="94"/>
-<wire x1="-27.94" y1="-50.8" x2="-27.94" y2="53.34" width="0.254" layer="94"/>
-<text x="-27.94" y="54.61" size="1.9304" layer="95" ratio="5">&gt;NAME</text>
-<text x="-9.906" y="51.054" size="1.9304" layer="96" ratio="5">&gt;VALUE</text>
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-<pin name="PA4(ADC4)" x="-33.02" y="38.1" length="middle"/>
-<pin name="PA5(ADC5)" x="-33.02" y="35.56" length="middle"/>
-<pin name="PB1(ADC1)" x="-33.02" y="20.32" length="middle"/>
-<pin name="GND@1" x="10.16" y="-55.88" length="middle" direction="pwr" rot="R90"/>
-<pin name="VCC@1" x="35.56" y="-33.02" length="middle" direction="pwr" rot="R180"/>
-<pin name="PC1(OC0B/XCK0/SCL)" x="-33.02" y="-5.08" length="middle"/>
-<pin name="AVCC" x="35.56" y="-27.94" length="middle" direction="pwr" rot="R180"/>
-<pin name="PA1(ADC1)" x="-33.02" y="45.72" length="middle"/>
-<pin name="PA2(ADC2)" x="-33.02" y="43.18" length="middle"/>
-<pin name="PB2(ADC2/DAC0)" x="-33.02" y="17.78" length="middle"/>
-<pin name="GND@2" x="7.62" y="-55.88" length="middle" direction="pwr" rot="R90"/>
-<pin name="PC0(OC0A/SDA)" x="-33.02" y="-2.54" length="middle"/>
-<pin name="PC2(OC0C/RXD0)" x="-33.02" y="-7.62" length="middle"/>
-<pin name="GND@3" x="5.08" y="-55.88" length="middle" direction="pwr" rot="R90"/>
-<pin name="PA0(ADC0/AREFA)" x="-33.02" y="48.26" length="middle"/>
-<pin name="PA6(ADC6)" x="-33.02" y="33.02" length="middle"/>
-<pin name="PB3(ADC3/DAC1)" x="-33.02" y="15.24" length="middle"/>
-<pin name="PC3(OC0D/TXD0)" x="-33.02" y="-10.16" length="middle"/>
-<pin name="PC4(OC1A/!SS!)" x="-33.02" y="-12.7" length="middle"/>
-<pin name="PC5(OC1B/MOSI/XCK1)" x="-33.02" y="-15.24" length="middle"/>
-<pin name="PR1(XTAL1)" x="-33.02" y="-43.18" length="middle"/>
-<pin name="GND@4" x="2.54" y="-55.88" length="middle" direction="pwr" rot="R90"/>
-<pin name="PA7/(ADC7/AC0-OUT)" x="-33.02" y="30.48" length="middle"/>
-<pin name="PB0(ADC0/AREFB)" x="-33.02" y="22.86" length="middle"/>
-<pin name="PC6(MISO/RXD1)" x="-33.02" y="-17.78" length="middle"/>
-<pin name="PC7(SCK/TXD1/CLKO/EVO)" x="-33.02" y="-20.32" length="middle"/>
-<pin name="PR0(XTAL2)" x="-33.02" y="-38.1" length="middle"/>
-<pin name="PDI-CLK/!RESET" x="-33.02" y="-33.02" length="middle" direction="in"/>
-<pin name="PD4(OC1A/!SS!)" x="35.56" y="35.56" length="middle" rot="R180"/>
-<pin name="PD0(OC0A)" x="35.56" y="45.72" length="middle" rot="R180"/>
-<pin name="PDI-DATA" x="-33.02" y="-27.94" length="middle"/>
-<pin name="PE2(OC0C/RXD0)" x="35.56" y="15.24" length="middle" rot="R180"/>
-<pin name="PE1(OC0B/XCK0/SCL)" x="35.56" y="17.78" length="middle" rot="R180"/>
-<pin name="PD7(TXD1/SCK/CLKO/EVO)" x="35.56" y="27.94" length="middle" rot="R180"/>
-<pin name="PD5(OC1B/XCK1/MOSI)" x="35.56" y="33.02" length="middle" rot="R180"/>
-<pin name="PD1(OC0B/XCK0)" x="35.56" y="43.18" length="middle" rot="R180"/>
-<pin name="VCC@2" x="35.56" y="-35.56" length="middle" direction="pwr" rot="R180"/>
-<pin name="PE3(OC0D/TXD0)" x="35.56" y="12.7" length="middle" rot="R180"/>
-<pin name="VCC@3" x="35.56" y="-38.1" length="middle" direction="pwr" rot="R180"/>
-<pin name="PE0(OC0A/SDA)" x="35.56" y="20.32" length="middle" rot="R180"/>
-<pin name="PD6(RXD1/MISO)" x="35.56" y="30.48" length="middle" rot="R180"/>
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-<pin name="PD2(OC0C/RXD0)" x="35.56" y="40.64" length="middle" rot="R180"/>
-<pin name="PB4(ADC4/TMS)" x="-33.02" y="12.7" length="middle"/>
-<pin name="PB5(ADC5/TDI)" x="-33.02" y="10.16" length="middle"/>
-<pin name="PB6(ADC6/TCK)" x="-33.02" y="7.62" length="middle"/>
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-<pin name="PE4(OC1A/!SS!)" x="35.56" y="10.16" length="middle" rot="R180"/>
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-</symbol>
 <symbol name="ATMEGA48/88/168-TQFP/QFN32">
 <wire x1="-25.4" y1="30.48" x2="25.4" y2="30.48" width="0.254" layer="94"/>
 <wire x1="25.4" y1="30.48" x2="25.4" y2="-33.02" width="0.254" layer="94"/>
@@ -1282,156 +626,6 @@ Source: MaxStream, Inc. xbee_productmanual.pdf</description>
 </symbol>
 </symbols>
 <devicesets>
-<deviceset name="XMEGA-A3">
-<description>Atmel XMega A3 series processor</description>
-<gates>
-<gate name="G$1" symbol="XMEGA-A3" x="2.54" y="-2.54"/>
-</gates>
-<devices>
-<device name="TQFP" package="TQFP64">
-<connects>
-<connect gate="G$1" pin="AVCC" pad="61"/>
-<connect gate="G$1" pin="GND@1" pad="60"/>
-<connect gate="G$1" pin="GND@2" pad="14"/>
-<connect gate="G$1" pin="GND@3" pad="24"/>
-<connect gate="G$1" pin="GND@4" pad="34"/>
-<connect gate="G$1" pin="GND@5" pad="44"/>
-<connect gate="G$1" pin="GND@6" pad="52"/>
-<connect gate="G$1" pin="PA0(ADC0/AREFA)" pad="62"/>
-<connect gate="G$1" pin="PA1(ADC1)" pad="63"/>
-<connect gate="G$1" pin="PA2(ADC2)" pad="64"/>
-<connect gate="G$1" pin="PA3(ADC3)" pad="1"/>
-<connect gate="G$1" pin="PA4(ADC4)" pad="2"/>
-<connect gate="G$1" pin="PA5(ADC5)" pad="3"/>
-<connect gate="G$1" pin="PA6(ADC6)" pad="4"/>
-<connect gate="G$1" pin="PA7/(ADC7/AC0-OUT)" pad="5"/>
-<connect gate="G$1" pin="PB0(ADC0/AREFB)" pad="6"/>
-<connect gate="G$1" pin="PB1(ADC1)" pad="7"/>
-<connect gate="G$1" pin="PB2(ADC2/DAC0)" pad="8"/>
-<connect gate="G$1" pin="PB3(ADC3/DAC1)" pad="9"/>
-<connect gate="G$1" pin="PB4(ADC4/TMS)" pad="10"/>
-<connect gate="G$1" pin="PB5(ADC5/TDI)" pad="11"/>
-<connect gate="G$1" pin="PB6(ADC6/TCK)" pad="12"/>
-<connect gate="G$1" pin="PB7(ADC7/AC0-OUT/TDO)" pad="13"/>
-<connect gate="G$1" pin="PC0(OC0A/SDA)" pad="16"/>
-<connect gate="G$1" pin="PC1(OC0B/XCK0/SCL)" pad="17"/>
-<connect gate="G$1" pin="PC2(OC0C/RXD0)" pad="18"/>
-<connect gate="G$1" pin="PC3(OC0D/TXD0)" pad="19"/>
-<connect gate="G$1" pin="PC4(OC1A/!SS!)" pad="20"/>
-<connect gate="G$1" pin="PC5(OC1B/MOSI/XCK1)" pad="21"/>
-<connect gate="G$1" pin="PC6(MISO/RXD1)" pad="22"/>
-<connect gate="G$1" pin="PC7(SCK/TXD1/CLKO/EVO)" pad="23"/>
-<connect gate="G$1" pin="PD0(OC0A)" pad="26"/>
-<connect gate="G$1" pin="PD1(OC0B/XCK0)" pad="27"/>
-<connect gate="G$1" pin="PD2(OC0C/RXD0)" pad="28"/>
-<connect gate="G$1" pin="PD3(OC0D/TXD0)" pad="29"/>
-<connect gate="G$1" pin="PD4(OC1A/!SS!)" pad="30"/>
-<connect gate="G$1" pin="PD5(OC1B/XCK1/MOSI)" pad="31"/>
-<connect gate="G$1" pin="PD6(RXD1/MISO)" pad="32"/>
-<connect gate="G$1" pin="PD7(TXD1/SCK/CLKO/EVO)" pad="33"/>
-<connect gate="G$1" pin="PDI-CLK/!RESET" pad="57"/>
-<connect gate="G$1" pin="PDI-DATA" pad="56"/>
-<connect gate="G$1" pin="PE0(OC0A/SDA)" pad="36"/>
-<connect gate="G$1" pin="PE1(OC0B/XCK0/SCL)" pad="37"/>
-<connect gate="G$1" pin="PE2(OC0C/RXD0)" pad="38"/>
-<connect gate="G$1" pin="PE3(OC0D/TXD0)" pad="39"/>
-<connect gate="G$1" pin="PE4(OC1A/!SS!)" pad="40"/>
-<connect gate="G$1" pin="PE5(OC1B/SCK1/MOSI)" pad="41"/>
-<connect gate="G$1" pin="PE6(RSC1/MISO/TOSC2)" pad="42"/>
-<connect gate="G$1" pin="PE7(TSD1/SCK/CLKO/EVO/TOSC1)" pad="43"/>
-<connect gate="G$1" pin="PF0(OC0A)" pad="46"/>
-<connect gate="G$1" pin="PF1(OC0B/XCK0)" pad="47"/>
-<connect gate="G$1" pin="PF2(OC0C/RXD0)" pad="48"/>
-<connect gate="G$1" pin="PF3(OC0D/TXD0)" pad="49"/>
-<connect gate="G$1" pin="PF4" pad="50"/>
-<connect gate="G$1" pin="PF5" pad="51"/>
-<connect gate="G$1" pin="PF6" pad="54"/>
-<connect gate="G$1" pin="PF7" pad="55"/>
-<connect gate="G$1" pin="PR0(XTAL2)" pad="58"/>
-<connect gate="G$1" pin="PR1(XTAL1)" pad="59"/>
-<connect gate="G$1" pin="VCC@1" pad="53"/>
-<connect gate="G$1" pin="VCC@2" pad="45"/>
-<connect gate="G$1" pin="VCC@3" pad="35"/>
-<connect gate="G$1" pin="VCC@4" pad="25"/>
-<connect gate="G$1" pin="VCC@5" pad="15"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="MLF" package="MLF64">
-<connects>
-<connect gate="G$1" pin="AVCC" pad="61"/>
-<connect gate="G$1" pin="GND@1" pad="60"/>
-<connect gate="G$1" pin="GND@2" pad="14"/>
-<connect gate="G$1" pin="GND@3" pad="24"/>
-<connect gate="G$1" pin="GND@4" pad="34"/>
-<connect gate="G$1" pin="GND@5" pad="44"/>
-<connect gate="G$1" pin="GND@6" pad="52"/>
-<connect gate="G$1" pin="PA0(ADC0/AREFA)" pad="62"/>
-<connect gate="G$1" pin="PA1(ADC1)" pad="63"/>
-<connect gate="G$1" pin="PA2(ADC2)" pad="64"/>
-<connect gate="G$1" pin="PA3(ADC3)" pad="1"/>
-<connect gate="G$1" pin="PA4(ADC4)" pad="2"/>
-<connect gate="G$1" pin="PA5(ADC5)" pad="3"/>
-<connect gate="G$1" pin="PA6(ADC6)" pad="4"/>
-<connect gate="G$1" pin="PA7/(ADC7/AC0-OUT)" pad="5"/>
-<connect gate="G$1" pin="PB0(ADC0/AREFB)" pad="6"/>
-<connect gate="G$1" pin="PB1(ADC1)" pad="7"/>
-<connect gate="G$1" pin="PB2(ADC2/DAC0)" pad="8"/>
-<connect gate="G$1" pin="PB3(ADC3/DAC1)" pad="9"/>
-<connect gate="G$1" pin="PB4(ADC4/TMS)" pad="10"/>
-<connect gate="G$1" pin="PB5(ADC5/TDI)" pad="11"/>
-<connect gate="G$1" pin="PB6(ADC6/TCK)" pad="12"/>
-<connect gate="G$1" pin="PB7(ADC7/AC0-OUT/TDO)" pad="13"/>
-<connect gate="G$1" pin="PC0(OC0A/SDA)" pad="16"/>
-<connect gate="G$1" pin="PC1(OC0B/XCK0/SCL)" pad="17"/>
-<connect gate="G$1" pin="PC2(OC0C/RXD0)" pad="18"/>
-<connect gate="G$1" pin="PC3(OC0D/TXD0)" pad="19"/>
-<connect gate="G$1" pin="PC4(OC1A/!SS!)" pad="20"/>
-<connect gate="G$1" pin="PC5(OC1B/MOSI/XCK1)" pad="21"/>
-<connect gate="G$1" pin="PC6(MISO/RXD1)" pad="22"/>
-<connect gate="G$1" pin="PC7(SCK/TXD1/CLKO/EVO)" pad="23"/>
-<connect gate="G$1" pin="PD0(OC0A)" pad="26"/>
-<connect gate="G$1" pin="PD1(OC0B/XCK0)" pad="27"/>
-<connect gate="G$1" pin="PD2(OC0C/RXD0)" pad="28"/>
-<connect gate="G$1" pin="PD3(OC0D/TXD0)" pad="29"/>
-<connect gate="G$1" pin="PD4(OC1A/!SS!)" pad="30"/>
-<connect gate="G$1" pin="PD5(OC1B/XCK1/MOSI)" pad="31"/>
-<connect gate="G$1" pin="PD6(RXD1/MISO)" pad="32"/>
-<connect gate="G$1" pin="PD7(TXD1/SCK/CLKO/EVO)" pad="33"/>
-<connect gate="G$1" pin="PDI-CLK/!RESET" pad="57"/>
-<connect gate="G$1" pin="PDI-DATA" pad="56"/>
-<connect gate="G$1" pin="PE0(OC0A/SDA)" pad="36"/>
-<connect gate="G$1" pin="PE1(OC0B/XCK0/SCL)" pad="37"/>
-<connect gate="G$1" pin="PE2(OC0C/RXD0)" pad="38"/>
-<connect gate="G$1" pin="PE3(OC0D/TXD0)" pad="39"/>
-<connect gate="G$1" pin="PE4(OC1A/!SS!)" pad="40"/>
-<connect gate="G$1" pin="PE5(OC1B/SCK1/MOSI)" pad="41"/>
-<connect gate="G$1" pin="PE6(RSC1/MISO/TOSC2)" pad="42"/>
-<connect gate="G$1" pin="PE7(TSD1/SCK/CLKO/EVO/TOSC1)" pad="43"/>
-<connect gate="G$1" pin="PF0(OC0A)" pad="46"/>
-<connect gate="G$1" pin="PF1(OC0B/XCK0)" pad="47"/>
-<connect gate="G$1" pin="PF2(OC0C/RXD0)" pad="48"/>
-<connect gate="G$1" pin="PF3(OC0D/TXD0)" pad="49"/>
-<connect gate="G$1" pin="PF4" pad="50"/>
-<connect gate="G$1" pin="PF5" pad="51"/>
-<connect gate="G$1" pin="PF6" pad="54"/>
-<connect gate="G$1" pin="PF7" pad="55"/>
-<connect gate="G$1" pin="PR0(XTAL2)" pad="58"/>
-<connect gate="G$1" pin="PR1(XTAL1)" pad="59"/>
-<connect gate="G$1" pin="VCC@1" pad="53"/>
-<connect gate="G$1" pin="VCC@2" pad="45"/>
-<connect gate="G$1" pin="VCC@3" pad="35"/>
-<connect gate="G$1" pin="VCC@4" pad="25"/>
-<connect gate="G$1" pin="VCC@5" pad="15"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-</devices>
-</deviceset>
 <deviceset name="MEGA48/88/168" prefix="IC">
 <gates>
 <gate name="1" symbol="ATMEGA48/88/168-TQFP/QFN32" x="0" y="0"/>
@@ -3609,6 +2803,322 @@ Commonly used for small ceramic capacitors. Like our 0.1uF (http://www.sparkfun.
 <vertex x="1.7119" y="-0.0101" curve="-90.012967"/>
 </polygon>
 </package>
+<package name="SMA-DIODE">
+<description>&lt;B&gt;Diode&lt;/B&gt;&lt;p&gt;
+Basic SMA packaged diode. Good for reverse polarization protection. Common part #: MBRA140</description>
+<wire x1="-2.3" y1="1" x2="-2.3" y2="1.45" width="0.2032" layer="21"/>
+<wire x1="-2.3" y1="1.45" x2="2.3" y2="1.45" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="1.45" x2="2.3" y2="1" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="-1" x2="2.3" y2="-1.45" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="-1.45" x2="-2.3" y2="-1.45" width="0.2032" layer="21"/>
+<wire x1="-2.3" y1="-1.45" x2="-2.3" y2="-1" width="0.2032" layer="21"/>
+<wire x1="1" y1="1" x2="1" y2="-1" width="0.2032" layer="21"/>
+<smd name="A" x="-2.15" y="0" dx="1.27" dy="1.47" layer="1" rot="R180"/>
+<smd name="C" x="2.15" y="0" dx="1.27" dy="1.47" layer="1"/>
+<text x="-2.286" y="1.651" size="0.4064" layer="25">&gt;NAME</text>
+<text x="0.254" y="1.651" size="0.4064" layer="27">&gt;VALUE</text>
+</package>
+<package name="DIODE-1N4001">
+<wire x1="3.175" y1="1.27" x2="1.905" y2="1.27" width="0.254" layer="21"/>
+<wire x1="1.905" y1="1.27" x2="-3.175" y2="1.27" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="1.27" x2="-3.175" y2="0" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="0" x2="-3.175" y2="-1.27" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="-1.27" x2="1.905" y2="-1.27" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-1.27" x2="3.175" y2="-1.27" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-1.27" x2="3.175" y2="0" width="0.254" layer="21"/>
+<wire x1="3.175" y1="0" x2="3.175" y2="1.27" width="0.254" layer="21"/>
+<wire x1="1.905" y1="1.27" x2="1.905" y2="-1.27" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="0" x2="-3.81" y2="0" width="0.254" layer="21"/>
+<wire x1="3.175" y1="0" x2="3.81" y2="0" width="0.254" layer="21"/>
+<pad name="A" x="-5.08" y="0" drill="1" diameter="1.9812"/>
+<pad name="C" x="5.08" y="0" drill="1" diameter="1.9812"/>
+<text x="-2.921" y="1.651" size="0.6096" layer="25">&gt;Name</text>
+<text x="-2.921" y="-0.508" size="1.016" layer="21" ratio="12">&gt;Value</text>
+</package>
+<package name="SOD-323">
+<wire x1="-0.9" y1="0.65" x2="-0.5" y2="0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="0.65" x2="0.9" y2="0.65" width="0.2032" layer="21"/>
+<wire x1="-0.9" y1="-0.65" x2="-0.5" y2="-0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="-0.65" x2="0.9" y2="-0.65" width="0.2032" layer="21"/>
+<wire x1="-0.5" y1="0.65" x2="-0.5" y2="-0.65" width="0.2032" layer="21"/>
+<smd name="1" x="-1.15" y="0" dx="0.63" dy="0.83" layer="1"/>
+<smd name="2" x="1.15" y="0" dx="0.63" dy="0.83" layer="1"/>
+<text x="-0.889" y="1.016" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-1.397" size="0.4064" layer="27">&gt;VALUE</text>
+</package>
+<package name="SOT23-3">
+<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.6604" width="0.1524" layer="51"/>
+<wire x1="1.4224" y1="-0.6604" x2="-1.4224" y2="-0.6604" width="0.1524" layer="51"/>
+<wire x1="-1.4224" y1="-0.6604" x2="-1.4224" y2="0.6604" width="0.1524" layer="51"/>
+<wire x1="-1.4224" y1="0.6604" x2="1.4224" y2="0.6604" width="0.1524" layer="51"/>
+<wire x1="-0.8" y1="0.7" x2="-1.4" y2="0.7" width="0.2032" layer="21"/>
+<wire x1="-1.4" y1="0.7" x2="-1.4" y2="-0.1" width="0.2032" layer="21"/>
+<wire x1="0.8" y1="0.7" x2="1.4" y2="0.7" width="0.2032" layer="21"/>
+<wire x1="1.4" y1="0.7" x2="1.4" y2="-0.1" width="0.2032" layer="21"/>
+<smd name="3" x="0" y="1.1" dx="0.8" dy="0.9" layer="1"/>
+<smd name="2" x="0.95" y="-1" dx="0.8" dy="0.9" layer="1"/>
+<smd name="1" x="-0.95" y="-1" dx="0.8" dy="0.9" layer="1"/>
+<text x="-0.8255" y="1.778" size="0.4064" layer="25">&gt;NAME</text>
+<text x="-1.016" y="-0.1905" size="0.4064" layer="27">&gt;VALUE</text>
+</package>
+<package name="DIODE-1N4148">
+<wire x1="-2.54" y1="0.762" x2="2.54" y2="0.762" width="0.2032" layer="21"/>
+<wire x1="2.54" y1="0.762" x2="2.54" y2="0" width="0.2032" layer="21"/>
+<wire x1="2.54" y1="0" x2="2.54" y2="-0.762" width="0.2032" layer="21"/>
+<wire x1="2.54" y1="-0.762" x2="-2.54" y2="-0.762" width="0.2032" layer="21"/>
+<wire x1="-2.54" y1="-0.762" x2="-2.54" y2="0" width="0.2032" layer="21"/>
+<wire x1="-2.54" y1="0" x2="-2.54" y2="0.762" width="0.2032" layer="21"/>
+<wire x1="2.54" y1="0" x2="2.794" y2="0" width="0.2032" layer="21"/>
+<wire x1="-2.54" y1="0" x2="-2.794" y2="0" width="0.2032" layer="21"/>
+<wire x1="1.905" y1="0.635" x2="1.905" y2="-0.635" width="0.2032" layer="21"/>
+<pad name="A" x="-3.81" y="0" drill="0.9" diameter="1.8796"/>
+<pad name="C" x="3.81" y="0" drill="0.9" diameter="1.8796"/>
+<text x="-2.54" y="1.27" size="0.4064" layer="25">&gt;Name</text>
+<text x="-2.032" y="-0.508" size="0.8128" layer="21">&gt;Value</text>
+</package>
+<package name="SMB-DIODE">
+<description>&lt;b&gt;Diode&lt;/b&gt;&lt;p&gt;
+Basic small signal diode good up to 200mA. SMB footprint. Common part #: BAS16</description>
+<wire x1="-3.973" y1="1.983" x2="3.973" y2="1.983" width="0.0508" layer="39"/>
+<wire x1="3.973" y1="-1.983" x2="-3.973" y2="-1.983" width="0.0508" layer="39"/>
+<wire x1="-3.973" y1="-1.983" x2="-3.973" y2="1.983" width="0.0508" layer="39"/>
+<wire x1="3.973" y1="1.983" x2="3.973" y2="-1.983" width="0.0508" layer="39"/>
+<wire x1="-2.2606" y1="1.905" x2="2.2606" y2="1.905" width="0.1016" layer="21"/>
+<wire x1="-2.2606" y1="-1.905" x2="2.2606" y2="-1.905" width="0.1016" layer="21"/>
+<wire x1="-2.261" y1="-1.905" x2="-2.261" y2="1.905" width="0.1016" layer="51"/>
+<wire x1="2.261" y1="-1.905" x2="2.261" y2="1.905" width="0.1016" layer="51"/>
+<wire x1="0.643" y1="1" x2="-0.73" y2="0" width="0.2032" layer="21"/>
+<wire x1="-0.73" y1="0" x2="0.643" y2="-1" width="0.2032" layer="21"/>
+<wire x1="0.643" y1="-1" x2="0.643" y2="1" width="0.2032" layer="21"/>
+<wire x1="-0.73" y1="1" x2="-0.73" y2="-1" width="0.2032" layer="21"/>
+<smd name="C" x="-2.2" y="0" dx="2.4" dy="2.4" layer="1"/>
+<smd name="A" x="2.2" y="0" dx="2.4" dy="2.4" layer="1"/>
+<text x="-2.159" y="2.159" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.905" y="-3.429" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-2.794" y1="-1.0922" x2="-2.2606" y2="1.0922" layer="51"/>
+<rectangle x1="2.2606" y1="-1.0922" x2="2.794" y2="1.0922" layer="51"/>
+</package>
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+<package name="SMA-DIODE-KIT">
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+<package name="BUZZER-CMT1603">
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+<wire x1="-8" y1="-8" x2="8" y2="-8" width="0.127" layer="21"/>
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+<smd name="P$2" x="9.3" y="0" dx="2.5" dy="3" layer="1"/>
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+<package name="BUZZER-CCV">
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+<smd name="2" x="6.5" y="0" dx="3" dy="3" layer="1"/>
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+<package name="BUZZER-12MM-NS">
+<circle x="0" y="0" radius="5.9" width="0.2032" layer="51"/>
+<circle x="0" y="0" radius="1.27" width="0.2032" layer="51"/>
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+<package name="BUZZER-12MM-NS-KIT">
+<description>&lt;h3&gt;BUZZER-12MM-NS-KIT&lt;/h3&gt;
+Through-hole buzzer&lt;br&gt;
+&lt;br&gt;
+&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. You'll only be able to solder to the bottom side.</description>
+<circle x="0" y="0" radius="5.9" width="0.2032" layer="51"/>
+<circle x="0" y="0" radius="1.27" width="0.2032" layer="51"/>
+<pad name="-" x="-3.25" y="0" drill="0.9" diameter="1.8796" stop="no"/>
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+<package name="BUZZER-CCV-KIT">
+<description>&lt;h3&gt;BUZZER-CCV-KIT&lt;/h3&gt;
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+<hole x="2.25" y="3.9" drill="0.8"/>
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+<package name="SOT23">
+<description>&lt;b&gt;SOT-23&lt;/b&gt;</description>
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+<package name="TO-92">
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+<text x="3.175" y="-1.27" size="0.4064" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="SOT89">
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+<smd name="2" x="0" y="-1.8" dx="0.58" dy="1.2" layer="1"/>
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+<text x="2.9905" y="-1.1295" size="0.4064" layer="27" rot="R90">&gt;VALUE</text>
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+<rectangle x1="1.26" y1="-2.23" x2="1.74" y2="-1.27" layer="51"/>
+</package>
+<package name="TO-92-AMMO">
+<wire x1="-2.0946" y1="-1.651" x2="-0.7863" y2="2.5485" width="0.2032" layer="21" curve="-111.098957" cap="flat"/>
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+<wire x1="-2.0945" y1="-1.651" x2="2.0945" y2="-1.651" width="0.2032" layer="21"/>
+<wire x1="-0.635" y1="2.54" x2="0.635" y2="2.54" width="0.2032" layer="21" curve="-25.057615"/>
+<wire x1="0.635" y1="2.54" x2="1.905" y2="1.905" width="0.2032" layer="21" curve="-28.072487"/>
+<wire x1="-1.905" y1="1.905" x2="0.635" y2="2.54" width="0.2032" layer="21" curve="-53.130102"/>
+<pad name="3" x="2.54" y="0" drill="0.8128" diameter="1.8796"/>
+<pad name="2" x="0" y="0" drill="0.8128" diameter="1.8796"/>
+<pad name="1" x="-2.54" y="0" drill="0.8128" diameter="1.8796"/>
+<text x="3.175" y="1.905" size="0.4064" layer="25" ratio="10">&gt;NAME</text>
+<text x="3.175" y="-1.905" size="0.4064" layer="27" ratio="10">&gt;VALUE</text>
+</package>
 </packages>
 <symbols>
 <symbol name="M08">
@@ -3736,6 +3246,60 @@ Commonly used for small ceramic capacitors. Like our 0.1uF (http://www.sparkfun.
 <vertex x="-2.413" y="-2.921"/>
 </polygon>
 </symbol>
+<symbol name="DIODE">
+<wire x1="-1.27" y1="-1.27" x2="1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="1.27" y1="0" x2="-1.27" y2="1.27" width="0.254" layer="94"/>
+<wire x1="1.27" y1="1.27" x2="1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.254" layer="94"/>
+<wire x1="1.27" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94"/>
+<text x="2.54" y="0.4826" size="1.778" layer="95">&gt;NAME</text>
+<text x="2.54" y="-2.3114" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="A" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
+<pin name="C" x="2.54" y="0" visible="off" length="short" direction="pas" rot="R180"/>
+</symbol>
+<symbol name="BUZZER">
+<wire x1="-1.27" y1="1.905" x2="0" y2="1.905" width="0.1524" layer="94"/>
+<wire x1="0" y1="1.905" x2="0" y2="2.54" width="0.1524" layer="94"/>
+<wire x1="0" y1="1.905" x2="0" y2="1.27" width="0.1524" layer="94"/>
+<wire x1="0.635" y1="3.175" x2="0.635" y2="0.635" width="0.1524" layer="94"/>
+<wire x1="0.635" y1="0.635" x2="1.905" y2="0.635" width="0.1524" layer="94"/>
+<wire x1="1.905" y1="0.635" x2="1.905" y2="3.175" width="0.1524" layer="94"/>
+<wire x1="1.905" y1="3.175" x2="0.635" y2="3.175" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="2.54" x2="2.54" y2="1.905" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="1.905" x2="3.81" y2="1.905" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="1.905" x2="2.54" y2="1.27" width="0.1524" layer="94"/>
+<wire x1="5.08" y1="0" x2="5.08" y2="3.81" width="0.254" layer="94"/>
+<wire x1="5.08" y1="3.81" x2="5.715" y2="3.81" width="0.254" layer="94"/>
+<wire x1="5.715" y1="3.81" x2="5.715" y2="4.445" width="0.254" layer="94"/>
+<wire x1="5.715" y1="4.445" x2="-3.175" y2="4.445" width="0.254" layer="94"/>
+<wire x1="-3.175" y1="4.445" x2="-3.175" y2="3.81" width="0.254" layer="94"/>
+<wire x1="-3.175" y1="3.81" x2="-2.54" y2="3.81" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="3.81" x2="-2.54" y2="0" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="3.81" x2="5.08" y2="3.81" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="0" x2="5.08" y2="0" width="0.254" layer="94"/>
+<text x="-2.54" y="5.08" size="1.778" layer="95">&gt;NAME</text>
+<text x="6.35" y="0" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="2" x="2.54" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/>
+<pin name="1" x="0" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/>
+</symbol>
+<symbol name="NPN">
+<wire x1="2.54" y1="2.54" x2="0.508" y2="1.524" width="0.1524" layer="94"/>
+<wire x1="1.778" y1="-1.524" x2="2.54" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="-2.54" x2="1.27" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="1.27" y1="-2.54" x2="1.778" y2="-1.524" width="0.1524" layer="94"/>
+<wire x1="1.54" y1="-2.04" x2="0.308" y2="-1.424" width="0.1524" layer="94"/>
+<wire x1="1.524" y1="-2.413" x2="2.286" y2="-2.413" width="0.254" layer="94"/>
+<wire x1="2.286" y1="-2.413" x2="1.778" y2="-1.778" width="0.254" layer="94"/>
+<wire x1="1.778" y1="-1.778" x2="1.524" y2="-2.286" width="0.254" layer="94"/>
+<wire x1="1.524" y1="-2.286" x2="1.905" y2="-2.286" width="0.254" layer="94"/>
+<wire x1="1.905" y1="-2.286" x2="1.778" y2="-2.032" width="0.254" layer="94"/>
+<text x="5.08" y="0" size="1.778" layer="95">&gt;NAME</text>
+<text x="5.08" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
+<rectangle x1="-0.254" y1="-2.54" x2="0.508" y2="2.54" layer="94"/>
+<pin name="B" x="-2.54" y="0" visible="off" length="short" direction="pas" swaplevel="1"/>
+<pin name="E" x="2.54" y="-5.08" visible="off" length="short" direction="pas" swaplevel="3" rot="R90"/>
+<pin name="C" x="2.54" y="5.08" visible="off" length="short" direction="pas" swaplevel="2" rot="R270"/>
+</symbol>
 </symbols>
 <devicesets>
 <deviceset name="M08" prefix="JP" uservalue="yes">
@@ -4705,72 +4269,303 @@ Standard schematic elements and footprints for 5mm, 3mm, 1206, and 0603 sized LE
 </device>
 </devices>
 </deviceset>
-</devicesets>
-</library>
-<library name="supply1">
-<packages>
-</packages>
-<symbols>
-<symbol name="+5V">
-<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
-<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
-<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
-<pin name="+5V" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
-</symbol>
-<symbol name="+3V3">
-<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
-<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
-<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
-<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
-</symbol>
-<symbol name="GND">
-<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
-<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
-<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
-</symbol>
-</symbols>
-<devicesets>
-<deviceset name="+5V" prefix="P+">
-<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<deviceset name="DIODE" prefix="D" uservalue="yes">
+<description>&lt;b&gt;Diode&lt;/b&gt;
+These are standard reverse protection diodes and small signal diodes. SMA package can handle up to about 1A. SOD-323 can handle about 200mA. What the SOD-323 package when ordering, there are some mfgs out there that are 5-pin packages.</description>
 <gates>
-<gate name="1" symbol="+5V" x="0" y="0"/>
+<gate name="G$1" symbol="DIODE" x="0" y="0"/>
 </gates>
 <devices>
-<device name="">
+<device name="SMA" package="SMA-DIODE">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-</devices>
-</deviceset>
-<deviceset name="+3V3" prefix="+3V3">
-<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
-<gates>
-<gate name="G$1" symbol="+3V3" x="0" y="0"/>
-</gates>
-<devices>
-<device name="">
+<device name="PTH" package="DIODE-1N4001">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-</devices>
-</deviceset>
-<deviceset name="GND" prefix="GND">
-<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
-<gates>
-<gate name="1" symbol="GND" x="0" y="0"/>
-</gates>
-<devices>
-<device name="">
+<device name="SOD" package="SOD-323">
+<connects>
+<connect gate="G$1" pin="A" pad="2"/>
+<connect gate="G$1" pin="C" pad="1"/>
+</connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-</devices>
-</deviceset>
-</devicesets>
-</library>
+<device name="SOT23" package="SOT23-3">
+<connects>
+<connect gate="G$1" pin="A" pad="1"/>
+<connect gate="G$1" pin="C" pad="3"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="1N4148" package="DIODE-1N4148">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMB" package="SMB-DIODE">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="HV" package="DIODE-HV">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMA-ALT" package="SMA-DIODE_ALT">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMA-KIT" package="SMA-DIODE-KIT">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="BUZZER" prefix="SG">
+<description>&lt;b&gt;Buzzer 12mm&lt;/b&gt;
+Spark Fun Electronics SKU : Comp-Buzzer</description>
+<gates>
+<gate name="G$1" symbol="BUZZER" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PTH" package="BUZZER-12MM">
+<connects>
+<connect gate="G$1" pin="1" pad="+"/>
+<connect gate="G$1" pin="2" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMD" package="BUZZER-CMT1603">
+<connects>
+<connect gate="G$1" pin="1" pad="P$1"/>
+<connect gate="G$1" pin="2" pad="P$2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMD2" package="BUZZER-CCV">
+<connects>
+<connect gate="G$1" pin="1" pad="+"/>
+<connect gate="G$1" pin="2" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMD3" package="BUZZER-CMT1102">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="NS" package="BUZZER-12MM-NS">
+<connects>
+<connect gate="G$1" pin="1" pad="+"/>
+<connect gate="G$1" pin="2" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="PTH-NS-KIT" package="BUZZER-12MM-NS-KIT">
+<connects>
+<connect gate="G$1" pin="1" pad="+"/>
+<connect gate="G$1" pin="2" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMD2-KIT" package="BUZZER-CCV-KIT">
+<connects>
+<connect gate="G$1" pin="1" pad="+"/>
+<connect gate="G$1" pin="2" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TRANSISTOR_NPN" prefix="Q" uservalue="yes">
+<description>&lt;b&gt;Transistor NPN&lt;/b&gt;
+BJT configuration in SOT23 package. MMBT2222 is the common NPN we use. Double check BCE configuration again layout.</description>
+<gates>
+<gate name="G$1" symbol="NPN" x="0" y="0"/>
+</gates>
+<devices>
+<device name="SOT23" package="SOT23">
+<connects>
+<connect gate="G$1" pin="B" pad="1"/>
+<connect gate="G$1" pin="C" pad="3"/>
+<connect gate="G$1" pin="E" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SOT23-3" package="SOT23-3">
+<connects>
+<connect gate="G$1" pin="B" pad="1"/>
+<connect gate="G$1" pin="C" pad="3"/>
+<connect gate="G$1" pin="E" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TO92" package="TO-92">
+<connects>
+<connect gate="G$1" pin="B" pad="2"/>
+<connect gate="G$1" pin="C" pad="3"/>
+<connect gate="G$1" pin="E" pad="1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="&quot;" package="SOT223">
+<connects>
+<connect gate="G$1" pin="B" pad="1"/>
+<connect gate="G$1" pin="C" pad="2"/>
+<connect gate="G$1" pin="E" pad="3"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SOT89" package="SOT89">
+<connects>
+<connect gate="G$1" pin="B" pad="1"/>
+<connect gate="G$1" pin="C" pad="2"/>
+<connect gate="G$1" pin="E" pad="3"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TO-92-AMMO" package="TO-92-AMMO">
+<connects>
+<connect gate="G$1" pin="B" pad="2"/>
+<connect gate="G$1" pin="C" pad="3"/>
+<connect gate="G$1" pin="E" pad="1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="supply1">
+<packages>
+</packages>
+<symbols>
+<symbol name="+5V">
+<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
+<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="+5V" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
+</symbol>
+<symbol name="+3V3">
+<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
+<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
+</symbol>
+<symbol name="GND">
+<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="+5V" prefix="P+">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="+5V" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="+3V3" prefix="+3V3">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="G$1" symbol="+3V3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="GND" prefix="GND">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="GND" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
 <library name="rcl">
 <packages>
 <package name="C0402">
@@ -8248,104 +8043,2410 @@ Source: 008-0260-0_E.pdf</description>
 </deviceset>
 </devicesets>
 </library>
-</libraries>
-<attributes>
-</attributes>
-<variantdefs>
-</variantdefs>
-<classes>
-<class number="0" name="default" width="0" drill="0">
-</class>
-</classes>
-<parts>
-<part name="XB1" library="maxstream" deviceset="XBEE" device="-PRO"/>
-<part name="U$1" library="avr-7" deviceset="XMEGA-A3" device="TQFP"/>
-<part name="IC1" library="avr-7" deviceset="MEGA48/88/168" device="-AU"/>
-<part name="IC2" library="74xx-eu" deviceset="74*126" device="D" technology="HC"/>
-<part name="X1" library="con-molex" deviceset="52745-1690" device=""/>
-<part name="X2" library="con-molex" deviceset="52745-1690" device=""/>
-<part name="JP1" library="SparkFun" deviceset="M08" device="1X08"/>
-<part name="JP2" library="SparkFun" deviceset="M08" device="1X08"/>
-<part name="JP3" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP4" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP5" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP6" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP7" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP8" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP9" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP10" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP11" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP12" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP13" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="JP14" library="SparkFun" deviceset="M03" device="PTH"/>
-<part name="IC3" library="SparkFun" deviceset="V_REG_LM1117" device="SOT223"/>
-<part name="JP15" library="SparkFun" deviceset="M02" device="PTH"/>
-<part name="JP16" library="SparkFun" deviceset="M01" device="PTH"/>
-<part name="JP17" library="SparkFun" deviceset="M01" device="PTH"/>
-<part name="JP18" library="SparkFun" deviceset="M01" device="PTH"/>
-<part name="JP19" library="SparkFun" deviceset="M01" device="PTH"/>
-<part name="JP20" library="SparkFun" deviceset="M01" device="PTH"/>
-<part name="P+2" library="supply1" deviceset="+5V" device=""/>
-<part name="GND2" library="supply1" deviceset="GND" device=""/>
-<part name="P+3" library="supply1" deviceset="+5V" device=""/>
-<part name="+3V2" library="supply1" deviceset="+3V3" device=""/>
-<part name="GND3" library="supply1" deviceset="GND" device=""/>
-<part name="C1" library="rcl" deviceset="C-US" device="C3216" value="10u"/>
-<part name="C2" library="rcl" deviceset="C-US" device="C3216" value="10u"/>
-<part name="+3V3" library="supply1" deviceset="+3V3" device=""/>
-<part name="GND4" library="supply1" deviceset="GND" device=""/>
-<part name="P+4" library="supply1" deviceset="+5V" device=""/>
-<part name="+3V1" library="supply1" deviceset="+3V3" device=""/>
-<part name="GND1" library="supply1" deviceset="GND" device=""/>
-<part name="R1" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
-<part name="C3" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="GND5" library="supply1" deviceset="GND" device=""/>
-<part name="R2" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
-<part name="C4" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="TQFP44">
+<description>&lt;b&gt;44-lead Thin Quad Flat Package&lt;/b&gt;</description>
+<wire x1="-4.8" y1="4.4" x2="-4.4" y2="4.8" width="0.2032" layer="21"/>
+<wire x1="-4.4" y1="4.8" x2="4.4" y2="4.8" width="0.2032" layer="21"/>
+<wire x1="4.4" y1="4.8" x2="4.8" y2="4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="4.4" x2="4.8" y2="-4.4" width="0.2032" layer="21"/>
+<wire x1="4.8" y1="-4.4" x2="4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="4.4" y1="-4.8" x2="-4.4" y2="-4.8" width="0.2032" layer="21"/>
+<wire x1="-4.4" y1="-4.8" x2="-4.8" y2="-4.4" width="0.2032" layer="21"/>
+<wire x1="-4.8" y1="-4.4" x2="-4.8" y2="4.4" width="0.2032" layer="21"/>
+<circle x="-4" y="4" radius="0.2827" width="0.254" layer="21"/>
+<smd name="1" x="-5.8" y="4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="2" x="-5.8" y="3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="3" x="-5.8" y="2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="4" x="-5.8" y="1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="5" x="-5.8" y="0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="6" x="-5.8" y="0" dx="1.5" dy="0.5" layer="1"/>
+<smd name="7" x="-5.8" y="-0.8" dx="1.5" dy="0.5" layer="1"/>
+<smd name="8" x="-5.8" y="-1.6" dx="1.5" dy="0.5" layer="1"/>
+<smd name="9" x="-5.8" y="-2.4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="10" x="-5.8" y="-3.2" dx="1.5" dy="0.5" layer="1"/>
+<smd name="11" x="-5.8" y="-4" dx="1.5" dy="0.5" layer="1"/>
+<smd name="12" x="-4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="13" x="-3.2" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="14" x="-2.4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="15" x="-1.6" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="16" x="-0.8" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="17" x="0" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="18" x="0.8" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="19" x="1.6" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="20" x="2.4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="21" x="3.2" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
+<smd name="22" x="4" y="-5.8" dx="0.5" dy="1.5" layer="1"/>
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+<smd name="26" x="5.8" y="-1.6" dx="1.5" dy="0.5" layer="1"/>
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+<text x="-4.445" y="-8.7551" size="1.778" layer="27">&gt;VALUE</text>
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+</package>
+</packages>
+<symbols>
+<symbol name="MEGA1284">
+<wire x1="-15.24" y1="45.72" x2="27.94" y2="45.72" width="0.254" layer="94"/>
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+<text x="-15.24" y="46.482" size="1.778" layer="95">&gt;NAME</text>
+<text x="-15.24" y="-48.26" size="1.778" layer="96">&gt;VALUE</text>
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+<pin name="AVCC" x="-20.32" y="22.86" length="middle" direction="pwr"/>
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+<pin name="GND2" x="-20.32" y="0" visible="pad" length="middle" direction="pwr"/>
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+<pin name="(OC2A/PCINT31)PD7" x="33.02" y="-25.4" length="middle" rot="R180"/>
+<pin name="VCC1" x="-20.32" y="15.24" visible="pad" length="middle" direction="pwr"/>
+<pin name="VCC" x="-20.32" y="12.7" length="middle" direction="pwr"/>
+<pin name="VCC2" x="-20.32" y="10.16" visible="pad" length="middle" direction="pwr"/>
+<pin name="GND" x="-20.32" y="2.54" length="middle" direction="pwr"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="MEGA1284" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+16 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA1284" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0/PCINT0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1/PCINT1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2/PCINT2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3/PCINT3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4/PCINT4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5/PCINT5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6/PCINT6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7/PCINT7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2/PCINT10)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0A/PCINT11)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP/OC2B/PCINT30)PD6" pad="15"/>
+<connect gate="G$1" pin="(MISO/OC3A/PCINT14)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI/PCINT13/ICP3)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A/PCINT29)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B/XCK1/PCINT28)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2A/PCINT31)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD0/T3/PCINT24)PD0" pad="9"/>
+<connect gate="G$1" pin="(RXD1/INT0/PCINT26)PD2" pad="11"/>
+<connect gate="G$1" pin="(SCK/OC3B/PCINT15)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS/OCB0/PCINT12)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK0/PCINT8)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1/CLKO/PCINT9)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK/PCINT18)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI/PCINT21)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO/PCINT20)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS/PCINT19)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1/PCINT22)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2/PCINT23)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD0/PCINT25)PD1" pad="10"/>
+<connect gate="G$1" pin="(TXD1/INT1/PCINT27)PD3" pad="12"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL/PCINT16)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA/PCINT17)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="pot">
+<description>&lt;b&gt;Potentiometers&lt;/b&gt;&lt;p&gt;
+Beckman, Copal, Piher, Spectrol, Schukat&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="B25P">
+<description>&lt;b&gt;POTENTIOMETER&lt;/b&gt;&lt;p&gt;
+Beckman Helitrim 25</description>
+<wire x1="3.175" y1="3.429" x2="-3.175" y2="3.429" width="0.1524" layer="21"/>
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+<circle x="0" y="0.381" radius="2.032" width="0.1524" layer="51"/>
+<pad name="A" x="-2.54" y="0" drill="0.8128" shape="octagon"/>
+<pad name="E" x="2.54" y="0" drill="0.8128" shape="octagon"/>
+<pad name="S" x="0" y="2.54" drill="0.8128" shape="octagon"/>
+<text x="-3.175" y="3.81" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.1496" y="-5.08" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="2.413" y="-2.794" size="0.9906" layer="21" ratio="12">3</text>
+<text x="-2.921" y="-2.794" size="0.9906" layer="21" ratio="12">1</text>
+</package>
+<package name="B25U">
+<description>&lt;b&gt;POTENTIOMETER&lt;/b&gt;&lt;p&gt;
+Beckman Helitrim 25</description>
+<wire x1="3.175" y1="3.429" x2="-3.175" y2="3.429" width="0.1524" layer="21"/>
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+<text x="-3.175" y="3.81" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.1496" y="-5.08" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
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+<text x="2.413" y="-2.794" size="0.9906" layer="21" ratio="12">1</text>
+</package>
+<package name="B25V">
+<description>&lt;b&gt;POTENTIOMETER&lt;/b&gt;&lt;p&gt;
+Beckman Helitrim 25</description>
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+<pad name="A" x="-6.35" y="-1.27" drill="0.8128" shape="long"/>
+<text x="-3.175" y="3.175" size="1.778" layer="25" ratio="10">&gt;NAME</text>
+<text x="-5.08" y="-1.778" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-9.525" y1="-1.27" x2="-8.89" y2="1.27" layer="21"/>
+<rectangle x1="-10.16" y1="0.381" x2="-9.525" y2="1.27" layer="21"/>
+<rectangle x1="-10.16" y1="-1.27" x2="-9.525" y2="-0.381" layer="21"/>
+</package>
+<package name="CIP20C-4MM">
+<description>&lt;b&gt;Carbon Rotary Potentiometers - 20 mm size&lt;/b&gt;&lt;p&gt;
+Source: Radiohm .. RAD.pdf</description>
+<wire x1="-10.1" y1="-1.125" x2="-10.1" y2="6.675" width="0.2032" layer="21"/>
+<wire x1="-10.1" y1="6.675" x2="10.1" y2="6.675" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="6.675" x2="10.1" y2="-1.125" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-1.125" x2="10.1" y2="-3.8" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-3.8" x2="-10.1" y2="-3.8" width="0.2032" layer="21"/>
+<wire x1="-10.1" y1="-3.8" x2="-10.1" y2="-1.125" width="0.2032" layer="21"/>
+<wire x1="2.9" y1="-3.9" x2="2.9" y2="-11.8" width="0.2032" layer="21"/>
+<wire x1="2.9" y1="-11.8" x2="-2.9" y2="-11.8" width="0.2032" layer="21"/>
+<wire x1="-2.9" y1="-11.8" x2="-2.9" y2="-3.875" width="0.2032" layer="21"/>
+<wire x1="1.9" y1="-11.9" x2="1.9" y2="-52.8" width="0.2032" layer="21"/>
+<wire x1="1.9" y1="-52.8" x2="0.9" y2="-53.8" width="0.2032" layer="21"/>
+<wire x1="0.9" y1="-53.8" x2="-0.9" y2="-53.8" width="0.2032" layer="21"/>
+<wire x1="-0.9" y1="-53.8" x2="-1.9" y2="-52.8" width="0.2032" layer="21"/>
+<wire x1="-1.9" y1="-52.8" x2="-1.9" y2="-11.875" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-1.125" x2="-10.1" y2="-1.125" width="0.2032" layer="21"/>
+<pad name="A" x="-5" y="0" drill="1.3" diameter="1.9304"/>
+<pad name="S" x="0" y="0" drill="1.3" diameter="1.9304"/>
+<pad name="E" x="5" y="0" drill="1.3" diameter="1.9304"/>
+<text x="-10.16" y="6.985" size="1.27" layer="25">&gt;NAME</text>
+<text x="-8.255" y="3.175" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+<package name="CIP20C-6MM">
+<description>&lt;b&gt;Carbon Rotary Potentiometers - 20 mm size&lt;/b&gt;&lt;p&gt;
+Source: Radiohm .. RAD.pdf</description>
+<wire x1="-10.1" y1="-1.125" x2="-10.1" y2="6.675" width="0.2032" layer="21"/>
+<wire x1="-10.1" y1="6.675" x2="10.1" y2="6.675" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="6.675" x2="10.1" y2="-1.125" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-1.125" x2="10.1" y2="-3.8" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-3.8" x2="-10.1" y2="-3.8" width="0.2032" layer="21"/>
+<wire x1="-10.1" y1="-3.8" x2="-10.1" y2="-1.125" width="0.2032" layer="21"/>
+<wire x1="3.9" y1="-3.9" x2="3.9" y2="-11.8" width="0.2032" layer="21"/>
+<wire x1="3.9" y1="-11.8" x2="-3.9" y2="-11.8" width="0.2032" layer="21"/>
+<wire x1="-3.9" y1="-11.8" x2="-3.9" y2="-3.875" width="0.2032" layer="21"/>
+<wire x1="2.9" y1="-11.85" x2="2.9" y2="-52.8" width="0.2032" layer="21"/>
+<wire x1="2.9" y1="-52.8" x2="1.9" y2="-53.8" width="0.2032" layer="21"/>
+<wire x1="1.9" y1="-53.8" x2="-1.9" y2="-53.8" width="0.2032" layer="21"/>
+<wire x1="-1.9" y1="-53.8" x2="-2.9" y2="-52.8" width="0.2032" layer="21"/>
+<wire x1="-2.9" y1="-52.8" x2="-2.9" y2="-11.875" width="0.2032" layer="21"/>
+<wire x1="10.1" y1="-1.125" x2="-10.1" y2="-1.125" width="0.2032" layer="21"/>
+<pad name="A" x="-5" y="0" drill="1.3" diameter="1.9304"/>
+<pad name="S" x="0" y="0" drill="1.3" diameter="1.9304"/>
+<pad name="E" x="5" y="0" drill="1.3" diameter="1.9304"/>
+<text x="-10.16" y="6.985" size="1.27" layer="25">&gt;NAME</text>
+<text x="-8.255" y="3.175" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+<package name="SM-42/43A">
+<description>&lt;b&gt;COPAL ELECTRONICS SM-42/43 SURFACE MOUNT TRIMMERS&lt;/b&gt; Side adjustmet&lt;p&gt;
+Source: smt-pots.pdf</description>
+<wire x1="2.175" y1="-2.3" x2="2.175" y2="2.3" width="0.2032" layer="51"/>
+<wire x1="2.175" y1="2.3" x2="-2.2" y2="2.3" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="2.3" x2="-2.2" y2="-2.3" width="0.2032" layer="51"/>
+<wire x1="-2.2" y1="-2.3" x2="2.175" y2="-2.3" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="2.3" x2="-2.2" y2="1.2" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="-1.2" x2="-2.2" y2="-2.3" width="0.2032" layer="21"/>
+<smd name="3" x="2" y="-1.15" dx="1.3" dy="2" layer="1" rot="R90"/>
+<smd name="2" x="-2" y="0" dx="2" dy="2" layer="1" rot="R90"/>
+<smd name="1" x="2" y="1.15" dx="1.3" dy="2" layer="1" rot="R90"/>
+<text x="-2.65" y="-3.975" size="1.27" layer="25">&gt;NAME</text>
+<text x="-2.75" y="2.7" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="1.95" y1="-1.425" x2="2.75" y2="-1.125" layer="51" rot="R90"/>
+<rectangle x1="1.95" y1="1.125" x2="2.75" y2="1.425" layer="51" rot="R90"/>
+<rectangle x1="-3" y1="-0.15" x2="-1.7" y2="0.15" layer="51" rot="R90"/>
+<rectangle x1="-2.5875" y1="-1.6375" x2="-1.6875" y2="-1.3125" layer="21" rot="R90"/>
+</package>
+<package name="SM-42/43B">
+<description>&lt;b&gt;COPAL ELECTRONICS SM-42/43 SURFACE MOUNT TRIMMERS&lt;/b&gt; Side adjustmet&lt;p&gt;
+Source: smt-pots.pdf</description>
+<wire x1="2.175" y1="-2.3" x2="2.175" y2="2.3" width="0.2032" layer="51"/>
+<wire x1="2.175" y1="2.3" x2="-2.2" y2="2.3" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="2.3" x2="-2.2" y2="-2.3" width="0.2032" layer="51"/>
+<wire x1="-2.2" y1="-2.3" x2="2.175" y2="-2.3" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="2.3" x2="-2.2" y2="1.2" width="0.2032" layer="21"/>
+<wire x1="-2.2" y1="-1.2" x2="-2.2" y2="-2.3" width="0.2032" layer="21"/>
+<smd name="3" x="2.6" y="-1.15" dx="1.3" dy="1.3" layer="1" rot="R90"/>
+<smd name="2" x="-2.6" y="0" dx="2" dy="1.3" layer="1" rot="R90"/>
+<smd name="1" x="2.6" y="1.15" dx="1.3" dy="1.3" layer="1" rot="R90"/>
+<text x="-2.575" y="-3.85" size="1.27" layer="25">&gt;NAME</text>
+<text x="-2.575" y="2.65" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="2.2" y1="-1.675" x2="3" y2="-0.875" layer="51" rot="R90"/>
+<rectangle x1="2.2" y1="0.875" x2="3" y2="1.675" layer="51" rot="R90"/>
+<rectangle x1="-3.2375" y1="-0.3875" x2="-1.9375" y2="0.3875" layer="51" rot="R90"/>
+<rectangle x1="-2.5875" y1="-1.6375" x2="-1.6875" y2="-1.3125" layer="21" rot="R90"/>
+</package>
+<package name="SM-42/43W">
+<description>&lt;b&gt;COPAL ELECTRONICS SM-42/43 SURFACE MOUNT TRIMMERS&lt;/b&gt; Top adjustmet&lt;p&gt;
+Source: smt-pots.pdf</description>
+<wire x1="-2.3" y1="-1.625" x2="2.3" y2="-1.625" width="0.2032" layer="51"/>
+<wire x1="2.3" y1="-1.625" x2="2.3" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="1.65" x2="-2.3" y2="1.65" width="0.2032" layer="51"/>
+<wire x1="-2.3" y1="1.65" x2="-2.3" y2="-1.625" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="1.65" x2="1.2" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="-1.2" y1="1.65" x2="-2.3" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="1.525" y1="1.175" x2="0.875" y2="0.525" width="0.2032" layer="51"/>
+<circle x="1.2" y="0.85" radius="0.5505" width="0.2032" layer="51"/>
+<smd name="1" x="-1.27" y="-1.45" dx="1.3" dy="1.6" layer="1"/>
+<smd name="2" x="0" y="1.45" dx="2" dy="1.6" layer="1"/>
+<smd name="3" x="1.27" y="-1.45" dx="1.3" dy="1.6" layer="1"/>
+<text x="-2.4" y="-3.625" size="1.27" layer="25">&gt;NAME</text>
+<text x="-2.4" y="2.475" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-1.675" y1="-1.95" x2="-0.875" y2="-1.65" layer="51"/>
+<rectangle x1="0.875" y1="-1.95" x2="1.675" y2="-1.65" layer="51"/>
+<rectangle x1="-0.65" y1="1.65" x2="0.65" y2="1.95" layer="51"/>
+</package>
+<package name="SM-42/43X">
+<description>&lt;b&gt;COPAL ELECTRONICS SM-42/43 SURFACE MOUNT TRIMMERS&lt;/b&gt; Top adjustmet&lt;p&gt;
+Source: smt-pots.pdf</description>
+<wire x1="-2.3" y1="-1.625" x2="2.3" y2="-1.625" width="0.2032" layer="51"/>
+<wire x1="2.3" y1="-1.625" x2="2.3" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="1.65" x2="-2.3" y2="1.65" width="0.2032" layer="51"/>
+<wire x1="-2.3" y1="1.65" x2="-2.3" y2="-1.625" width="0.2032" layer="21"/>
+<wire x1="2.3" y1="1.65" x2="1.2" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="-1.2" y1="1.65" x2="-2.3" y2="1.65" width="0.2032" layer="21"/>
+<wire x1="1.525" y1="1.175" x2="0.875" y2="0.525" width="0.2032" layer="21"/>
+<circle x="1.2" y="0.85" radius="0.5505" width="0.2032" layer="21"/>
+<smd name="1" x="-1.27" y="-2.55" dx="1.3" dy="1.9" layer="1"/>
+<smd name="2" x="0" y="2.55" dx="2" dy="1.9" layer="1"/>
+<smd name="3" x="1.27" y="-2.55" dx="1.3" dy="1.9" layer="1"/>
+<text x="-2.4" y="-5" size="1.27" layer="25">&gt;NAME</text>
+<text x="-2.4" y="3.675" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-1.675" y1="-2.85" x2="-0.875" y2="-1.65" layer="51"/>
+<rectangle x1="0.875" y1="-2.85" x2="1.675" y2="-1.65" layer="51"/>
+<rectangle x1="-0.65" y1="1.65" x2="0.65" y2="2.85" layer="51"/>
+</package>
+<package name="3223G">
+<description>&lt;b&gt;3 mm SMD Trimming Potentiometer&lt;/b&gt; Side Adjust&lt;p&gt;
+Source: http://www.bourns.com/data/global/PDFs/3223.PDF</description>
+<wire x1="-1.85" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="-1.85" x2="-1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="-1.85" y1="-1.85" x2="-1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="-0.8975" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="1.0075" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.85" x2="-0.8975" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.0075" x2="1.85" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="-1.85" y1="-0.58" x2="-1.85" y2="0.58" width="0.2032" layer="21"/>
+<smd name="1" x="-2.2" y="1.4" dx="2" dy="0.9" layer="1"/>
+<smd name="2" x="2.2" y="0" dx="2" dy="1.3" layer="1"/>
+<smd name="3" x="-2.2" y="-1.4" dx="2" dy="0.9" layer="1"/>
+<text x="-1.5875" y="2.2225" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.905" y="-3.4925" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-2.65" y1="1.075" x2="-1.925" y2="1.625" layer="51"/>
+<rectangle x1="-2.65" y1="-1.625" x2="-1.925" y2="-1.075" layer="51"/>
+<rectangle x1="1.925" y1="-0.5" x2="2.625" y2="0.5" layer="51"/>
+</package>
+<package name="3223J">
+<description>&lt;b&gt;3 mm SMD Trimming Potentiometer&lt;/b&gt; Side Adjust&lt;p&gt;
+Source: http://www.bourns.com/data/global/PDFs/3223.PDF</description>
+<wire x1="-1.85" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="-1.85" x2="-1.85" y2="-1.85" width="0.2032" layer="51"/>
+<wire x1="-1.85" y1="-1.85" x2="-1.85" y2="1.85" width="0.2032" layer="51"/>
+<wire x1="-0.8975" y1="1.85" x2="1.85" y2="1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="1.85" x2="1.85" y2="1.0075" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.85" x2="-0.8975" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="-1.0075" x2="1.85" y2="-1.85" width="0.2032" layer="21"/>
+<wire x1="-1.85" y1="-0.58" x2="-1.85" y2="0.58" width="0.2032" layer="21"/>
+<smd name="1" x="-2" y="1.4" dx="1.6" dy="0.9" layer="1"/>
+<smd name="2" x="2" y="0" dx="1.6" dy="1.3" layer="1"/>
+<smd name="3" x="-2" y="-1.4" dx="1.6" dy="0.9" layer="1"/>
+<text x="-1.5875" y="2.2225" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.905" y="-3.4925" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+<package name="3223W">
+<description>&lt;b&gt;3 mm SMD Trimming Potentiometer&lt;/b&gt; Top Adjust&lt;p&gt;
+Source: http://www.bourns.com/data/global/PDFs/3223.PDF</description>
+<wire x1="-1.85" y1="1.5" x2="1.85" y2="1.5" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="1.5" x2="1.85" y2="-1.5" width="0.2032" layer="51"/>
+<wire x1="1.85" y1="-1.5" x2="-1.85" y2="-1.5" width="0.2032" layer="51"/>
+<wire x1="-1.85" y1="-1.5" x2="-1.85" y2="1.5" width="0.2032" layer="51"/>
+<wire x1="-1.85" y1="0.0875" x2="-1.85" y2="1.5" width="0.2032" layer="21"/>
+<wire x1="-1.85" y1="1.5" x2="-1.0075" y2="1.5" width="0.2032" layer="21"/>
+<wire x1="1.0075" y1="1.5" x2="1.85" y2="1.5" width="0.2032" layer="21"/>
+<wire x1="1.85" y1="1.5" x2="1.85" y2="0.0875" width="0.2032" layer="21"/>
+<wire x1="0.58" y1="-1.5" x2="-0.58" y2="-1.5" width="0.2032" layer="21"/>
+<circle x="1.05" y="0.725" radius="0.5255" width="0.1016" layer="21"/>
+<smd name="1" x="-1.4" y="-1.215" dx="0.9" dy="1.6" layer="1"/>
+<smd name="3" x="1.4" y="-1.215" dx="0.9" dy="1.6" layer="1"/>
+<smd name="2" x="0" y="1.215" dx="1.3" dy="1.3" layer="1"/>
+<text x="-1.5875" y="2.2225" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.905" y="-3.4925" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="0.55" y1="0.6" x2="1.55" y2="0.85" layer="21"/>
+</package>
+</packages>
+<symbols>
+<symbol name="TPOT">
+<wire x1="-0.762" y1="2.54" x2="-0.762" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0.762" y1="-2.54" x2="0.762" y2="2.54" width="0.254" layer="94"/>
+<wire x1="2.54" y1="0" x2="1.651" y2="0" width="0.1524" layer="94"/>
+<wire x1="1.651" y1="0" x2="-1.8796" y2="1.7526" width="0.1524" layer="94"/>
+<wire x1="0.762" y1="2.54" x2="-0.762" y2="2.54" width="0.254" layer="94"/>
+<wire x1="-0.762" y1="-2.54" x2="0.762" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="-2.54" x2="-2.54" y2="-0.508" width="0.1524" layer="94"/>
+<wire x1="-2.54" y1="-0.508" x2="-3.048" y2="-1.524" width="0.1524" layer="94"/>
+<wire x1="-2.54" y1="-0.508" x2="-2.032" y2="-1.524" width="0.1524" layer="94"/>
+<wire x1="-2.1597" y1="1.2939" x2="-1.7018" y2="2.2352" width="0.1524" layer="94"/>
+<text x="-5.969" y="-3.81" size="1.778" layer="95" rot="R90">&gt;NAME</text>
+<text x="-3.81" y="-3.81" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="A" x="0" y="-5.08" visible="pad" length="short" direction="pas" rot="R90"/>
+<pin name="E" x="0" y="5.08" visible="pad" length="short" direction="pas" rot="R270"/>
+<pin name="S" x="5.08" y="0" visible="pad" length="short" direction="pas" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="TRIM_EU-" prefix="R" uservalue="yes">
+<description>&lt;b&gt;POTENTIOMETER&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="TPOT" x="0" y="0"/>
+</gates>
+<devices>
+<device name="B25P" package="B25P">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B25U" package="B25U">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B25V" package="B25V">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B25X" package="B25X">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B64W" package="B64W">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B64Y" package="B64Y">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B90P" package="SP19L">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA6H" package="CA6H">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA6V" package="CA6V">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA9H" package="CA9H">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA9V" package="CA9V">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA14V" package="CA14V">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CA14H" package="CA14H">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CT6" package="CT6">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ECP10P" package="ECP10P">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ECP10S" package="ECP10S">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LI10" package="LI10">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LI15" package="LI15">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="RJ6" package="RJ6">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="RJ6S" package="RJ6S">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="RJ9W" package="RJ9W">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="RS3" package="RS3">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S43P" package="SP19L">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S63P" package="S63P">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S63S" package="S63S">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S63X" package="S63X">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S64W" package="S64W">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S64Y" package="S64Y">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S75H" package="S75H">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="S75P" package="S75P">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SP19L" package="SP19L">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ST10" package="ST10">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ST15" package="ST15">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="T189" package="SP19LKN">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="PT10" package="PT-10">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="PT10S" package="PT-10S">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="PTSPIN" package="PT-SPIN">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CIP20C-4MM" package="CIP20C-4MM">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CIP20C-6MM" package="CIP20C-6MM">
+<connects>
+<connect gate="1" pin="A" pad="A"/>
+<connect gate="1" pin="E" pad="E"/>
+<connect gate="1" pin="S" pad="S"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SM-42/43A" package="SM-42/43A">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SM-42/43B" package="SM-42/43B">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SM-42/43W" package="SM-42/43W">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SM-42/43X" package="SM-42/43X">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3223G" package="3223G">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3223J" package="3223J">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3223W" package="3223W">
+<connects>
+<connect gate="1" pin="A" pad="1"/>
+<connect gate="1" pin="E" pad="3"/>
+<connect gate="1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<parts>
+<part name="XB1" library="maxstream" deviceset="XBEE" device="-PRO"/>
+<part name="IC1" library="avr-7" deviceset="MEGA48/88/168" device="-AU" value="M168"/>
+<part name="IC2" library="74xx-eu" deviceset="74*126" device="D" technology="HC"/>
+<part name="X1" library="con-molex" deviceset="52745-1690" device=""/>
+<part name="X2" library="con-molex" deviceset="52745-1690" device=""/>
+<part name="JP1" library="SparkFun" deviceset="M08" device="1X08"/>
+<part name="JP2" library="SparkFun" deviceset="M08" device="1X08"/>
+<part name="JP3" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP4" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP5" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP6" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP7" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP8" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP9" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP10" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP11" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP12" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP13" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="JP14" library="SparkFun" deviceset="M03" device="PTH"/>
+<part name="IC3" library="SparkFun" deviceset="V_REG_LM1117" device="SOT223"/>
+<part name="JP15" library="SparkFun" deviceset="M02" device="PTH"/>
+<part name="JP16" library="SparkFun" deviceset="M01" device="PTH" value="3.3V"/>
+<part name="JP17" library="SparkFun" deviceset="M01" device="PTH" value="GND"/>
+<part name="JP18" library="SparkFun" deviceset="M01" device="PTH" value="+5V"/>
+<part name="GND2" library="supply1" deviceset="GND" device=""/>
+<part name="P+3" library="supply1" deviceset="+5V" device=""/>
+<part name="+3V2" library="supply1" deviceset="+3V3" device=""/>
+<part name="GND3" library="supply1" deviceset="GND" device=""/>
+<part name="C1" library="rcl" deviceset="C-US" device="C1206" value="10u"/>
+<part name="C2" library="rcl" deviceset="C-US" device="C1206" value="10u"/>
+<part name="+3V3" library="supply1" deviceset="+3V3" device=""/>
+<part name="GND4" library="supply1" deviceset="GND" device=""/>
+<part name="P+4" library="supply1" deviceset="+5V" device=""/>
 <part name="P+1" library="supply1" deviceset="+5V" device=""/>
 <part name="P+5" library="supply1" deviceset="+5V" device=""/>
 <part name="GND6" library="supply1" deviceset="GND" device=""/>
-<part name="C5" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="C6" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
+<part name="C5" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
+<part name="C6" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
 <part name="+3V4" library="supply1" deviceset="+3V3" device=""/>
 <part name="GND7" library="supply1" deviceset="GND" device=""/>
-<part name="C7" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="C8" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="C9" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="C10" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
-<part name="C12" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
+<part name="C7" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
+<part name="C8" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
+<part name="C9" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
+<part name="C10" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
 <part name="+3V6" library="supply1" deviceset="+3V3" device=""/>
 <part name="GND9" library="supply1" deviceset="GND" device=""/>
-<part name="C14" library="SparkFun" deviceset="CAP" device="0603-CAP" value="100n"/>
+<part name="C4" library="SparkFun" deviceset="CAP" device="0805" value="100n"/>
 <part name="FRAME1" library="frames" deviceset="A3L-LOC" device=""/>
-<part name="GND10" library="supply1" deviceset="GND" device=""/>
-<part name="+3V7" library="supply1" deviceset="+3V3" device=""/>
-<part name="R3" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
-<part name="R4" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
+<part name="R3" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
+<part name="R4" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
 <part name="+3V8" library="supply1" deviceset="+3V3" device=""/>
-<part name="Q1" library="crystal" deviceset="CRYSTAL" device="HC49UP" value="8M"/>
-<part name="C15" library="SparkFun" deviceset="CAP" device="0603-CAP" value="18p"/>
-<part name="C16" library="SparkFun" deviceset="CAP" device="0603-CAP" value="18p"/>
+<part name="Q1" library="crystal" deviceset="CRYSTAL" device="HC49UP" value="16Mhz"/>
+<part name="C11" library="SparkFun" deviceset="CAP" device="0805" value="18p"/>
+<part name="C12" library="SparkFun" deviceset="CAP" device="0805" value="18p"/>
 <part name="GND11" library="supply1" deviceset="GND" device=""/>
-<part name="R5" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="160"/>
-<part name="R6" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="160"/>
-<part name="R7" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="160"/>
-<part name="LED1" library="SparkFun" deviceset="LED" device="0603"/>
-<part name="LED2" library="SparkFun" deviceset="LED" device="0603"/>
-<part name="LED3" library="SparkFun" deviceset="LED" device="0603"/>
+<part name="R5" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="180"/>
+<part name="R6" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="180"/>
+<part name="R7" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="180"/>
+<part name="LED1" library="SparkFun" deviceset="LED" device="1206"/>
+<part name="LED2" library="SparkFun" deviceset="LED" device="1206"/>
+<part name="LED3" library="SparkFun" deviceset="LED" device="1206"/>
 <part name="GND12" library="supply1" deviceset="GND" device=""/>
-<part name="LED4" library="SparkFun" deviceset="LED" device="0603"/>
-<part name="R8" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="160"/>
+<part name="LED4" library="SparkFun" deviceset="LED" device="1206"/>
+<part name="R8" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="180"/>
 <part name="GND13" library="supply1" deviceset="GND" device=""/>
 <part name="P+6" library="supply1" deviceset="+5V" device=""/>
-<part name="Q2" library="crystal" deviceset="CRYSTAL" device="HC49UP" value="8M"/>
-<part name="C17" library="SparkFun" deviceset="CAP" device="0603-CAP" value="18p"/>
-<part name="C18" library="SparkFun" deviceset="CAP" device="0603-CAP" value="18p"/>
-<part name="GND14" library="supply1" deviceset="GND" device=""/>
 <part name="+3V9" library="supply1" deviceset="+3V3" device=""/>
 <part name="GND15" library="supply1" deviceset="GND" device=""/>
-<part name="R9" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="5k"/>
-<part name="R10" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
+<part name="R9" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="5k"/>
+<part name="R10" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
 <part name="GND16" library="supply1" deviceset="GND" device=""/>
 <part name="P+7" library="supply1" deviceset="+5V" device=""/>
 <part name="GND17" library="supply1" deviceset="GND" device=""/>
@@ -8376,57 +10477,84 @@ Source: 008-0260-0_E.pdf</description>
 <part name="P+19" library="supply1" deviceset="+5V" device=""/>
 <part name="GND31" library="supply1" deviceset="GND" device=""/>
 <part name="GND33" library="supply1" deviceset="GND" device=""/>
-<part name="GND34" library="supply1" deviceset="GND" device=""/>
 <part name="GND35" library="supply1" deviceset="GND" device=""/>
 <part name="GND37" library="supply1" deviceset="GND" device=""/>
 <part name="GND39" library="supply1" deviceset="GND" device=""/>
 <part name="+3V11" library="supply1" deviceset="+3V3" device=""/>
 <part name="P+20" library="supply1" deviceset="+5V" device=""/>
-<part name="R11" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="100"/>
-<part name="R12" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="100"/>
 <part name="+3V12" library="supply1" deviceset="+3V3" device=""/>
 <part name="GND38" library="supply1" deviceset="GND" device=""/>
 <part name="+3V13" library="supply1" deviceset="+3V3" device=""/>
-<part name="R13" library="SparkFun" deviceset="RESISTOR" device="0603-RES" value="10k"/>
+<part name="R13" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
 <part name="GND40" library="supply1" deviceset="GND" device=""/>
 <part name="P+9" library="supply1" deviceset="+5V" device=""/>
+<part name="IC4" library="atmel" deviceset="MEGA1284" device="-A" value="M1284"/>
+<part name="+3V5" library="supply1" deviceset="+3V3" device=""/>
+<part name="GND8" library="supply1" deviceset="GND" device=""/>
+<part name="GND32" library="supply1" deviceset="GND" device=""/>
+<part name="+3V14" library="supply1" deviceset="+3V3" device=""/>
+<part name="D1" library="SparkFun" deviceset="DIODE" device="SOD"/>
+<part name="R12" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
+<part name="+3V1" library="supply1" deviceset="+3V3" device=""/>
+<part name="R2" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
+<part name="D2" library="SparkFun" deviceset="DIODE" device="SOD"/>
+<part name="SG1" library="SparkFun" deviceset="BUZZER" device="NS"/>
+<part name="T1" library="SparkFun" deviceset="TRANSISTOR_NPN" device="SOT23-3"/>
+<part name="R1" library="pot" deviceset="TRIM_EU-" device="3223J" value="200"/>
+<part name="R11" library="SparkFun" deviceset="RESISTOR" device="0805-RES" value="10k"/>
+<part name="GND1" library="supply1" deviceset="GND" device=""/>
+<part name="P+21" library="supply1" deviceset="+5V" device=""/>
+<part name="IC5" library="SparkFun" deviceset="V_REG_LM1117" device="SOT223"/>
+<part name="C3" library="rcl" deviceset="C-US" device="C1206" value="10u"/>
+<part name="GND5" library="supply1" deviceset="GND" device=""/>
+<part name="P+22" library="supply1" deviceset="+5V" device=""/>
 </parts>
 <sheets>
 <sheet>
 <plain>
-<text x="40.64" y="241.3" size="1.778" layer="91">Todos</text>
-<text x="35.56" y="236.22" size="1.778" layer="91">trous de fixation ?</text>
-<text x="35.56" y="231.14" size="1.778" layer="91">0603 -&gt; 0805</text>
-<text x="35.56" y="233.68" size="1.778" layer="91">pullup sur jtag ?</text>
-<text x="35.56" y="228.6" size="1.778" layer="91">Voir checklist xmega atmel</text>
-<text x="35.56" y="223.52" size="1.778" layer="91">reset interne ? voir PDI sur la checklist</text>
-<text x="35.56" y="226.06" size="1.778" layer="91">xmega A3 est-il programmable avec pdi / jtag ?</text>
-<text x="35.56" y="220.98" size="1.778" layer="91">8Mhz pour les 2 quartz ?</text>
+<text x="147.32" y="55.88" size="1.778" layer="91">SPI level adaptation + Z-state when programming</text>
+<text x="281.94" y="96.52" size="1.778" layer="91">To debug board</text>
+<text x="236.22" y="96.52" size="1.778" layer="91">To debug board</text>
+<text x="251.46" y="157.48" size="1.778" layer="91">To extension boards</text>
+<text x="276.86" y="274.32" size="1.778" layer="91">Input servos</text>
+<text x="236.22" y="274.32" size="1.778" layer="91">Output servos</text>
+<text x="132.08" y="200.66" size="1.778" layer="91">atmega168 generates servo signals</text>
+<text x="-12.7" y="83.82" size="1.778" layer="91">atmega1284 is the main uP</text>
+<text x="-12.7" y="81.28" size="1.778" layer="91">it communicates with xbee (uart),</text>
+<text x="-12.7" y="78.74" size="1.778" layer="91">atmega168 (spi) and ext boards (i2c)</text>
+<text x="106.68" y="48.26" size="1.778" layer="91">xbee 868Mhz</text>
+<text x="66.04" y="154.94" size="1.778" layer="91">debug LEDSs</text>
+<text x="-60.96" y="205.74" size="1.778" layer="91">Test points</text>
+<text x="-68.58" y="266.7" size="1.778" layer="91">Power input</text>
+<text x="27.94" y="264.16" size="1.778" layer="91">regulator</text>
+<text x="48.26" y="256.54" size="1.778" layer="91">decoupling for mega168</text>
+<text x="-48.26" y="45.72" size="1.778" layer="91">decoupling for mega1284</text>
+<text x="-68.58" y="264.16" size="1.778" layer="91">5V -&gt; bypass the regulator</text>
+<text x="-68.58" y="261.62" size="1.778" layer="91">or battery</text>
 </plain>
 <instances>
-<instance part="XB1" gate="G$1" x="127" y="114.3"/>
-<instance part="U$1" gate="G$1" x="-2.54" y="134.62"/>
+<instance part="XB1" gate="G$1" x="111.76" y="88.9"/>
 <instance part="IC1" gate="1" x="149.86" y="243.84"/>
-<instance part="IC2" gate="A" x="182.88" y="111.76"/>
-<instance part="IC2" gate="B" x="182.88" y="91.44"/>
-<instance part="IC2" gate="C" x="182.88" y="71.12"/>
-<instance part="IC2" gate="P" x="220.98" y="81.28"/>
-<instance part="X1" gate="-1" x="243.84" y="144.78"/>
-<instance part="X1" gate="-2" x="243.84" y="142.24"/>
-<instance part="X1" gate="-3" x="243.84" y="139.7"/>
-<instance part="X1" gate="-4" x="243.84" y="137.16"/>
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-<instance part="X1" gate="-7" x="243.84" y="129.54"/>
-<instance part="X1" gate="-8" x="243.84" y="127"/>
-<instance part="X1" gate="-9" x="243.84" y="124.46"/>
-<instance part="X1" gate="-10" x="243.84" y="121.92"/>
-<instance part="X1" gate="-11" x="243.84" y="119.38"/>
-<instance part="X1" gate="-12" x="243.84" y="116.84"/>
-<instance part="X1" gate="-13" x="243.84" y="114.3"/>
-<instance part="X1" gate="-14" x="243.84" y="111.76"/>
-<instance part="X1" gate="-15" x="243.84" y="109.22"/>
-<instance part="X1" gate="-16" x="243.84" y="106.68"/>
+<instance part="IC2" gate="A" x="177.8" y="127"/>
+<instance part="IC2" gate="B" x="177.8" y="106.68"/>
+<instance part="IC2" gate="C" x="177.8" y="86.36"/>
+<instance part="IC2" gate="P" x="177.8" y="162.56"/>
+<instance part="X1" gate="-1" x="248.92" y="144.78"/>
+<instance part="X1" gate="-2" x="248.92" y="142.24"/>
+<instance part="X1" gate="-3" x="248.92" y="139.7"/>
+<instance part="X1" gate="-4" x="248.92" y="137.16"/>
+<instance part="X1" gate="-5" x="248.92" y="134.62"/>
+<instance part="X1" gate="-6" x="248.92" y="132.08"/>
+<instance part="X1" gate="-7" x="248.92" y="129.54"/>
+<instance part="X1" gate="-8" x="248.92" y="127"/>
+<instance part="X1" gate="-9" x="248.92" y="124.46"/>
+<instance part="X1" gate="-10" x="248.92" y="121.92"/>
+<instance part="X1" gate="-11" x="248.92" y="119.38"/>
+<instance part="X1" gate="-12" x="248.92" y="116.84"/>
+<instance part="X1" gate="-13" x="248.92" y="114.3"/>
+<instance part="X1" gate="-14" x="248.92" y="111.76"/>
+<instance part="X1" gate="-15" x="248.92" y="109.22"/>
+<instance part="X1" gate="-16" x="248.92" y="106.68"/>
 <instance part="X2" gate="-1" x="297.18" y="144.78"/>
 <instance part="X2" gate="-2" x="297.18" y="142.24"/>
 <instance part="X2" gate="-3" x="297.18" y="139.7"/>
@@ -8457,96 +10585,76 @@ Source: 008-0260-0_E.pdf</description>
 <instance part="JP12" gate="G$1" x="271.78" y="226.06"/>
 <instance part="JP13" gate="G$1" x="271.78" y="213.36"/>
 <instance part="JP14" gate="G$1" x="271.78" y="200.66"/>
-<instance part="IC3" gate="G$1" x="-25.4" y="281.94"/>
+<instance part="IC3" gate="G$1" x="20.32" y="284.48"/>
 <instance part="JP15" gate="G$1" x="-66.04" y="276.86"/>
-<instance part="JP16" gate="G$1" x="-66.04" y="254"/>
-<instance part="JP17" gate="G$1" x="-66.04" y="241.3"/>
-<instance part="JP18" gate="G$1" x="-66.04" y="228.6"/>
-<instance part="JP19" gate="G$1" x="-66.04" y="215.9"/>
-<instance part="JP20" gate="G$1" x="-66.04" y="203.2"/>
-<instance part="P+2" gate="1" x="-53.34" y="287.02"/>
+<instance part="JP16" gate="G$1" x="-60.96" y="241.3"/>
+<instance part="JP17" gate="G$1" x="-60.96" y="228.6"/>
+<instance part="JP18" gate="G$1" x="-60.96" y="215.9"/>
 <instance part="GND2" gate="1" x="-53.34" y="271.78"/>
-<instance part="P+3" gate="1" x="-38.1" y="287.02"/>
-<instance part="+3V2" gate="G$1" x="-12.7" y="287.02"/>
-<instance part="GND3" gate="1" x="-25.4" y="261.62"/>
-<instance part="C1" gate="G$1" x="-38.1" y="274.32"/>
-<instance part="C2" gate="G$1" x="-12.7" y="274.32"/>
-<instance part="+3V3" gate="G$1" x="-53.34" y="259.08"/>
-<instance part="GND4" gate="1" x="-50.8" y="238.76"/>
-<instance part="P+4" gate="1" x="-55.88" y="233.68"/>
-<instance part="+3V1" gate="G$1" x="15.24" y="248.92"/>
-<instance part="GND1" gate="1" x="0" y="228.6"/>
-<instance part="R1" gate="G$1" x="10.16" y="241.3" rot="R180"/>
-<instance part="C3" gate="G$1" x="0" y="238.76" rot="R180"/>
-<instance part="GND5" gate="1" x="93.98" y="208.28"/>
-<instance part="R2" gate="G$1" x="104.14" y="220.98" rot="R180"/>
-<instance part="C4" gate="G$1" x="93.98" y="218.44" rot="R180"/>
-<instance part="P+1" gate="1" x="109.22" y="228.6"/>
-<instance part="P+5" gate="1" x="86.36" y="287.02"/>
-<instance part="GND6" gate="1" x="96.52" y="261.62"/>
-<instance part="C5" gate="G$1" x="86.36" y="274.32" rot="R180"/>
-<instance part="C6" gate="G$1" x="96.52" y="274.32" rot="R180"/>
+<instance part="P+3" gate="1" x="7.62" y="289.56"/>
+<instance part="+3V2" gate="G$1" x="33.02" y="289.56"/>
+<instance part="GND3" gate="1" x="20.32" y="264.16"/>
+<instance part="C1" gate="G$1" x="7.62" y="276.86"/>
+<instance part="C2" gate="G$1" x="33.02" y="276.86"/>
+<instance part="+3V3" gate="G$1" x="-48.26" y="246.38"/>
+<instance part="GND4" gate="1" x="-45.72" y="226.06"/>
+<instance part="P+4" gate="1" x="-50.8" y="220.98"/>
+<instance part="P+1" gate="1" x="116.84" y="289.56"/>
+<instance part="P+5" gate="1" x="55.88" y="289.56"/>
+<instance part="GND6" gate="1" x="66.04" y="264.16"/>
+<instance part="C5" gate="G$1" x="55.88" y="276.86" rot="R180"/>
+<instance part="C6" gate="G$1" x="66.04" y="276.86" rot="R180"/>
 <instance part="+3V4" gate="G$1" x="-60.96" y="73.66"/>
 <instance part="GND7" gate="1" x="-60.96" y="45.72"/>
 <instance part="C7" gate="G$1" x="-60.96" y="60.96" rot="R180"/>
 <instance part="C8" gate="G$1" x="-53.34" y="60.96" rot="R180"/>
 <instance part="C9" gate="G$1" x="-45.72" y="60.96" rot="R180"/>
 <instance part="C10" gate="G$1" x="-38.1" y="60.96" rot="R180"/>
-<instance part="C12" gate="G$1" x="-22.86" y="60.96" rot="R180"/>
-<instance part="+3V6" gate="G$1" x="93.98" y="99.06"/>
-<instance part="GND9" gate="1" x="93.98" y="78.74"/>
-<instance part="C14" gate="G$1" x="93.98" y="88.9" rot="R180"/>
+<instance part="+3V6" gate="G$1" x="78.74" y="73.66"/>
+<instance part="GND9" gate="1" x="78.74" y="53.34"/>
+<instance part="C4" gate="G$1" x="78.74" y="63.5" rot="R180"/>
 <instance part="FRAME1" gate="G$1" x="-76.2" y="35.56"/>
-<instance part="GND10" gate="1" x="2.54" y="63.5"/>
-<instance part="+3V7" gate="G$1" x="50.8" y="106.68" rot="R270"/>
-<instance part="R3" gate="G$1" x="-55.88" y="132.08" rot="R180"/>
-<instance part="R4" gate="G$1" x="-63.5" y="129.54" rot="R180"/>
-<instance part="+3V8" gate="G$1" x="-68.58" y="144.78"/>
-<instance part="Q1" gate="G$1" x="-53.34" y="93.98" smashed="yes" rot="R90">
-<attribute name="NAME" x="-55.88" y="95.504" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="-50.8" y="96.52" size="1.778" layer="96" rot="R90"/>
+<instance part="R3" gate="G$1" x="48.26" y="119.38" rot="MR180"/>
+<instance part="R4" gate="G$1" x="55.88" y="116.84" rot="MR180"/>
+<instance part="+3V8" gate="G$1" x="60.96" y="132.08" rot="MR0"/>
+<instance part="Q1" gate="G$1" x="-50.8" y="170.18" smashed="yes" rot="R90">
+<attribute name="NAME" x="-53.34" y="171.704" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="-45.72" y="167.64" size="1.778" layer="96" rot="R90"/>
 </instance>
-<instance part="C15" gate="G$1" x="-53.34" y="86.36" rot="R180"/>
-<instance part="C16" gate="G$1" x="-63.5" y="86.36" rot="R180"/>
-<instance part="GND11" gate="1" x="-58.42" y="78.74"/>
-<instance part="R5" gate="G$1" x="43.18" y="180.34" smashed="yes" rot="R180">
-<attribute name="NAME" x="49.53" y="181.3814" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="39.37" y="181.102" size="1.778" layer="96" rot="R180"/>
+<instance part="C11" gate="G$1" x="-50.8" y="162.56" rot="R180"/>
+<instance part="C12" gate="G$1" x="-60.96" y="162.56" rot="R180"/>
+<instance part="GND11" gate="1" x="-55.88" y="154.94"/>
+<instance part="R5" gate="G$1" x="55.88" y="167.64" smashed="yes" rot="R180">
+<attribute name="NAME" x="62.23" y="168.6814" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="52.07" y="168.402" size="1.778" layer="96" rot="R180"/>
 </instance>
-<instance part="R6" gate="G$1" x="43.18" y="177.8" smashed="yes" rot="R180">
-<attribute name="NAME" x="49.53" y="178.8414" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="39.37" y="178.562" size="1.778" layer="96" rot="R180"/>
+<instance part="R6" gate="G$1" x="55.88" y="165.1" smashed="yes" rot="R180">
+<attribute name="NAME" x="62.23" y="166.1414" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="52.07" y="165.862" size="1.778" layer="96" rot="R180"/>
 </instance>
-<instance part="R7" gate="G$1" x="43.18" y="175.26" smashed="yes" rot="R180">
-<attribute name="NAME" x="49.53" y="176.3014" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="39.37" y="176.022" size="1.778" layer="96" rot="R180"/>
+<instance part="R7" gate="G$1" x="55.88" y="162.56" smashed="yes" rot="R180">
+<attribute name="NAME" x="62.23" y="163.6014" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="52.07" y="163.322" size="1.778" layer="96" rot="R180"/>
 </instance>
-<instance part="LED1" gate="G$1" x="53.34" y="180.34" smashed="yes" rot="R90">
-<attribute name="NAME" x="57.912" y="183.896" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="57.912" y="186.055" size="1.778" layer="96" rot="R180"/>
+<instance part="LED1" gate="G$1" x="66.04" y="167.64" smashed="yes" rot="R90">
+<attribute name="NAME" x="70.612" y="171.196" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="70.612" y="173.355" size="1.778" layer="96" rot="R180"/>
 </instance>
-<instance part="LED2" gate="G$1" x="60.96" y="177.8" rot="R90"/>
-<instance part="LED3" gate="G$1" x="68.58" y="175.26" rot="R90"/>
-<instance part="GND12" gate="1" x="76.2" y="167.64"/>
-<instance part="LED4" gate="G$1" x="68.58" y="195.58" rot="R90"/>
-<instance part="R8" gate="G$1" x="55.88" y="195.58" smashed="yes" rot="R180">
-<attribute name="NAME" x="57.15" y="194.0814" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="57.15" y="198.882" size="1.778" layer="96" rot="R180"/>
+<instance part="LED2" gate="G$1" x="73.66" y="165.1" rot="R90"/>
+<instance part="LED3" gate="G$1" x="81.28" y="162.56" rot="R90"/>
+<instance part="GND12" gate="1" x="88.9" y="154.94"/>
+<instance part="LED4" gate="G$1" x="81.28" y="182.88" rot="R90"/>
+<instance part="R8" gate="G$1" x="68.58" y="182.88" smashed="yes" rot="R180">
+<attribute name="NAME" x="69.85" y="181.3814" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="69.85" y="186.182" size="1.778" layer="96" rot="R180"/>
 </instance>
 <instance part="GND13" gate="1" x="116.84" y="205.74"/>
 <instance part="P+6" gate="1" x="114.3" y="248.92"/>
-<instance part="Q2" gate="G$1" x="116.84" y="254" smashed="yes" rot="R90">
-<attribute name="NAME" x="114.3" y="255.524" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="119.38" y="256.54" size="1.778" layer="96" rot="R90"/>
-</instance>
-<instance part="C17" gate="G$1" x="106.68" y="246.38" rot="R180"/>
-<instance part="C18" gate="G$1" x="99.06" y="246.38" rot="R180"/>
-<instance part="GND14" gate="1" x="101.6" y="236.22"/>
-<instance part="+3V9" gate="G$1" x="106.68" y="144.78"/>
-<instance part="GND15" gate="1" x="109.22" y="78.74"/>
-<instance part="R9" gate="G$1" x="177.8" y="154.94" rot="R270"/>
-<instance part="R10" gate="G$1" x="177.8" y="139.7" rot="R270"/>
-<instance part="GND16" gate="1" x="177.8" y="129.54"/>
+<instance part="+3V9" gate="G$1" x="91.44" y="119.38"/>
+<instance part="GND15" gate="1" x="93.98" y="53.34"/>
+<instance part="R9" gate="G$1" x="160.02" y="172.72" rot="R270"/>
+<instance part="R10" gate="G$1" x="160.02" y="157.48" rot="R270"/>
+<instance part="GND16" gate="1" x="160.02" y="147.32"/>
 <instance part="P+7" gate="1" x="256.54" y="269.24"/>
 <instance part="GND17" gate="1" x="243.84" y="259.08"/>
 <instance part="P+8" gate="1" x="256.54" y="256.54"/>
@@ -8572,67 +10680,68 @@ Source: 008-0260-0_E.pdf</description>
 <instance part="GND28" gate="1" x="284.48" y="195.58"/>
 <instance part="GND29" gate="1" x="246.38" y="157.48"/>
 <instance part="GND30" gate="1" x="281.94" y="157.48"/>
-<instance part="+3V10" gate="G$1" x="248.92" y="185.42"/>
-<instance part="P+19" gate="1" x="284.48" y="185.42"/>
+<instance part="+3V10" gate="G$1" x="281.94" y="187.96"/>
+<instance part="P+19" gate="1" x="246.38" y="187.96"/>
 <instance part="GND31" gate="1" x="256.54" y="167.64"/>
-<instance part="GND33" gate="1" x="215.9" y="121.92"/>
-<instance part="GND34" gate="1" x="228.6" y="114.3"/>
-<instance part="GND35" gate="1" x="228.6" y="104.14"/>
+<instance part="GND33" gate="1" x="220.98" y="121.92"/>
+<instance part="GND35" gate="1" x="233.68" y="104.14"/>
 <instance part="GND37" gate="1" x="274.32" y="121.92"/>
 <instance part="GND39" gate="1" x="284.48" y="104.14"/>
-<instance part="+3V11" gate="G$1" x="236.22" y="147.32"/>
+<instance part="+3V11" gate="G$1" x="241.3" y="147.32"/>
 <instance part="P+20" gate="1" x="289.56" y="147.32"/>
-<instance part="R11" gate="G$1" x="284.48" y="114.3" smashed="yes">
-<attribute name="NAME" x="288.29" y="113.2586" size="1.778" layer="95"/>
-<attribute name="VALUE" x="278.13" y="113.538" size="1.778" layer="96"/>
-</instance>
-<instance part="R12" gate="G$1" x="284.48" y="109.22" smashed="yes">
-<attribute name="NAME" x="288.29" y="108.1786" size="1.778" layer="95"/>
-<attribute name="VALUE" x="278.13" y="108.458" size="1.778" layer="96"/>
-</instance>
-<instance part="+3V12" gate="G$1" x="220.98" y="96.52"/>
-<instance part="GND38" gate="1" x="220.98" y="68.58"/>
-<instance part="+3V13" gate="G$1" x="104.14" y="96.52"/>
-<instance part="R13" gate="G$1" x="101.6" y="137.16"/>
-<instance part="GND40" gate="1" x="91.44" y="137.16" rot="R270"/>
+<instance part="+3V12" gate="G$1" x="177.8" y="177.8"/>
+<instance part="GND38" gate="1" x="177.8" y="149.86"/>
+<instance part="+3V13" gate="G$1" x="88.9" y="71.12"/>
+<instance part="R13" gate="G$1" x="86.36" y="111.76"/>
+<instance part="GND40" gate="1" x="76.2" y="111.76" rot="R270"/>
 <instance part="P+9" gate="1" x="256.54" y="243.84"/>
+<instance part="IC4" gate="G$1" x="-7.62" y="137.16"/>
+<instance part="+3V5" gate="G$1" x="-43.18" y="157.48" rot="MR0"/>
+<instance part="GND8" gate="1" x="-43.18" y="134.62"/>
+<instance part="GND32" gate="1" x="-33.02" y="154.94"/>
+<instance part="+3V14" gate="G$1" x="-33.02" y="165.1" rot="MR0"/>
+<instance part="D1" gate="G$1" x="-38.1" y="180.34" rot="MR0"/>
+<instance part="R12" gate="G$1" x="-33.02" y="187.96" rot="R90"/>
+<instance part="+3V1" gate="G$1" x="-33.02" y="198.12" rot="MR0"/>
+<instance part="R2" gate="G$1" x="116.84" y="279.4" rot="R90"/>
+<instance part="D2" gate="G$1" x="111.76" y="271.78" rot="MR0"/>
+<instance part="IC2" gate="D" x="177.8" y="66.04"/>
+<instance part="SG1" gate="G$1" x="15.24" y="231.14" rot="MR0"/>
+<instance part="T1" gate="G$1" x="10.16" y="220.98"/>
+<instance part="R1" gate="1" x="27.94" y="241.3"/>
+<instance part="R11" gate="G$1" x="-2.54" y="220.98" rot="R180"/>
+<instance part="GND1" gate="1" x="12.7" y="208.28"/>
+<instance part="P+21" gate="1" x="33.02" y="254"/>
+<instance part="IC5" gate="G$1" x="-22.86" y="284.48"/>
+<instance part="C3" gate="G$1" x="-35.56" y="276.86"/>
+<instance part="GND5" gate="1" x="-22.86" y="264.16"/>
+<instance part="P+22" gate="1" x="-10.16" y="289.56"/>
 </instances>
 <busses>
 </busses>
 <nets>
 <net name="+5V" class="0">
 <segment>
-<wire x1="-58.42" y1="279.4" x2="-53.34" y2="279.4" width="0.1524" layer="91"/>
-<wire x1="-53.34" y1="279.4" x2="-53.34" y2="284.48" width="0.1524" layer="91"/>
-<pinref part="JP15" gate="G$1" pin="2"/>
-<pinref part="P+2" gate="1" pin="+5V"/>
-</segment>
-<segment>
-<wire x1="-33.02" y1="281.94" x2="-38.1" y2="281.94" width="0.1524" layer="91"/>
-<wire x1="-38.1" y1="281.94" x2="-38.1" y2="284.48" width="0.1524" layer="91"/>
-<wire x1="-38.1" y1="281.94" x2="-38.1" y2="276.86" width="0.1524" layer="91"/>
-<junction x="-38.1" y="281.94"/>
+<wire x1="12.7" y1="284.48" x2="7.62" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="284.48" x2="7.62" y2="287.02" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="284.48" x2="7.62" y2="279.4" width="0.1524" layer="91"/>
+<junction x="7.62" y="284.48"/>
 <pinref part="IC3" gate="G$1" pin="IN"/>
 <pinref part="P+3" gate="1" pin="+5V"/>
 <pinref part="C1" gate="G$1" pin="1"/>
 </segment>
 <segment>
-<wire x1="-58.42" y1="228.6" x2="-55.88" y2="228.6" width="0.1524" layer="91"/>
-<wire x1="-55.88" y1="228.6" x2="-55.88" y2="231.14" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="215.9" x2="-50.8" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="215.9" x2="-50.8" y2="218.44" width="0.1524" layer="91"/>
 <pinref part="JP18" gate="G$1" pin="1"/>
 <pinref part="P+4" gate="1" pin="+5V"/>
 </segment>
 <segment>
-<wire x1="109.22" y1="226.06" x2="109.22" y2="220.98" width="0.1524" layer="91"/>
-<pinref part="R2" gate="G$1" pin="1"/>
-<pinref part="P+1" gate="1" pin="+5V"/>
-</segment>
-<segment>
-<wire x1="86.36" y1="284.48" x2="86.36" y2="281.94" width="0.1524" layer="91"/>
-<wire x1="86.36" y1="281.94" x2="86.36" y2="276.86" width="0.1524" layer="91"/>
-<wire x1="86.36" y1="281.94" x2="96.52" y2="281.94" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="281.94" x2="96.52" y2="276.86" width="0.1524" layer="91"/>
-<junction x="86.36" y="281.94"/>
+<wire x1="55.88" y1="287.02" x2="55.88" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="284.48" x2="55.88" y2="279.4" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="284.48" x2="66.04" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="284.48" x2="66.04" y2="279.4" width="0.1524" layer="91"/>
+<junction x="55.88" y="284.48"/>
 <pinref part="P+5" gate="1" pin="+5V"/>
 <pinref part="C5" gate="G$1" pin="2"/>
 <pinref part="C6" gate="G$1" pin="2"/>
@@ -8652,18 +10761,13 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="IC1" gate="1" pin="AVCC"/>
 </segment>
 <segment>
-<wire x1="279.4" y1="180.34" x2="284.48" y2="180.34" width="0.1524" layer="91"/>
-<wire x1="284.48" y1="180.34" x2="284.48" y2="182.88" width="0.1524" layer="91"/>
-<pinref part="JP2" gate="G$1" pin="8"/>
-<pinref part="P+19" gate="1" pin="+5V"/>
-</segment>
-<segment>
 <wire x1="294.64" y1="144.78" x2="289.56" y2="144.78" width="0.1524" layer="91"/>
 <wire x1="289.56" y1="144.78" x2="289.56" y2="142.24" width="0.1524" layer="91"/>
 <wire x1="289.56" y1="142.24" x2="294.64" y2="142.24" width="0.1524" layer="91"/>
 <pinref part="X2" gate="-1" pin="S"/>
 <pinref part="P+20" gate="1" pin="+5V"/>
 <pinref part="X2" gate="-2" pin="S"/>
+<junction x="289.56" y="144.78"/>
 </segment>
 <segment>
 <wire x1="297.18" y1="203.2" x2="297.18" y2="200.66" width="0.1524" layer="91"/>
@@ -8737,6 +10841,28 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="JP5" gate="G$1" pin="2"/>
 <pinref part="P+9" gate="1" pin="+5V"/>
 </segment>
+<segment>
+<pinref part="R2" gate="G$1" pin="2"/>
+<pinref part="P+1" gate="1" pin="+5V"/>
+<wire x1="116.84" y1="284.48" x2="116.84" y2="287.02" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="R1" gate="1" pin="S"/>
+<pinref part="P+21" gate="1" pin="+5V"/>
+<wire x1="33.02" y1="241.3" x2="33.02" y2="251.46" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="IC5" gate="G$1" pin="OUT"/>
+<pinref part="P+22" gate="1" pin="+5V"/>
+<wire x1="-15.24" y1="284.48" x2="-10.16" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="284.48" x2="-10.16" y2="287.02" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="JP1" gate="G$1" pin="8"/>
+<pinref part="P+19" gate="1" pin="+5V"/>
+<wire x1="243.84" y1="180.34" x2="246.38" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="180.34" x2="246.38" y2="185.42" width="0.1524" layer="91"/>
+</segment>
 </net>
 <net name="GND" class="0">
 <segment>
@@ -8746,39 +10872,29 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="GND2" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="-25.4" y1="274.32" x2="-25.4" y2="266.7" width="0.1524" layer="91"/>
-<wire x1="-25.4" y1="266.7" x2="-25.4" y2="264.16" width="0.1524" layer="91"/>
-<wire x1="-25.4" y1="266.7" x2="-38.1" y2="266.7" width="0.1524" layer="91"/>
-<wire x1="-38.1" y1="266.7" x2="-38.1" y2="269.24" width="0.1524" layer="91"/>
-<wire x1="-25.4" y1="266.7" x2="-12.7" y2="266.7" width="0.1524" layer="91"/>
-<wire x1="-12.7" y1="266.7" x2="-12.7" y2="269.24" width="0.1524" layer="91"/>
-<junction x="-25.4" y="266.7"/>
+<wire x1="20.32" y1="276.86" x2="20.32" y2="269.24" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="269.24" x2="20.32" y2="266.7" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="269.24" x2="7.62" y2="269.24" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="269.24" x2="7.62" y2="271.78" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="269.24" x2="33.02" y2="269.24" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="269.24" x2="33.02" y2="271.78" width="0.1524" layer="91"/>
+<junction x="20.32" y="269.24"/>
 <pinref part="IC3" gate="G$1" pin="ADJ"/>
 <pinref part="GND3" gate="1" pin="GND"/>
 <pinref part="C1" gate="G$1" pin="2"/>
 <pinref part="C2" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="-58.42" y1="241.3" x2="-50.8" y2="241.3" width="0.1524" layer="91"/>
-<pinref part="JP17" gate="G$1" pin="1"/>
-<pinref part="GND4" gate="1" pin="GND"/>
-</segment>
-<segment>
-<wire x1="0" y1="233.68" x2="0" y2="231.14" width="0.1524" layer="91"/>
-<pinref part="C3" gate="G$1" pin="1"/>
-<pinref part="GND1" gate="1" pin="GND"/>
-</segment>
-<segment>
-<wire x1="93.98" y1="213.36" x2="93.98" y2="210.82" width="0.1524" layer="91"/>
-<pinref part="C4" gate="G$1" pin="1"/>
-<pinref part="GND5" gate="1" pin="GND"/>
+<wire x1="-53.34" y1="228.6" x2="-45.72" y2="228.6" width="0.1524" layer="91"/>
+<pinref part="JP17" gate="G$1" pin="1"/>
+<pinref part="GND4" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="96.52" y1="269.24" x2="96.52" y2="266.7" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="266.7" x2="96.52" y2="264.16" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="266.7" x2="86.36" y2="266.7" width="0.1524" layer="91"/>
-<wire x1="86.36" y1="266.7" x2="86.36" y2="269.24" width="0.1524" layer="91"/>
-<junction x="96.52" y="266.7"/>
+<wire x1="66.04" y1="271.78" x2="66.04" y2="269.24" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="269.24" x2="66.04" y2="266.7" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="269.24" x2="55.88" y2="269.24" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="269.24" x2="55.88" y2="271.78" width="0.1524" layer="91"/>
+<junction x="66.04" y="269.24"/>
 <pinref part="C6" gate="G$1" pin="1"/>
 <pinref part="GND6" gate="1" pin="GND"/>
 <pinref part="C5" gate="G$1" pin="1"/>
@@ -8792,22 +10908,18 @@ Source: 008-0260-0_E.pdf</description>
 <wire x1="-45.72" y1="53.34" x2="-45.72" y2="55.88" width="0.1524" layer="91"/>
 <wire x1="-45.72" y1="53.34" x2="-38.1" y2="53.34" width="0.1524" layer="91"/>
 <wire x1="-38.1" y1="53.34" x2="-38.1" y2="55.88" width="0.1524" layer="91"/>
-<wire x1="-38.1" y1="53.34" x2="-22.86" y2="53.34" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="53.34" x2="-22.86" y2="55.88" width="0.1524" layer="91"/>
 <junction x="-53.34" y="53.34"/>
 <junction x="-45.72" y="53.34"/>
-<junction x="-38.1" y="53.34"/>
 <junction x="-60.96" y="53.34"/>
 <pinref part="C7" gate="G$1" pin="1"/>
 <pinref part="GND7" gate="1" pin="GND"/>
 <pinref part="C8" gate="G$1" pin="1"/>
 <pinref part="C9" gate="G$1" pin="1"/>
 <pinref part="C10" gate="G$1" pin="1"/>
-<pinref part="C12" gate="G$1" pin="1"/>
 </segment>
 <segment>
-<wire x1="93.98" y1="83.82" x2="93.98" y2="81.28" width="0.1524" layer="91"/>
-<pinref part="C14" gate="G$1" pin="1"/>
+<wire x1="78.74" y1="58.42" x2="78.74" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="C4" gate="G$1" pin="1"/>
 <pinref part="GND9" gate="1" pin="GND"/>
 </segment>
 <segment>
@@ -8825,23 +10937,13 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="IC1" gate="1" pin="AGND"/>
 </segment>
 <segment>
-<wire x1="99.06" y1="241.3" x2="99.06" y2="238.76" width="0.1524" layer="91"/>
-<wire x1="99.06" y1="238.76" x2="101.6" y2="238.76" width="0.1524" layer="91"/>
-<wire x1="101.6" y1="238.76" x2="106.68" y2="238.76" width="0.1524" layer="91"/>
-<wire x1="106.68" y1="238.76" x2="106.68" y2="241.3" width="0.1524" layer="91"/>
-<junction x="101.6" y="238.76"/>
-<pinref part="C18" gate="G$1" pin="1"/>
-<pinref part="C17" gate="G$1" pin="1"/>
-<pinref part="GND14" gate="1" pin="GND"/>
-</segment>
-<segment>
-<wire x1="111.76" y1="86.36" x2="109.22" y2="86.36" width="0.1524" layer="91"/>
-<wire x1="109.22" y1="86.36" x2="109.22" y2="81.28" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="60.96" x2="93.98" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="93.98" y1="60.96" x2="93.98" y2="55.88" width="0.1524" layer="91"/>
 <pinref part="XB1" gate="G$1" pin="GND"/>
 <pinref part="GND15" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="177.8" y1="132.08" x2="177.8" y2="134.62" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="149.86" x2="160.02" y2="152.4" width="0.1524" layer="91"/>
 <pinref part="GND16" gate="1" pin="GND"/>
 <pinref part="R10" gate="G$1" pin="2"/>
 </segment>
@@ -8863,17 +10965,17 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="GND31" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="215.9" y1="124.46" x2="241.3" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="220.98" y1="124.46" x2="226.06" y2="124.46" width="0.1524" layer="91"/>
 <pinref part="GND33" gate="1" pin="GND"/>
 <pinref part="X1" gate="-9" pin="S"/>
-</segment>
-<segment>
-<wire x1="228.6" y1="116.84" x2="241.3" y2="116.84" width="0.1524" layer="91"/>
-<pinref part="GND34" gate="1" pin="GND"/>
+<wire x1="226.06" y1="124.46" x2="246.38" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="116.84" x2="246.38" y2="116.84" width="0.1524" layer="91"/>
 <pinref part="X1" gate="-12" pin="S"/>
+<wire x1="226.06" y1="116.84" x2="226.06" y2="124.46" width="0.1524" layer="91"/>
+<junction x="226.06" y="124.46"/>
 </segment>
 <segment>
-<wire x1="228.6" y1="106.68" x2="241.3" y2="106.68" width="0.1524" layer="91"/>
+<wire x1="233.68" y1="106.68" x2="246.38" y2="106.68" width="0.1524" layer="91"/>
 <pinref part="GND35" gate="1" pin="GND"/>
 <pinref part="X1" gate="-16" pin="S"/>
 </segment>
@@ -8893,22 +10995,22 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="X2" gate="-16" pin="S"/>
 </segment>
 <segment>
-<wire x1="220.98" y1="71.12" x2="220.98" y2="73.66" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="152.4" x2="177.8" y2="154.94" width="0.1524" layer="91"/>
 <pinref part="IC2" gate="P" pin="GND"/>
 <pinref part="GND38" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="73.66" y1="195.58" x2="76.2" y2="195.58" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="195.58" x2="76.2" y2="180.34" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="180.34" x2="76.2" y2="177.8" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="177.8" x2="76.2" y2="175.26" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="175.26" x2="76.2" y2="170.18" width="0.1524" layer="91"/>
-<wire x1="73.66" y1="175.26" x2="76.2" y2="175.26" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="177.8" x2="76.2" y2="177.8" width="0.1524" layer="91"/>
-<wire x1="58.42" y1="180.34" x2="76.2" y2="180.34" width="0.1524" layer="91"/>
-<junction x="76.2" y="180.34"/>
-<junction x="76.2" y="177.8"/>
-<junction x="76.2" y="175.26"/>
+<wire x1="86.36" y1="182.88" x2="88.9" y2="182.88" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="182.88" x2="88.9" y2="167.64" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="167.64" x2="88.9" y2="165.1" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="165.1" x2="88.9" y2="162.56" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="162.56" x2="88.9" y2="157.48" width="0.1524" layer="91"/>
+<wire x1="86.36" y1="162.56" x2="88.9" y2="162.56" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="165.1" x2="88.9" y2="165.1" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="167.64" x2="88.9" y2="167.64" width="0.1524" layer="91"/>
+<junction x="88.9" y="167.64"/>
+<junction x="88.9" y="165.1"/>
+<junction x="88.9" y="162.56"/>
 <pinref part="LED4" gate="G$1" pin="C"/>
 <pinref part="GND12" gate="1" pin="GND"/>
 <pinref part="LED3" gate="G$1" pin="C"/>
@@ -8916,44 +11018,19 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="LED1" gate="G$1" pin="C"/>
 </segment>
 <segment>
-<wire x1="-63.5" y1="81.28" x2="-58.42" y2="81.28" width="0.1524" layer="91"/>
-<wire x1="-58.42" y1="81.28" x2="-53.34" y2="81.28" width="0.1524" layer="91"/>
-<junction x="-58.42" y="81.28"/>
-<pinref part="C16" gate="G$1" pin="1"/>
+<wire x1="-60.96" y1="157.48" x2="-55.88" y2="157.48" width="0.1524" layer="91"/>
+<wire x1="-55.88" y1="157.48" x2="-50.8" y2="157.48" width="0.1524" layer="91"/>
+<junction x="-55.88" y="157.48"/>
+<pinref part="C12" gate="G$1" pin="1"/>
 <pinref part="GND11" gate="1" pin="GND"/>
-<pinref part="C15" gate="G$1" pin="1"/>
+<pinref part="C11" gate="G$1" pin="1"/>
 </segment>
 <segment>
-<wire x1="93.98" y1="137.16" x2="96.52" y2="137.16" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="111.76" x2="81.28" y2="111.76" width="0.1524" layer="91"/>
 <pinref part="R13" gate="G$1" pin="1"/>
 <pinref part="GND40" gate="1" pin="GND"/>
 </segment>
 <segment>
-<wire x1="-5.08" y1="78.74" x2="-5.08" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="-5.08" y1="71.12" x2="-2.54" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="-2.54" y1="71.12" x2="0" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="0" y1="71.12" x2="2.54" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="2.54" y1="71.12" x2="5.08" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="71.12" x2="7.62" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="7.62" y1="71.12" x2="7.62" y2="78.74" width="0.1524" layer="91"/>
-<wire x1="2.54" y1="71.12" x2="2.54" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="-2.54" y1="78.74" x2="-2.54" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="0" y1="78.74" x2="0" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="78.74" x2="5.08" y2="71.12" width="0.1524" layer="91"/>
-<wire x1="2.54" y1="78.74" x2="2.54" y2="71.12" width="0.1524" layer="91"/>
-<junction x="-2.54" y="71.12"/>
-<junction x="0" y="71.12"/>
-<junction x="2.54" y="71.12"/>
-<junction x="5.08" y="71.12"/>
-<pinref part="U$1" gate="G$1" pin="GND@6"/>
-<pinref part="U$1" gate="G$1" pin="GND@1"/>
-<pinref part="GND10" gate="1" pin="GND"/>
-<pinref part="U$1" gate="G$1" pin="GND@5"/>
-<pinref part="U$1" gate="G$1" pin="GND@4"/>
-<pinref part="U$1" gate="G$1" pin="GND@2"/>
-<pinref part="U$1" gate="G$1" pin="GND@3"/>
-</segment>
-<segment>
 <wire x1="284.48" y1="198.12" x2="279.4" y2="198.12" width="0.1524" layer="91"/>
 <pinref part="GND28" gate="1" pin="GND"/>
 <pinref part="JP14" gate="G$1" pin="1"/>
@@ -9013,29 +11090,57 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="JP8" gate="G$1" pin="1"/>
 <pinref part="GND22" gate="1" pin="GND"/>
 </segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="GND1"/>
+<wire x1="-27.94" y1="142.24" x2="-30.48" y2="142.24" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="142.24" x2="-30.48" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="IC4" gate="G$1" pin="GND2"/>
+<wire x1="-30.48" y1="139.7" x2="-30.48" y2="137.16" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="137.16" x2="-27.94" y2="137.16" width="0.1524" layer="91"/>
+<pinref part="IC4" gate="G$1" pin="GND"/>
+<wire x1="-27.94" y1="139.7" x2="-30.48" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="GND8" gate="1" pin="GND"/>
+<wire x1="-30.48" y1="137.16" x2="-43.18" y2="137.16" width="0.1524" layer="91"/>
+<junction x="-30.48" y="139.7"/>
+<junction x="-30.48" y="137.16"/>
+</segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="AGND"/>
+<pinref part="GND32" gate="1" pin="GND"/>
+<wire x1="-27.94" y1="157.48" x2="-33.02" y2="157.48" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="T1" gate="G$1" pin="E"/>
+<pinref part="GND1" gate="1" pin="GND"/>
+<wire x1="12.7" y1="215.9" x2="12.7" y2="210.82" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="GND5" gate="1" pin="GND"/>
+<pinref part="IC5" gate="G$1" pin="ADJ"/>
+<wire x1="-22.86" y1="266.7" x2="-22.86" y2="271.78" width="0.1524" layer="91"/>
+<pinref part="C3" gate="G$1" pin="2"/>
+<wire x1="-22.86" y1="271.78" x2="-22.86" y2="276.86" width="0.1524" layer="91"/>
+<wire x1="-35.56" y1="271.78" x2="-22.86" y2="271.78" width="0.1524" layer="91"/>
+<junction x="-22.86" y="271.78"/>
+</segment>
 </net>
 <net name="+3V3" class="0">
 <segment>
-<wire x1="-12.7" y1="276.86" x2="-12.7" y2="281.94" width="0.1524" layer="91"/>
-<wire x1="-12.7" y1="281.94" x2="-12.7" y2="284.48" width="0.1524" layer="91"/>
-<wire x1="-17.78" y1="281.94" x2="-12.7" y2="281.94" width="0.1524" layer="91"/>
-<junction x="-12.7" y="281.94"/>
+<wire x1="33.02" y1="279.4" x2="33.02" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="284.48" x2="33.02" y2="287.02" width="0.1524" layer="91"/>
+<wire x1="27.94" y1="284.48" x2="33.02" y2="284.48" width="0.1524" layer="91"/>
+<junction x="33.02" y="284.48"/>
 <pinref part="+3V2" gate="G$1" pin="+3V3"/>
 <pinref part="C2" gate="G$1" pin="1"/>
 <pinref part="IC3" gate="G$1" pin="OUT"/>
 </segment>
 <segment>
-<wire x1="-58.42" y1="254" x2="-53.34" y2="254" width="0.1524" layer="91"/>
-<wire x1="-53.34" y1="254" x2="-53.34" y2="256.54" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="241.3" x2="-48.26" y2="241.3" width="0.1524" layer="91"/>
+<wire x1="-48.26" y1="241.3" x2="-48.26" y2="243.84" width="0.1524" layer="91"/>
 <pinref part="JP16" gate="G$1" pin="1"/>
 <pinref part="+3V3" gate="G$1" pin="+3V3"/>
 </segment>
 <segment>
-<wire x1="15.24" y1="246.38" x2="15.24" y2="241.3" width="0.1524" layer="91"/>
-<pinref part="+3V1" gate="G$1" pin="+3V3"/>
-<pinref part="R1" gate="G$1" pin="1"/>
-</segment>
-<segment>
 <wire x1="-60.96" y1="63.5" x2="-60.96" y2="68.58" width="0.1524" layer="91"/>
 <wire x1="-60.96" y1="71.12" x2="-60.96" y2="68.58" width="0.1524" layer="91"/>
 <wire x1="-60.96" y1="68.58" x2="-53.34" y2="68.58" width="0.1524" layer="91"/>
@@ -9044,9 +11149,6 @@ Source: 008-0260-0_E.pdf</description>
 <wire x1="-45.72" y1="68.58" x2="-45.72" y2="63.5" width="0.1524" layer="91"/>
 <wire x1="-45.72" y1="68.58" x2="-38.1" y2="68.58" width="0.1524" layer="91"/>
 <wire x1="-38.1" y1="68.58" x2="-38.1" y2="63.5" width="0.1524" layer="91"/>
-<wire x1="-38.1" y1="68.58" x2="-22.86" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="68.58" x2="-22.86" y2="63.5" width="0.1524" layer="91"/>
-<junction x="-38.1" y="68.58"/>
 <junction x="-45.72" y="68.58"/>
 <junction x="-53.34" y="68.58"/>
 <junction x="-60.96" y="68.58"/>
@@ -9055,336 +11157,247 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="C8" gate="G$1" pin="2"/>
 <pinref part="C9" gate="G$1" pin="2"/>
 <pinref part="C10" gate="G$1" pin="2"/>
-<pinref part="C12" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="93.98" y1="96.52" x2="93.98" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="71.12" x2="78.74" y2="66.04" width="0.1524" layer="91"/>
 <pinref part="+3V6" gate="G$1" pin="+3V3"/>
-<pinref part="C14" gate="G$1" pin="2"/>
-</segment>
-<segment>
-<wire x1="33.02" y1="106.68" x2="43.18" y2="106.68" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="106.68" x2="48.26" y2="106.68" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="101.6" x2="43.18" y2="101.6" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="101.6" x2="43.18" y2="106.68" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="99.06" x2="43.18" y2="99.06" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="99.06" x2="43.18" y2="101.6" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="96.52" x2="43.18" y2="96.52" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="96.52" x2="43.18" y2="99.06" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="93.98" x2="43.18" y2="93.98" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="93.98" x2="43.18" y2="96.52" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="91.44" x2="43.18" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="43.18" y1="91.44" x2="43.18" y2="93.98" width="0.1524" layer="91"/>
-<junction x="43.18" y="106.68"/>
-<junction x="43.18" y="101.6"/>
-<junction x="43.18" y="99.06"/>
-<junction x="43.18" y="96.52"/>
-<junction x="43.18" y="93.98"/>
-<pinref part="U$1" gate="G$1" pin="AVCC"/>
-<pinref part="+3V7" gate="G$1" pin="+3V3"/>
-<pinref part="U$1" gate="G$1" pin="VCC@1"/>
-<pinref part="U$1" gate="G$1" pin="VCC@2"/>
-<pinref part="U$1" gate="G$1" pin="VCC@3"/>
-<pinref part="U$1" gate="G$1" pin="VCC@4"/>
-<pinref part="U$1" gate="G$1" pin="VCC@5"/>
-</segment>
-<segment>
-<wire x1="111.76" y1="139.7" x2="106.68" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="106.68" y1="139.7" x2="106.68" y2="142.24" width="0.1524" layer="91"/>
-<pinref part="XB1" gate="G$1" pin="VCC"/>
-<pinref part="+3V9" gate="G$1" pin="+3V3"/>
+<pinref part="C4" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="243.84" y1="180.34" x2="248.92" y2="180.34" width="0.1524" layer="91"/>
-<wire x1="248.92" y1="180.34" x2="248.92" y2="182.88" width="0.1524" layer="91"/>
-<pinref part="JP1" gate="G$1" pin="8"/>
-<pinref part="+3V10" gate="G$1" pin="+3V3"/>
+<wire x1="96.52" y1="114.3" x2="91.44" y2="114.3" width="0.1524" layer="91"/>
+<wire x1="91.44" y1="114.3" x2="91.44" y2="116.84" width="0.1524" layer="91"/>
+<pinref part="XB1" gate="G$1" pin="VCC"/>
+<pinref part="+3V9" gate="G$1" pin="+3V3"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="144.78" x2="236.22" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="236.22" y1="144.78" x2="236.22" y2="142.24" width="0.1524" layer="91"/>
-<wire x1="236.22" y1="142.24" x2="241.3" y2="142.24" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="144.78" x2="241.3" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="241.3" y1="144.78" x2="241.3" y2="142.24" width="0.1524" layer="91"/>
+<wire x1="241.3" y1="142.24" x2="246.38" y2="142.24" width="0.1524" layer="91"/>
 <pinref part="X1" gate="-1" pin="S"/>
 <pinref part="+3V11" gate="G$1" pin="+3V3"/>
 <pinref part="X1" gate="-2" pin="S"/>
+<junction x="241.3" y="144.78"/>
 </segment>
 <segment>
-<wire x1="220.98" y1="93.98" x2="220.98" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="175.26" x2="177.8" y2="170.18" width="0.1524" layer="91"/>
 <pinref part="IC2" gate="P" pin="VCC"/>
 <pinref part="+3V12" gate="G$1" pin="+3V3"/>
 </segment>
 <segment>
-<wire x1="-68.58" y1="129.54" x2="-68.58" y2="132.08" width="0.1524" layer="91"/>
-<wire x1="-68.58" y1="132.08" x2="-68.58" y2="142.24" width="0.1524" layer="91"/>
-<wire x1="-60.96" y1="132.08" x2="-68.58" y2="132.08" width="0.1524" layer="91"/>
-<junction x="-68.58" y="132.08"/>
+<wire x1="60.96" y1="116.84" x2="60.96" y2="119.38" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="119.38" x2="60.96" y2="129.54" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="119.38" x2="60.96" y2="119.38" width="0.1524" layer="91"/>
+<junction x="60.96" y="119.38"/>
 <pinref part="R4" gate="G$1" pin="2"/>
 <pinref part="+3V8" gate="G$1" pin="+3V3"/>
 <pinref part="R3" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="111.76" y1="88.9" x2="104.14" y2="88.9" width="0.1524" layer="91"/>
-<wire x1="104.14" y1="88.9" x2="104.14" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="63.5" x2="88.9" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="63.5" x2="88.9" y2="68.58" width="0.1524" layer="91"/>
 <pinref part="XB1" gate="G$1" pin="VREF"/>
 <pinref part="+3V13" gate="G$1" pin="+3V3"/>
 </segment>
-</net>
-<net name="MOSI_XMEGA" class="0">
-<segment>
-<wire x1="-58.42" y1="215.9" x2="-50.8" y2="215.9" width="0.1524" layer="91"/>
-<label x="-58.42" y="218.44" size="1.778" layer="95"/>
-<pinref part="JP19" gate="G$1" pin="1"/>
-</segment>
-<segment>
-<wire x1="33.02" y1="167.64" x2="53.34" y2="167.64" width="0.1524" layer="91"/>
-<label x="35.56" y="167.64" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PD5(OC1B/XCK1/MOSI)"/>
-</segment>
-<segment>
-<wire x1="172.72" y1="111.76" x2="149.86" y2="111.76" width="0.1524" layer="91"/>
-<label x="149.86" y="111.76" size="1.778" layer="95"/>
-<pinref part="IC2" gate="A" pin="I"/>
-</segment>
-</net>
-<net name="SCK_XMEGA" class="0">
-<segment>
-<wire x1="-58.42" y1="203.2" x2="-50.8" y2="203.2" width="0.1524" layer="91"/>
-<label x="-58.42" y="205.74" size="1.778" layer="95"/>
-<pinref part="JP20" gate="G$1" pin="1"/>
-</segment>
-<segment>
-<wire x1="33.02" y1="162.56" x2="53.34" y2="162.56" width="0.1524" layer="91"/>
-<label x="35.56" y="162.56" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PD7(TXD1/SCK/CLKO/EVO)"/>
-</segment>
 <segment>
-<wire x1="172.72" y1="91.44" x2="149.86" y2="91.44" width="0.1524" layer="91"/>
-<label x="149.86" y="91.44" size="1.778" layer="95"/>
-<pinref part="IC2" gate="B" pin="I"/>
+<pinref part="IC4" gate="G$1" pin="VCC2"/>
+<wire x1="-27.94" y1="147.32" x2="-30.48" y2="147.32" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="147.32" x2="-30.48" y2="149.86" width="0.1524" layer="91"/>
+<pinref part="IC4" gate="G$1" pin="VCC1"/>
+<wire x1="-30.48" y1="149.86" x2="-30.48" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="152.4" x2="-27.94" y2="152.4" width="0.1524" layer="91"/>
+<pinref part="IC4" gate="G$1" pin="VCC"/>
+<wire x1="-27.94" y1="149.86" x2="-30.48" y2="149.86" width="0.1524" layer="91"/>
+<pinref part="+3V5" gate="G$1" pin="+3V3"/>
+<wire x1="-30.48" y1="152.4" x2="-43.18" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="-43.18" y1="152.4" x2="-43.18" y2="154.94" width="0.1524" layer="91"/>
+<junction x="-30.48" y="149.86"/>
+<junction x="-30.48" y="152.4"/>
 </segment>
-</net>
-<net name="PDI_CLK_RESET" class="0">
 <segment>
-<wire x1="5.08" y1="241.3" x2="0" y2="241.3" width="0.1524" layer="91"/>
-<wire x1="0" y1="241.3" x2="-10.16" y2="241.3" width="0.1524" layer="91"/>
-<junction x="0" y="241.3"/>
-<label x="-12.7" y="243.84" size="1.778" layer="95"/>
-<pinref part="R1" gate="G$1" pin="2"/>
-<pinref part="C3" gate="G$1" pin="2"/>
+<pinref part="IC4" gate="G$1" pin="AVCC"/>
+<pinref part="+3V14" gate="G$1" pin="+3V3"/>
+<wire x1="-27.94" y1="160.02" x2="-33.02" y2="160.02" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="160.02" x2="-33.02" y2="162.56" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="-35.56" y1="101.6" x2="-50.8" y2="101.6" width="0.1524" layer="91"/>
-<label x="-55.88" y="101.6" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PDI-CLK/!RESET"/>
+<pinref part="R12" gate="G$1" pin="2"/>
+<pinref part="+3V1" gate="G$1" pin="+3V3"/>
+<wire x1="-33.02" y1="193.04" x2="-33.02" y2="195.58" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="137.16" x2="226.06" y2="137.16" width="0.1524" layer="91"/>
-<label x="226.06" y="137.16" size="1.778" layer="95"/>
-<pinref part="X1" gate="-4" pin="S"/>
+<pinref part="JP2" gate="G$1" pin="8"/>
+<pinref part="+3V10" gate="G$1" pin="+3V3"/>
+<wire x1="279.4" y1="180.34" x2="281.94" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="281.94" y1="180.34" x2="281.94" y2="185.42" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="RESET" class="0">
-<segment>
-<wire x1="99.06" y1="220.98" x2="93.98" y2="220.98" width="0.1524" layer="91"/>
-<wire x1="93.98" y1="220.98" x2="86.36" y2="220.98" width="0.1524" layer="91"/>
-<junction x="93.98" y="220.98"/>
-<label x="86.36" y="223.52" size="1.778" layer="95"/>
-<pinref part="R2" gate="G$1" pin="2"/>
-<pinref part="C4" gate="G$1" pin="2"/>
-</segment>
-<segment>
-<wire x1="119.38" y1="271.78" x2="104.14" y2="271.78" width="0.1524" layer="91"/>
-<label x="104.14" y="271.78" size="1.778" layer="95"/>
-<pinref part="IC1" gate="1" pin="PC6(/RESET/PCINT14)"/>
-</segment>
+<net name="SCK_1284" class="0">
 <segment>
-<wire x1="182.88" y1="119.38" x2="182.88" y2="121.92" width="0.1524" layer="91"/>
-<wire x1="182.88" y1="121.92" x2="149.86" y2="121.92" width="0.1524" layer="91"/>
-<label x="149.86" y="121.92" size="1.778" layer="95"/>
-<pinref part="IC2" gate="A" pin="OE"/>
-</segment>
-<segment>
-<wire x1="182.88" y1="99.06" x2="182.88" y2="101.6" width="0.1524" layer="91"/>
-<wire x1="182.88" y1="101.6" x2="149.86" y2="101.6" width="0.1524" layer="91"/>
-<label x="149.86" y="101.6" size="1.778" layer="95"/>
-<pinref part="IC2" gate="B" pin="OE"/>
+<wire x1="167.64" y1="106.68" x2="144.78" y2="106.68" width="0.1524" layer="91"/>
+<label x="144.78" y="106.68" size="1.778" layer="95"/>
+<pinref part="IC2" gate="B" pin="I"/>
 </segment>
 <segment>
-<wire x1="182.88" y1="78.74" x2="182.88" y2="81.28" width="0.1524" layer="91"/>
-<wire x1="182.88" y1="81.28" x2="149.86" y2="81.28" width="0.1524" layer="91"/>
-<label x="149.86" y="81.28" size="1.778" layer="95"/>
-<pinref part="IC2" gate="C" pin="OE"/>
+<pinref part="IC4" gate="G$1" pin="(SCK/OC3B/PCINT15)PB7"/>
+<wire x1="25.4" y1="157.48" x2="38.1" y2="157.48" width="0.1524" layer="91"/>
+<label x="25.4" y="157.48" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="294.64" y1="139.7" x2="279.4" y2="139.7" width="0.1524" layer="91"/>
-<label x="279.4" y="139.7" size="1.778" layer="95"/>
-<pinref part="X2" gate="-3" pin="S"/>
+<pinref part="X1" gate="-15" pin="S"/>
+<wire x1="246.38" y1="109.22" x2="231.14" y2="109.22" width="0.1524" layer="91"/>
+<label x="231.14" y="109.22" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO5" class="0">
-<segment>
-<wire x1="-35.56" y1="182.88" x2="-50.8" y2="182.88" width="0.1524" layer="91"/>
-<label x="-50.8" y="182.88" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PA0(ADC0/AREFA)"/>
-</segment>
+<net name="GPIO4" class="0">
 <segment>
 <wire x1="279.4" y1="175.26" x2="302.26" y2="175.26" width="0.1524" layer="91"/>
 <label x="281.94" y="175.26" size="1.778" layer="95"/>
 <pinref part="JP2" gate="G$1" pin="6"/>
 </segment>
-</net>
-<net name="GPIO6" class="0">
-<segment>
-<wire x1="-35.56" y1="180.34" x2="-50.8" y2="180.34" width="0.1524" layer="91"/>
-<label x="-50.8" y="180.34" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PA1(ADC1)"/>
-</segment>
 <segment>
-<wire x1="279.4" y1="177.8" x2="302.26" y2="177.8" width="0.1524" layer="91"/>
-<label x="281.94" y="177.8" size="1.778" layer="95"/>
-<label x="281.94" y="177.8" size="1.778" layer="95"/>
-<pinref part="JP2" gate="G$1" pin="7"/>
+<pinref part="IC4" gate="G$1" pin="(OC1A/PCINT29)PD5"/>
+<wire x1="38.1" y1="106.68" x2="25.4" y2="106.68" width="0.1524" layer="91"/>
+<label x="25.4" y="106.68" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO7" class="0">
-<segment>
-<wire x1="-35.56" y1="177.8" x2="-50.8" y2="177.8" width="0.1524" layer="91"/>
-<label x="-50.8" y="177.8" size="1.778" layer="95"/>
-<label x="-50.8" y="177.8" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PA2(ADC2)"/>
-</segment>
+<net name="GPIO6" class="0">
 <segment>
 <wire x1="243.84" y1="172.72" x2="264.16" y2="172.72" width="0.1524" layer="91"/>
 <label x="246.38" y="172.72" size="1.778" layer="95"/>
 <pinref part="JP1" gate="G$1" pin="5"/>
 </segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(ADC5/PCINT5)PA5"/>
+<wire x1="25.4" y1="175.26" x2="38.1" y2="175.26" width="0.1524" layer="91"/>
+<label x="25.4" y="175.26" size="1.778" layer="95"/>
+</segment>
 </net>
-<net name="GPIO8" class="0">
+<net name="GPIO7" class="0">
 <segment>
 <wire x1="243.84" y1="175.26" x2="264.16" y2="175.26" width="0.1524" layer="91"/>
 <label x="246.38" y="175.26" size="1.778" layer="95"/>
 <pinref part="JP1" gate="G$1" pin="6"/>
 </segment>
 <segment>
-<wire x1="-50.8" y1="119.38" x2="-35.56" y2="119.38" width="0.1524" layer="91"/>
-<label x="-50.8" y="119.38" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC5(OC1B/MOSI/XCK1)"/>
+<pinref part="IC4" gate="G$1" pin="(ADC6/PCINT6)PA6"/>
+<wire x1="25.4" y1="177.8" x2="38.1" y2="177.8" width="0.1524" layer="91"/>
+<label x="25.4" y="177.8" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO9" class="0">
+<net name="GPIO8" class="0">
 <segment>
 <wire x1="243.84" y1="177.8" x2="264.16" y2="177.8" width="0.1524" layer="91"/>
 <label x="246.38" y="177.8" size="1.778" layer="95"/>
 <pinref part="JP1" gate="G$1" pin="7"/>
 </segment>
 <segment>
-<wire x1="-50.8" y1="121.92" x2="-35.56" y2="121.92" width="0.1524" layer="91"/>
-<label x="-50.8" y="121.92" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC4(OC1A/!SS!)"/>
+<pinref part="IC4" gate="G$1" pin="(ADC7/PCINT7)PA7"/>
+<wire x1="25.4" y1="180.34" x2="38.1" y2="180.34" width="0.1524" layer="91"/>
+<label x="25.4" y="180.34" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO1" class="0">
+<net name="GPIO0" class="0">
 <segment>
 <wire x1="279.4" y1="165.1" x2="302.26" y2="165.1" width="0.1524" layer="91"/>
 <label x="281.94" y="165.1" size="1.778" layer="95"/>
 <pinref part="JP2" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="33.02" y1="119.38" x2="53.34" y2="119.38" width="0.1524" layer="91"/>
-<label x="43.18" y="119.38" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PF4"/>
+<pinref part="IC4" gate="G$1" pin="(T1/CLKO/PCINT9)PB1"/>
+<wire x1="25.4" y1="142.24" x2="38.1" y2="142.24" width="0.1524" layer="91"/>
+<label x="25.4" y="142.24" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO2" class="0">
+<net name="GPIO1" class="0">
 <segment>
 <wire x1="279.4" y1="167.64" x2="302.26" y2="167.64" width="0.1524" layer="91"/>
 <label x="281.94" y="167.64" size="1.778" layer="95"/>
 <pinref part="JP2" gate="G$1" pin="3"/>
 </segment>
 <segment>
-<wire x1="33.02" y1="116.84" x2="53.34" y2="116.84" width="0.1524" layer="91"/>
-<label x="43.18" y="116.84" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PF5"/>
+<pinref part="IC4" gate="G$1" pin="(AIN0/INT2/PCINT10)PB2"/>
+<wire x1="38.1" y1="144.78" x2="25.4" y2="144.78" width="0.1524" layer="91"/>
+<label x="25.4" y="144.78" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO3" class="0">
+<net name="GPIO2" class="0">
 <segment>
 <wire x1="279.4" y1="170.18" x2="302.26" y2="170.18" width="0.1524" layer="91"/>
 <label x="281.94" y="170.18" size="1.778" layer="95"/>
 <pinref part="JP2" gate="G$1" pin="4"/>
 </segment>
 <segment>
-<wire x1="33.02" y1="114.3" x2="53.34" y2="114.3" width="0.1524" layer="91"/>
-<label x="43.18" y="114.3" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PF6"/>
+<pinref part="IC4" gate="G$1" pin="(AIN1/OC0A/PCINT11)PB3"/>
+<wire x1="25.4" y1="147.32" x2="38.1" y2="147.32" width="0.1524" layer="91"/>
+<label x="25.4" y="147.32" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="GPIO4" class="0">
+<net name="GPIO3" class="0">
 <segment>
 <wire x1="279.4" y1="172.72" x2="302.26" y2="172.72" width="0.1524" layer="91"/>
 <label x="281.94" y="172.72" size="1.778" layer="95"/>
 <pinref part="JP2" gate="G$1" pin="5"/>
 </segment>
 <segment>
-<wire x1="33.02" y1="111.76" x2="53.34" y2="111.76" width="0.1524" layer="91"/>
-<label x="43.18" y="111.76" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PF7"/>
+<pinref part="IC4" gate="G$1" pin="(OC1B/XCK1/PCINT28)PD4"/>
+<wire x1="25.4" y1="104.14" x2="38.1" y2="104.14" width="0.1524" layer="91"/>
+<label x="25.4" y="104.14" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="TMS_XMEGA" class="0">
+<net name="TMS_1284" class="0">
 <segment>
-<wire x1="-35.56" y1="147.32" x2="-50.8" y2="147.32" width="0.1524" layer="91"/>
-<label x="-50.8" y="147.32" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PB4(ADC4/TMS)"/>
+<pinref part="IC4" gate="G$1" pin="(TMS/PCINT19)PC3"/>
+<wire x1="25.4" y1="124.46" x2="38.1" y2="124.46" width="0.1524" layer="91"/>
+<label x="25.4" y="124.46" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="134.62" x2="226.06" y2="134.62" width="0.1524" layer="91"/>
-<label x="226.06" y="134.62" size="1.778" layer="95"/>
 <pinref part="X1" gate="-5" pin="S"/>
+<wire x1="231.14" y1="134.62" x2="246.38" y2="134.62" width="0.1524" layer="91"/>
+<label x="231.14" y="134.62" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="TDI_XMEGA" class="0">
+<net name="TDI_1284" class="0">
 <segment>
-<wire x1="-35.56" y1="144.78" x2="-50.8" y2="144.78" width="0.1524" layer="91"/>
-<label x="-50.8" y="144.78" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PB5(ADC5/TDI)"/>
+<pinref part="IC4" gate="G$1" pin="(TDI/PCINT21)PC5"/>
+<wire x1="25.4" y1="129.54" x2="38.1" y2="129.54" width="0.1524" layer="91"/>
+<label x="25.4" y="129.54" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="132.08" x2="226.06" y2="132.08" width="0.1524" layer="91"/>
-<label x="226.06" y="132.08" size="1.778" layer="95"/>
-<pinref part="X1" gate="-6" pin="S"/>
+<pinref part="X1" gate="-7" pin="S"/>
+<wire x1="231.14" y1="129.54" x2="246.38" y2="129.54" width="0.1524" layer="91"/>
+<label x="231.14" y="129.54" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="TCK_XMEGA" class="0">
+<net name="TCK_1284" class="0">
 <segment>
-<wire x1="-35.56" y1="142.24" x2="-50.8" y2="142.24" width="0.1524" layer="91"/>
-<label x="-50.8" y="142.24" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PB6(ADC6/TCK)"/>
+<pinref part="IC4" gate="G$1" pin="(TCK/PCINT18)PC2"/>
+<wire x1="25.4" y1="121.92" x2="38.1" y2="121.92" width="0.1524" layer="91"/>
+<label x="25.4" y="121.92" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="129.54" x2="226.06" y2="129.54" width="0.1524" layer="91"/>
-<label x="226.06" y="129.54" size="1.778" layer="95"/>
-<pinref part="X1" gate="-7" pin="S"/>
+<pinref part="X1" gate="-4" pin="S"/>
+<wire x1="246.38" y1="137.16" x2="231.14" y2="137.16" width="0.1524" layer="91"/>
+<label x="231.14" y="137.16" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="TDO_XMEGA" class="0">
+<net name="TDO_1284" class="0">
 <segment>
-<wire x1="-35.56" y1="139.7" x2="-50.8" y2="139.7" width="0.1524" layer="91"/>
-<label x="-50.8" y="139.7" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PB7(ADC7/AC0-OUT/TDO)"/>
+<pinref part="IC4" gate="G$1" pin="(TDO/PCINT20)PC4"/>
+<wire x1="25.4" y1="127" x2="38.1" y2="127" width="0.1524" layer="91"/>
+<label x="25.4" y="127" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="127" x2="226.06" y2="127" width="0.1524" layer="91"/>
-<label x="226.06" y="127" size="1.778" layer="95"/>
-<pinref part="X1" gate="-8" pin="S"/>
+<pinref part="X1" gate="-6" pin="S"/>
+<wire x1="246.38" y1="132.08" x2="231.14" y2="132.08" width="0.1524" layer="91"/>
+<label x="231.14" y="132.08" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="SDA" class="0">
 <segment>
-<wire x1="-35.56" y1="132.08" x2="-50.8" y2="132.08" width="0.1524" layer="91"/>
-<label x="-50.8" y="132.08" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC0(OC0A/SDA)"/>
+<wire x1="25.4" y1="119.38" x2="43.18" y2="119.38" width="0.1524" layer="91"/>
+<label x="43.18" y="119.38" size="1.778" layer="95" rot="MR0"/>
 <pinref part="R3" gate="G$1" pin="1"/>
+<pinref part="IC4" gate="G$1" pin="PC1(SDA/PCINT17)"/>
 </segment>
 <segment>
 <wire x1="243.84" y1="167.64" x2="251.46" y2="167.64" width="0.1524" layer="91"/>
@@ -9394,10 +11407,10 @@ Source: 008-0260-0_E.pdf</description>
 </net>
 <net name="SCL" class="0">
 <segment>
-<wire x1="-35.56" y1="129.54" x2="-58.42" y2="129.54" width="0.1524" layer="91"/>
-<label x="-50.8" y="129.54" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC1(OC0B/XCK0/SCL)"/>
+<wire x1="25.4" y1="116.84" x2="50.8" y2="116.84" width="0.1524" layer="91"/>
+<label x="43.18" y="116.84" size="1.778" layer="95" rot="MR0"/>
 <pinref part="R4" gate="G$1" pin="1"/>
+<pinref part="IC4" gate="G$1" pin="PC0(SCL/PCINT16)"/>
 </segment>
 <segment>
 <wire x1="243.84" y1="165.1" x2="251.46" y2="165.1" width="0.1524" layer="91"/>
@@ -9407,138 +11420,93 @@ Source: 008-0260-0_E.pdf</description>
 </net>
 <net name="TX_XBEE" class="0">
 <segment>
-<wire x1="-35.56" y1="127" x2="-50.8" y2="127" width="0.1524" layer="91"/>
-<label x="-50.8" y="127" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC2(OC0C/RXD0)"/>
+<wire x1="96.52" y1="96.52" x2="76.2" y2="96.52" width="0.1524" layer="91"/>
+<label x="76.2" y="96.52" size="1.778" layer="95"/>
+<pinref part="XB1" gate="G$1" pin="DOUT"/>
 </segment>
 <segment>
-<wire x1="111.76" y1="121.92" x2="91.44" y2="121.92" width="0.1524" layer="91"/>
-<label x="91.44" y="121.92" size="1.778" layer="95"/>
-<pinref part="XB1" gate="G$1" pin="DOUT"/>
+<pinref part="IC4" gate="G$1" pin="(RXD0/T3/PCINT24)PD0"/>
+<wire x1="25.4" y1="93.98" x2="38.1" y2="93.98" width="0.1524" layer="91"/>
+<label x="25.4" y="93.98" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="RX_XBEE" class="0">
 <segment>
-<wire x1="-35.56" y1="124.46" x2="-50.8" y2="124.46" width="0.1524" layer="91"/>
-<label x="-50.8" y="124.46" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC3(OC0D/TXD0)"/>
-</segment>
-<segment>
-<wire x1="111.76" y1="124.46" x2="91.44" y2="124.46" width="0.1524" layer="91"/>
-<label x="91.44" y="124.46" size="1.778" layer="95"/>
+<wire x1="96.52" y1="99.06" x2="76.2" y2="99.06" width="0.1524" layer="91"/>
+<label x="76.2" y="99.06" size="1.778" layer="95"/>
 <pinref part="XB1" gate="G$1" pin="DIN/!CONFIG"/>
 </segment>
-</net>
-<net name="RX_XMEGA" class="0">
-<segment>
-<wire x1="-35.56" y1="116.84" x2="-50.8" y2="116.84" width="0.1524" layer="91"/>
-<label x="-50.8" y="116.84" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC6(MISO/RXD1)"/>
-</segment>
-<segment>
-<wire x1="241.3" y1="119.38" x2="226.06" y2="119.38" width="0.1524" layer="91"/>
-<label x="226.06" y="119.38" size="1.778" layer="95"/>
-<pinref part="X1" gate="-11" pin="S"/>
-</segment>
-</net>
-<net name="TX_XMEGA" class="0">
-<segment>
-<wire x1="-35.56" y1="114.3" x2="-50.8" y2="114.3" width="0.1524" layer="91"/>
-<label x="-50.8" y="114.3" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PC7(SCK/TXD1/CLKO/EVO)"/>
-</segment>
 <segment>
-<wire x1="241.3" y1="121.92" x2="226.06" y2="121.92" width="0.1524" layer="91"/>
-<label x="226.06" y="121.92" size="1.778" layer="95"/>
-<pinref part="X1" gate="-10" pin="S"/>
+<pinref part="IC4" gate="G$1" pin="(TXD0/PCINT25)PD1"/>
+<wire x1="25.4" y1="96.52" x2="38.1" y2="96.52" width="0.1524" layer="91"/>
+<label x="25.4" y="96.52" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="PDI_DATA" class="0">
+<net name="RX_1284" class="0">
 <segment>
-<wire x1="-35.56" y1="106.68" x2="-50.8" y2="106.68" width="0.1524" layer="91"/>
-<label x="-50.8" y="106.68" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PDI-DATA"/>
+<wire x1="246.38" y1="119.38" x2="231.14" y2="119.38" width="0.1524" layer="91"/>
+<label x="231.14" y="119.38" size="1.778" layer="95"/>
+<pinref part="X1" gate="-11" pin="S"/>
 </segment>
 <segment>
-<wire x1="241.3" y1="139.7" x2="226.06" y2="139.7" width="0.1524" layer="91"/>
-<label x="226.06" y="139.7" size="1.778" layer="95"/>
-<pinref part="X1" gate="-3" pin="S"/>
+<pinref part="IC4" gate="G$1" pin="(RXD1/INT0/PCINT26)PD2"/>
+<wire x1="25.4" y1="99.06" x2="38.1" y2="99.06" width="0.1524" layer="91"/>
+<label x="25.4" y="99.06" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="N$6" class="0">
 <segment>
-<wire x1="-35.56" y1="96.52" x2="-53.34" y2="96.52" width="0.1524" layer="91"/>
-<wire x1="-53.34" y1="96.52" x2="-63.5" y2="96.52" width="0.1524" layer="91"/>
-<wire x1="-63.5" y1="96.52" x2="-63.5" y2="88.9" width="0.1524" layer="91"/>
-<junction x="-53.34" y="96.52"/>
-<pinref part="U$1" gate="G$1" pin="PR0(XTAL2)"/>
+<wire x1="-27.94" y1="172.72" x2="-50.8" y2="172.72" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="172.72" x2="-60.96" y2="172.72" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="172.72" x2="-60.96" y2="165.1" width="0.1524" layer="91"/>
+<junction x="-50.8" y="172.72"/>
 <pinref part="Q1" gate="G$1" pin="2"/>
-<pinref part="C16" gate="G$1" pin="2"/>
+<pinref part="C12" gate="G$1" pin="2"/>
+<pinref part="IC4" gate="G$1" pin="XTAL2"/>
 </segment>
 </net>
 <net name="N$7" class="0">
 <segment>
-<wire x1="-35.56" y1="91.44" x2="-53.34" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="-53.34" y1="91.44" x2="-53.34" y2="88.9" width="0.1524" layer="91"/>
-<junction x="-53.34" y="91.44"/>
-<pinref part="U$1" gate="G$1" pin="PR1(XTAL1)"/>
+<wire x1="-27.94" y1="167.64" x2="-50.8" y2="167.64" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="167.64" x2="-50.8" y2="165.1" width="0.1524" layer="91"/>
+<junction x="-50.8" y="167.64"/>
 <pinref part="Q1" gate="G$1" pin="1"/>
-<pinref part="C15" gate="G$1" pin="2"/>
-</segment>
-</net>
-<net name="N$5" class="0">
-<segment>
-<wire x1="33.02" y1="180.34" x2="38.1" y2="180.34" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PD0(OC0A)"/>
-<pinref part="R5" gate="G$1" pin="2"/>
-</segment>
-</net>
-<net name="N$8" class="0">
-<segment>
-<wire x1="33.02" y1="177.8" x2="38.1" y2="177.8" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PD1(OC0B/XCK0)"/>
-<pinref part="R6" gate="G$1" pin="2"/>
-</segment>
-</net>
-<net name="N$9" class="0">
-<segment>
-<wire x1="33.02" y1="175.26" x2="38.1" y2="175.26" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PD2(OC0C/RXD0)"/>
-<pinref part="R7" gate="G$1" pin="2"/>
+<pinref part="C11" gate="G$1" pin="2"/>
+<pinref part="IC4" gate="G$1" pin="XTAL1"/>
 </segment>
 </net>
 <net name="N$10" class="0">
 <segment>
-<wire x1="48.26" y1="180.34" x2="50.8" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="167.64" x2="63.5" y2="167.64" width="0.1524" layer="91"/>
 <pinref part="R5" gate="G$1" pin="1"/>
 <pinref part="LED1" gate="G$1" pin="A"/>
 </segment>
 </net>
 <net name="N$11" class="0">
 <segment>
-<wire x1="48.26" y1="177.8" x2="58.42" y2="177.8" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="165.1" x2="71.12" y2="165.1" width="0.1524" layer="91"/>
 <pinref part="R6" gate="G$1" pin="1"/>
 <pinref part="LED2" gate="G$1" pin="A"/>
 </segment>
 </net>
 <net name="N$12" class="0">
 <segment>
-<wire x1="48.26" y1="175.26" x2="66.04" y2="175.26" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="162.56" x2="78.74" y2="162.56" width="0.1524" layer="91"/>
 <pinref part="R7" gate="G$1" pin="1"/>
 <pinref part="LED3" gate="G$1" pin="A"/>
 </segment>
 </net>
 <net name="N$14" class="0">
 <segment>
-<wire x1="66.04" y1="195.58" x2="60.96" y2="195.58" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="182.88" x2="73.66" y2="182.88" width="0.1524" layer="91"/>
 <pinref part="LED4" gate="G$1" pin="A"/>
 <pinref part="R8" gate="G$1" pin="1"/>
 </segment>
 </net>
 <net name="LED_AT168" class="0">
 <segment>
-<wire x1="50.8" y1="195.58" x2="35.56" y2="195.58" width="0.1524" layer="91"/>
-<label x="35.56" y="195.58" size="1.778" layer="95"/>
+<wire x1="63.5" y1="182.88" x2="48.26" y2="182.88" width="0.1524" layer="91"/>
+<label x="48.26" y="182.88" size="1.778" layer="95"/>
 <pinref part="R8" gate="G$1" pin="2"/>
 </segment>
 <segment>
@@ -9547,90 +11515,73 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="IC1" gate="1" pin="PB1(OC1A/PCINT1)"/>
 </segment>
 </net>
-<net name="SS_XMEGA" class="0">
+<net name="SS_1284" class="0">
 <segment>
-<wire x1="33.02" y1="170.18" x2="53.34" y2="170.18" width="0.1524" layer="91"/>
-<label x="35.56" y="170.18" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PD4(OC1A/!SS!)"/>
-</segment>
-<segment>
-<wire x1="172.72" y1="71.12" x2="149.86" y2="71.12" width="0.1524" layer="91"/>
-<label x="149.86" y="71.12" size="1.778" layer="95"/>
+<wire x1="167.64" y1="86.36" x2="144.78" y2="86.36" width="0.1524" layer="91"/>
+<label x="144.78" y="86.36" size="1.778" layer="95"/>
 <pinref part="IC2" gate="C" pin="I"/>
 </segment>
-</net>
-<net name="MISO_XMEGA" class="0">
 <segment>
-<wire x1="33.02" y1="165.1" x2="53.34" y2="165.1" width="0.1524" layer="91"/>
-<label x="35.56" y="165.1" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PD6(RXD1/MISO)"/>
+<pinref part="IC4" gate="G$1" pin="(SS/OCB0/PCINT12)PB4"/>
+<wire x1="25.4" y1="149.86" x2="38.1" y2="149.86" width="0.1524" layer="91"/>
+<label x="25.4" y="149.86" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="MISO_1284" class="0">
 <segment>
-<wire x1="177.8" y1="144.78" x2="177.8" y2="147.32" width="0.1524" layer="91"/>
-<wire x1="177.8" y1="147.32" x2="177.8" y2="149.86" width="0.1524" layer="91"/>
-<wire x1="177.8" y1="147.32" x2="154.94" y2="147.32" width="0.1524" layer="91"/>
-<junction x="177.8" y="147.32"/>
-<label x="154.94" y="147.32" size="1.778" layer="95"/>
+<wire x1="160.02" y1="162.56" x2="160.02" y2="165.1" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="165.1" x2="160.02" y2="167.64" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="165.1" x2="137.16" y2="165.1" width="0.1524" layer="91"/>
+<junction x="160.02" y="165.1"/>
+<label x="137.16" y="165.1" size="1.778" layer="95"/>
 <pinref part="R10" gate="G$1" pin="1"/>
 <pinref part="R9" gate="G$1" pin="2"/>
 </segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(MISO/OC3A/PCINT14)PB6"/>
+<wire x1="25.4" y1="154.94" x2="38.1" y2="154.94" width="0.1524" layer="91"/>
+<label x="25.4" y="154.94" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="X1" gate="-14" pin="S"/>
+<wire x1="231.14" y1="111.76" x2="246.38" y2="111.76" width="0.1524" layer="91"/>
+<label x="231.14" y="111.76" size="1.778" layer="95"/>
+</segment>
 </net>
 <net name="RTS_XBEE" class="0">
 <segment>
-<wire x1="111.76" y1="109.22" x2="91.44" y2="109.22" width="0.1524" layer="91"/>
-<label x="91.44" y="109.22" size="1.778" layer="95"/>
+<wire x1="96.52" y1="83.82" x2="76.2" y2="83.82" width="0.1524" layer="91"/>
+<label x="76.2" y="83.82" size="1.778" layer="95"/>
 <pinref part="XB1" gate="G$1" pin="!RTS!/AD6/DIO6"/>
 </segment>
 <segment>
-<wire x1="-50.8" y1="175.26" x2="-35.56" y2="175.26" width="0.1524" layer="91"/>
-<label x="-50.8" y="175.26" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PA3(ADC3)"/>
+<pinref part="IC4" gate="G$1" pin="(ICP/OC2B/PCINT30)PD6"/>
+<wire x1="38.1" y1="109.22" x2="25.4" y2="109.22" width="0.1524" layer="91"/>
+<label x="25.4" y="109.22" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="CTS_XBEE" class="0">
 <segment>
-<wire x1="111.76" y1="111.76" x2="91.44" y2="111.76" width="0.1524" layer="91"/>
-<label x="91.44" y="111.76" size="1.778" layer="95"/>
+<wire x1="96.52" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<label x="76.2" y="86.36" size="1.778" layer="95"/>
 <pinref part="XB1" gate="G$1" pin="!CTS!/DIO7"/>
 </segment>
 <segment>
-<wire x1="-50.8" y1="172.72" x2="-35.56" y2="172.72" width="0.1524" layer="91"/>
-<label x="-50.8" y="172.72" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PA4(ADC4)"/>
+<pinref part="IC4" gate="G$1" pin="(OC2A/PCINT31)PD7"/>
+<wire x1="38.1" y1="111.76" x2="25.4" y2="111.76" width="0.1524" layer="91"/>
+<label x="25.4" y="111.76" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="DTR_XBEE" class="0">
 <segment>
-<wire x1="111.76" y1="114.3" x2="91.44" y2="114.3" width="0.1524" layer="91"/>
-<label x="91.44" y="114.3" size="1.778" layer="95"/>
+<wire x1="96.52" y1="88.9" x2="76.2" y2="88.9" width="0.1524" layer="91"/>
+<label x="76.2" y="88.9" size="1.778" layer="95"/>
 <pinref part="XB1" gate="G$1" pin="!DTR!/SLEEP_RQ/DI8"/>
 </segment>
 <segment>
-<wire x1="33.02" y1="121.92" x2="53.34" y2="121.92" width="0.1524" layer="91"/>
-<label x="43.18" y="121.92" size="1.778" layer="95"/>
-<pinref part="U$1" gate="G$1" pin="PF3(OC0D/TXD0)"/>
-</segment>
-</net>
-<net name="N$15" class="0">
-<segment>
-<wire x1="119.38" y1="251.46" x2="116.84" y2="251.46" width="0.1524" layer="91"/>
-<wire x1="116.84" y1="251.46" x2="106.68" y2="251.46" width="0.1524" layer="91"/>
-<wire x1="106.68" y1="251.46" x2="106.68" y2="248.92" width="0.1524" layer="91"/>
-<junction x="116.84" y="251.46"/>
-<pinref part="IC1" gate="1" pin="PB7(XTAL2/TOSC2/PCINT7)"/>
-<pinref part="Q2" gate="G$1" pin="1"/>
-<pinref part="C17" gate="G$1" pin="2"/>
-</segment>
-</net>
-<net name="N$16" class="0">
-<segment>
-<wire x1="119.38" y1="256.54" x2="116.84" y2="256.54" width="0.1524" layer="91"/>
-<wire x1="116.84" y1="256.54" x2="99.06" y2="256.54" width="0.1524" layer="91"/>
-<wire x1="99.06" y1="256.54" x2="99.06" y2="248.92" width="0.1524" layer="91"/>
-<junction x="116.84" y="256.54"/>
-<pinref part="IC1" gate="1" pin="PB6(XTAL1/TOSC1/PCINT6)"/>
-<pinref part="Q2" gate="G$1" pin="2"/>
-<pinref part="C18" gate="G$1" pin="2"/>
+<pinref part="IC4" gate="G$1" pin="(T0/XCK0/PCINT8)PB0"/>
+<wire x1="38.1" y1="139.7" x2="25.4" y2="139.7" width="0.1524" layer="91"/>
+<label x="25.4" y="139.7" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="S_IN1_PPM" class="0">
@@ -9657,61 +11608,60 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="IC1" gate="1" pin="PB2(SS/OC1B/PCINT2)"/>
 </segment>
 <segment>
-<wire x1="193.04" y1="71.12" x2="208.28" y2="71.12" width="0.1524" layer="91"/>
-<label x="195.58" y="71.12" size="1.778" layer="95"/>
+<wire x1="187.96" y1="86.36" x2="203.2" y2="86.36" width="0.1524" layer="91"/>
+<label x="190.5" y="86.36" size="1.778" layer="95"/>
 <pinref part="IC2" gate="C" pin="O"/>
 </segment>
 </net>
-<net name="MOSI_MEGA" class="0">
+<net name="MOSI_168" class="0">
 <segment>
 <wire x1="180.34" y1="218.44" x2="198.12" y2="218.44" width="0.1524" layer="91"/>
 <label x="182.88" y="218.44" size="1.778" layer="95"/>
 <pinref part="IC1" gate="1" pin="PB3(MOSI/OC2A/PCINT3)"/>
 </segment>
 <segment>
-<wire x1="193.04" y1="111.76" x2="210.82" y2="111.76" width="0.1524" layer="91"/>
-<label x="195.58" y="111.76" size="1.778" layer="95"/>
+<wire x1="187.96" y1="127" x2="203.2" y2="127" width="0.1524" layer="91"/>
+<label x="190.5" y="127" size="1.778" layer="95"/>
 <pinref part="IC2" gate="A" pin="O"/>
 </segment>
 <segment>
-<wire x1="279.4" y1="114.3" x2="261.62" y2="114.3" width="0.1524" layer="91"/>
-<label x="261.62" y="114.3" size="1.778" layer="95"/>
-<pinref part="R11" gate="G$1" pin="1"/>
+<pinref part="X2" gate="-13" pin="S"/>
+<wire x1="294.64" y1="114.3" x2="281.94" y2="114.3" width="0.1524" layer="91"/>
+<label x="281.94" y="114.3" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="MISO_MEGA" class="0">
+<net name="MISO_168" class="0">
 <segment>
 <wire x1="180.34" y1="215.9" x2="198.12" y2="215.9" width="0.1524" layer="91"/>
 <label x="182.88" y="215.9" size="1.778" layer="95"/>
 <pinref part="IC1" gate="1" pin="PB4(MISO/PCINT4)"/>
 </segment>
 <segment>
-<wire x1="177.8" y1="160.02" x2="177.8" y2="162.56" width="0.1524" layer="91"/>
-<wire x1="177.8" y1="162.56" x2="154.94" y2="162.56" width="0.1524" layer="91"/>
-<label x="154.94" y="162.56" size="1.778" layer="95"/>
-<pinref part="R9" gate="G$1" pin="1"/>
+<pinref part="IC2" gate="D" pin="I"/>
+<wire x1="167.64" y1="66.04" x2="144.78" y2="66.04" width="0.1524" layer="91"/>
+<label x="144.78" y="66.04" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="294.64" y1="111.76" x2="261.62" y2="111.76" width="0.1524" layer="91"/>
-<label x="261.62" y="111.76" size="1.778" layer="95"/>
 <pinref part="X2" gate="-14" pin="S"/>
+<wire x1="281.94" y1="111.76" x2="294.64" y2="111.76" width="0.1524" layer="91"/>
+<label x="281.94" y="111.76" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="SCK_MEGA" class="0">
+<net name="SCK_168" class="0">
 <segment>
 <wire x1="180.34" y1="213.36" x2="198.12" y2="213.36" width="0.1524" layer="91"/>
 <label x="182.88" y="213.36" size="1.778" layer="95"/>
 <pinref part="IC1" gate="1" pin="PB5(SCK/PCINT5)"/>
 </segment>
 <segment>
-<wire x1="193.04" y1="91.44" x2="208.28" y2="91.44" width="0.1524" layer="91"/>
-<label x="195.58" y="91.44" size="1.778" layer="95"/>
+<wire x1="187.96" y1="106.68" x2="203.2" y2="106.68" width="0.1524" layer="91"/>
+<label x="190.5" y="106.68" size="1.778" layer="95"/>
 <pinref part="IC2" gate="B" pin="O"/>
 </segment>
 <segment>
-<wire x1="279.4" y1="109.22" x2="261.62" y2="109.22" width="0.1524" layer="91"/>
-<label x="261.62" y="109.22" size="1.778" layer="95"/>
-<pinref part="R12" gate="G$1" pin="1"/>
+<pinref part="X2" gate="-15" pin="S"/>
+<wire x1="294.64" y1="109.22" x2="281.94" y2="109.22" width="0.1524" layer="91"/>
+<label x="281.94" y="109.22" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="S_OUT6" class="0">
@@ -9786,7 +11736,7 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="JP3" gate="G$1" pin="3"/>
 </segment>
 </net>
-<net name="TX_MEGA" class="0">
+<net name="TX_168" class="0">
 <segment>
 <wire x1="180.34" y1="246.38" x2="198.12" y2="246.38" width="0.1524" layer="91"/>
 <label x="182.88" y="246.38" size="1.778" layer="95"/>
@@ -9798,7 +11748,7 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="X2" gate="-10" pin="S"/>
 </segment>
 </net>
-<net name="RX_MEGA" class="0">
+<net name="RX_168" class="0">
 <segment>
 <wire x1="180.34" y1="248.92" x2="198.12" y2="248.92" width="0.1524" layer="91"/>
 <label x="182.88" y="248.92" size="1.778" layer="95"/>
@@ -9870,43 +11820,203 @@ Source: 008-0260-0_E.pdf</description>
 <pinref part="JP10" gate="G$1" pin="3"/>
 </segment>
 </net>
-<net name="N$18" class="0">
+<net name="N$1" class="0">
 <segment>
-<wire x1="294.64" y1="114.3" x2="289.56" y2="114.3" width="0.1524" layer="91"/>
-<pinref part="X2" gate="-13" pin="S"/>
-<pinref part="R11" gate="G$1" pin="2"/>
+<wire x1="96.52" y1="111.76" x2="91.44" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="XB1" gate="G$1" pin="!RESET"/>
+<pinref part="R13" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="N$20" class="0">
+<net name="MOSI_1284" class="0">
 <segment>
-<wire x1="294.64" y1="109.22" x2="289.56" y2="109.22" width="0.1524" layer="91"/>
-<pinref part="X2" gate="-15" pin="S"/>
-<pinref part="R12" gate="G$1" pin="2"/>
+<wire x1="167.64" y1="127" x2="144.78" y2="127" width="0.1524" layer="91"/>
+<label x="144.78" y="127" size="1.778" layer="95"/>
+<pinref part="IC2" gate="A" pin="I"/>
+</segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(MOSI/PCINT13/ICP3)PB5"/>
+<wire x1="25.4" y1="152.4" x2="38.1" y2="152.4" width="0.1524" layer="91"/>
+<label x="25.4" y="152.4" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="X1" gate="-13" pin="S"/>
+<wire x1="246.38" y1="114.3" x2="231.14" y2="114.3" width="0.1524" layer="91"/>
+<label x="231.14" y="114.3" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="N$1" class="0">
+<net name="TX_1284" class="0">
 <segment>
-<wire x1="111.76" y1="137.16" x2="106.68" y2="137.16" width="0.1524" layer="91"/>
-<pinref part="XB1" gate="G$1" pin="!RESET"/>
-<pinref part="R13" gate="G$1" pin="2"/>
+<wire x1="246.38" y1="121.92" x2="231.14" y2="121.92" width="0.1524" layer="91"/>
+<label x="231.14" y="121.92" size="1.778" layer="95"/>
+<pinref part="X1" gate="-10" pin="S"/>
+</segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(TXD1/INT1/PCINT27)PD3"/>
+<wire x1="25.4" y1="101.6" x2="38.1" y2="101.6" width="0.1524" layer="91"/>
+<label x="25.4" y="101.6" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="GPIO5" class="0">
+<segment>
+<wire x1="279.4" y1="177.8" x2="302.26" y2="177.8" width="0.1524" layer="91"/>
+<label x="281.94" y="177.8" size="1.778" layer="95"/>
+<label x="281.94" y="177.8" size="1.778" layer="95"/>
+<pinref part="JP2" gate="G$1" pin="7"/>
+</segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(TOSC1/PCINT22)PC6"/>
+<wire x1="25.4" y1="132.08" x2="38.1" y2="132.08" width="0.1524" layer="91"/>
+<label x="25.4" y="132.08" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$19" class="0">
+<segment>
+<pinref part="IC4" gate="G$1" pin="RESET"/>
+<pinref part="R12" gate="G$1" pin="1"/>
+<wire x1="-27.94" y1="180.34" x2="-33.02" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="180.34" x2="-33.02" y2="182.88" width="0.1524" layer="91"/>
+<pinref part="D1" gate="G$1" pin="A"/>
+<wire x1="-33.02" y1="180.34" x2="-35.56" y2="180.34" width="0.1524" layer="91"/>
+<junction x="-33.02" y="180.34"/>
+</segment>
+</net>
+<net name="RESET" class="0">
+<segment>
+<pinref part="D1" gate="G$1" pin="C"/>
+<wire x1="-40.64" y1="180.34" x2="-53.34" y2="180.34" width="0.1524" layer="91"/>
+<label x="-53.34" y="180.34" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="D2" gate="G$1" pin="C"/>
+<wire x1="109.22" y1="271.78" x2="93.98" y2="271.78" width="0.1524" layer="91"/>
+<label x="93.98" y="271.78" size="1.778" layer="95"/>
+</segment>
+<segment>
+<wire x1="177.8" y1="134.62" x2="177.8" y2="137.16" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="137.16" x2="144.78" y2="137.16" width="0.1524" layer="91"/>
+<label x="144.78" y="137.16" size="1.778" layer="95"/>
+<pinref part="IC2" gate="A" pin="OE"/>
+</segment>
+<segment>
+<wire x1="177.8" y1="114.3" x2="177.8" y2="116.84" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="116.84" x2="144.78" y2="116.84" width="0.1524" layer="91"/>
+<label x="144.78" y="116.84" size="1.778" layer="95"/>
+<pinref part="IC2" gate="B" pin="OE"/>
+</segment>
+<segment>
+<wire x1="177.8" y1="93.98" x2="177.8" y2="96.52" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="96.52" x2="144.78" y2="96.52" width="0.1524" layer="91"/>
+<label x="144.78" y="96.52" size="1.778" layer="95"/>
+<pinref part="IC2" gate="C" pin="OE"/>
+</segment>
+<segment>
+<wire x1="294.64" y1="139.7" x2="279.4" y2="139.7" width="0.1524" layer="91"/>
+<label x="279.4" y="139.7" size="1.778" layer="95"/>
+<pinref part="X2" gate="-3" pin="S"/>
+</segment>
+<segment>
+<pinref part="X1" gate="-3" pin="S"/>
+<wire x1="246.38" y1="139.7" x2="231.14" y2="139.7" width="0.1524" layer="91"/>
+<label x="231.14" y="139.7" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="IC2" gate="D" pin="OE"/>
+<wire x1="177.8" y1="73.66" x2="177.8" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="177.8" y1="76.2" x2="144.78" y2="76.2" width="0.1524" layer="91"/>
+<label x="144.78" y="76.2" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$21" class="0">
+<segment>
+<pinref part="IC1" gate="1" pin="PC6(/RESET/PCINT14)"/>
+<pinref part="D2" gate="G$1" pin="A"/>
+<wire x1="119.38" y1="271.78" x2="116.84" y2="271.78" width="0.1524" layer="91"/>
+<pinref part="R2" gate="G$1" pin="1"/>
+<wire x1="116.84" y1="271.78" x2="114.3" y2="271.78" width="0.1524" layer="91"/>
+<wire x1="116.84" y1="271.78" x2="116.84" y2="274.32" width="0.1524" layer="91"/>
+<junction x="116.84" y="271.78"/>
+</segment>
+</net>
+<net name="MISO_1284_5V" class="0">
+<segment>
+<pinref part="IC2" gate="D" pin="O"/>
+<wire x1="187.96" y1="66.04" x2="203.2" y2="66.04" width="0.1524" layer="91"/>
+<label x="190.5" y="66.04" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R9" gate="G$1" pin="1"/>
+<wire x1="160.02" y1="177.8" x2="160.02" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="180.34" x2="137.16" y2="180.34" width="0.1524" layer="91"/>
+<label x="137.16" y="180.34" size="1.778" layer="95"/>
 </segment>
 </net>
 <net name="N$3" class="0">
 <segment>
-<wire x1="33.02" y1="124.46" x2="53.34" y2="124.46" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PF2(OC0C/RXD0)"/>
+<pinref part="R11" gate="G$1" pin="1"/>
+<pinref part="T1" gate="G$1" pin="B"/>
+<wire x1="2.54" y1="220.98" x2="7.62" y2="220.98" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$13" class="0">
+<segment>
+<pinref part="R1" gate="1" pin="A"/>
+<wire x1="15.24" y1="226.06" x2="27.94" y2="226.06" width="0.1524" layer="91"/>
+<wire x1="27.94" y1="226.06" x2="27.94" y2="236.22" width="0.1524" layer="91"/>
+<pinref part="SG1" gate="G$1" pin="1"/>
+<wire x1="15.24" y1="228.6" x2="15.24" y2="226.06" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="BUZZER" class="0">
+<segment>
+<pinref part="R11" gate="G$1" pin="2"/>
+<wire x1="-7.62" y1="220.98" x2="-20.32" y2="220.98" width="0.1524" layer="91"/>
+<label x="-20.32" y="220.98" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="IC4" gate="G$1" pin="(ADC4/PCINT4)PA4"/>
+<wire x1="38.1" y1="172.72" x2="25.4" y2="172.72" width="0.1524" layer="91"/>
+<label x="25.4" y="172.72" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$2" class="0">
+<segment>
+<pinref part="IC5" gate="G$1" pin="IN"/>
+<pinref part="C3" gate="G$1" pin="1"/>
+<wire x1="-30.48" y1="284.48" x2="-35.56" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="-35.56" y1="284.48" x2="-35.56" y2="279.4" width="0.1524" layer="91"/>
+<pinref part="JP15" gate="G$1" pin="2"/>
+<wire x1="-58.42" y1="279.4" x2="-53.34" y2="279.4" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="279.4" x2="-53.34" y2="284.48" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="284.48" x2="-35.56" y2="284.48" width="0.1524" layer="91"/>
+<junction x="-35.56" y="284.48"/>
 </segment>
 </net>
 <net name="N$4" class="0">
 <segment>
-<wire x1="33.02" y1="127" x2="53.34" y2="127" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PF1(OC0B/XCK0)"/>
+<pinref part="T1" gate="G$1" pin="C"/>
+<pinref part="SG1" gate="G$1" pin="2"/>
+<wire x1="12.7" y1="226.06" x2="12.7" y2="228.6" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="N$13" class="0">
+<net name="N$18" class="0">
+<segment>
+<pinref part="IC4" gate="G$1" pin="(ADC1/PCINT1)PA1"/>
+<pinref part="R6" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="165.1" x2="50.8" y2="165.1" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$20" class="0">
+<segment>
+<pinref part="IC4" gate="G$1" pin="(ADC0/PCINT0)PA0"/>
+<pinref part="R7" gate="G$1" pin="2"/>
+<wire x1="50.8" y1="162.56" x2="25.4" y2="162.56" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$5" class="0">
 <segment>
-<wire x1="33.02" y1="129.54" x2="53.34" y2="129.54" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="PF0(OC0A)"/>
+<pinref part="IC4" gate="G$1" pin="(ADC2/PCINT2)PA2"/>
+<pinref part="R5" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="167.64" x2="50.8" y2="167.64" width="0.1524" layer="91"/>
 </segment>
 </net>
 </nets>
diff --git a/xbee_mainboard/partlist.txt b/xbee_mainboard/partlist.txt
deleted file mode 100644 (file)
index 2afe57b..0000000
+++ /dev/null
@@ -1,88 +0,0 @@
-Partlist
-
-Exported from mainboard2.sch at 9/25/12 8:09 PM
-
-EAGLE Version 5.12.0 Copyright (c) 1988-2011 CadSoft
-
-Part     Value            Device             Package    Library   Sheet
-
-C1       10u              C-USC3216          C3216      rcl       1
-C2       10u              C-USC3216          C3216      rcl       1
-
-C3       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C4       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C5       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C6       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C7       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C8       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C9       100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C10      100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C11      100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C12      100n             CAP0603-CAP        0603-CAP   SparkFun  1
-C14      100n             CAP0603-CAP        0603-CAP   SparkFun  1
-
-C15      18p              CAP0603-CAP        0603-CAP   SparkFun  1
-C16      18p              CAP0603-CAP        0603-CAP   SparkFun  1
-C17      18p              CAP0603-CAP        0603-CAP   SparkFun  1
-C18      18p              CAP0603-CAP        0603-CAP   SparkFun  1
-
-IC1      MEGA48/88/168-AU MEGA48/88/168-AU   TQFP32-08  avr-7     1
-IC2      74HC126D         74HC126D           SO14       74xx-eu   1
-
-IC3                       V_REG_LM1117SOT223 SOT223     SparkFun  1
-
-JP1                       M081X08            1X08       SparkFun  1
-JP2                       M081X08            1X08       SparkFun  1
-
-JP3                       M03PTH             1X03       SparkFun  1
-JP4                       M03PTH             1X03       SparkFun  1
-JP5                       M03PTH             1X03       SparkFun  1
-JP6                       M03PTH             1X03       SparkFun  1
-JP7                       M03PTH             1X03       SparkFun  1
-JP8                       M03PTH             1X03       SparkFun  1
-JP9                       M03PTH             1X03       SparkFun  1
-JP10                      M03PTH             1X03       SparkFun  1
-JP11                      M03PTH             1X03       SparkFun  1
-JP12                      M03PTH             1X03       SparkFun  1
-JP13                      M03PTH             1X03       SparkFun  1
-JP14                      M03PTH             1X03       SparkFun  1
-JP15                      M02PTH             1X02       SparkFun  1
-JP16     M01PTH           M01PTH             1X01       SparkFun  1
-JP17     M01PTH           M01PTH             1X01       SparkFun  1
-JP18     M01PTH           M01PTH             1X01       SparkFun  1
-JP19     M01PTH           M01PTH             1X01       SparkFun  1
-JP20     M01PTH           M01PTH             1X01       SparkFun  1
-
-LED1                      LED0603            LED-0603   SparkFun  1
-LED2                      LED0603            LED-0603   SparkFun  1
-LED3                      LED0603            LED-0603   SparkFun  1
-LED4                      LED0603            LED-0603   SparkFun  1
-
-Q1       8M               CRYSTALHC49UP      HC49UP     crystal   1
-Q2       8M               CRYSTALHC49UP      HC49UP     crystal   1
-
-R1       10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-R2       10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-R3       10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-R4       10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-
-R5       160              RESISTOR0603-RES   0603-RES   SparkFun  1
-R6       160              RESISTOR0603-RES   0603-RES   SparkFun  1
-R7       160              RESISTOR0603-RES   0603-RES   SparkFun  1
-R8       160              RESISTOR0603-RES   0603-RES   SparkFun  1
-
-R9       5k               RESISTOR0603-RES   0603-RES   SparkFun  1
-
-R10      10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-
-R11      100              RESISTOR0603-RES   0603-RES   SparkFun  1
-R12      100              RESISTOR0603-RES   0603-RES   SparkFun  1
-
-R13      10k              RESISTOR0603-RES   0603-RES   SparkFun  1
-
-U$1      XMEGA-A3TQFP     XMEGA-A3TQFP       TQFP64     avr-7     1
-
-X1       52745-1690       52745-1690         52745-1690 con-molex 1
-X2       52745-1690       52745-1690         52745-1690 con-molex 1
-
-XB1      XBEE-PRO         XBEE-PRO           XBEE-PRO   maxstream 1