"RTE_CRYPTODEV_FF_CPU_AVX512",,,x,,,,
"RTE_CRYPTODEV_FF_CPU_AESNI",,,x,x,,,
"RTE_CRYPTODEV_FF_HW_ACCELERATED",x,,,,,,
+ "RTE_CRYPTODEV_FF_CPU_NEON",,,,,,,
+ "RTE_CRYPTODEV_FF_CPU_ARM_CE",,,,,,,
Supported Cipher Algorithms
dev->enqueue_burst = armv8_crypto_pmd_enqueue_burst;
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_CPU_NEON |
+ RTE_CRYPTODEV_FF_CPU_ARM_CE;
/* Set vector instructions mode supported */
internals = dev->data->dev_private;
return "HW_ACCELERATED";
case RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER:
return "MBUF_SCATTER_GATHER";
+ case RTE_CRYPTODEV_FF_CPU_NEON:
+ return "CPU_NEON";
+ case RTE_CRYPTODEV_FF_CPU_ARM_CE:
+ return "CPU_ARM_CE";
default:
return NULL;
}
/**< Utilises CPU SIMD AVX512 instructions */
#define RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER (1ULL << 9)
/**< Scatter-gather mbufs are supported */
+#define RTE_CRYPTODEV_FF_CPU_NEON (1ULL << 10)
+/**< Utilises CPU NEON instructions */
+#define RTE_CRYPTODEV_FF_CPU_ARM_CE (1ULL << 11)
+/**< Utilises ARM CPU Cryptographic Extensions */
+
/**