net/ice: check max SIMD bitwidth
authorCiara Power <ciara.power@intel.com>
Mon, 19 Oct 2020 13:48:49 +0000 (15:48 +0200)
committerDavid Marchand <david.marchand@redhat.com>
Mon, 19 Oct 2020 14:45:02 +0000 (16:45 +0200)
When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
drivers/net/ice/ice_rxtx.c

index 79e6df1..ee576c3 100644 (file)
@@ -4,6 +4,7 @@
 
 #include <rte_ethdev_driver.h>
 #include <rte_net.h>
+#include <rte_vect.h>
 
 #include "rte_pmd_ice.h"
 #include "ice_rxtx.h"
@@ -2989,7 +2990,8 @@ ice_set_rx_function(struct rte_eth_dev *dev)
        bool use_avx2 = false;
 
        if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
-               if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed) {
+               if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed &&
+                               rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
                        ad->rx_vec_allowed = true;
                        for (i = 0; i < dev->data->nb_rx_queues; i++) {
                                rxq = dev->data->rx_queues[i];
@@ -2999,8 +3001,9 @@ ice_set_rx_function(struct rte_eth_dev *dev)
                                }
                        }
 
-                       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
-                       rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)
+                       if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
+                            rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
+                                       rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
                                use_avx2 = true;
 
                } else {
@@ -3167,7 +3170,8 @@ ice_set_tx_function(struct rte_eth_dev *dev)
        bool use_avx2 = false;
 
        if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
-               if (!ice_tx_vec_dev_check(dev)) {
+               if (!ice_tx_vec_dev_check(dev) &&
+                               rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
                        ad->tx_vec_allowed = true;
                        for (i = 0; i < dev->data->nb_tx_queues; i++) {
                                txq = dev->data->tx_queues[i];
@@ -3177,8 +3181,9 @@ ice_set_tx_function(struct rte_eth_dev *dev)
                                }
                        }
 
-                       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
-                       rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)
+                       if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||
+                            rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&
+                                       rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
                                use_avx2 = true;
 
                } else {