]> git.droids-corp.org - dpdk.git/commitdiff
net/ena: disable readless communication when no HW support
authorJan Medala <jan@semihalf.com>
Thu, 30 Jun 2016 15:04:56 +0000 (17:04 +0200)
committerBruce Richardson <bruce.richardson@intel.com>
Fri, 8 Jul 2016 13:19:40 +0000 (15:19 +0200)
Depending on HW revision readless communcation between host and device
may be unavailable. In that case prevent PMD from setting up readless
communication mechanism.

"readless" refers to ability to read ENA registers without actually
issuing read request from host (x86). Instead, host programs 2 registers
on the device that triggers a DMA from device to host and reports a
register value. However, this functionality is not going to be available
in all types of devices. The decision if this mode is supported or not,
is taken from revision_id in pci configuration space.

Signed-off-by: Alexander Matushevsky <matua@amazon.com>
Signed-off-by: Jakub Palider <jpa@semihalf.com>
Signed-off-by: Jan Medala <jan@semihalf.com>
drivers/net/ena/ena_ethdev.c
drivers/net/ena/ena_ethdev.h

index e2716b5a4b1c104cefa0dca5eed64e1b9e377568..11e7d8e56cf6092f1e6e79332a4799fdb5c723e4 100644 (file)
@@ -338,7 +338,8 @@ static void ena_config_host_info(struct ena_com_dev *ena_dev)
        host_info->driver_version =
                (DRV_MODULE_VER_MAJOR) |
                (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
-               (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
+               (DRV_MODULE_VER_SUBMINOR <<
+                       ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
 
        rc = ena_com_set_host_attributes(ena_dev);
        if (rc) {
@@ -1151,6 +1152,7 @@ static int ena_device_init(struct ena_com_dev *ena_dev,
                           struct ena_com_dev_get_features_ctx *get_feat_ctx)
 {
        int rc;
+       bool readless_supported;
 
        /* Initialize mmio registers */
        rc = ena_com_mmio_reg_read_request_init(ena_dev);
@@ -1159,6 +1161,14 @@ static int ena_device_init(struct ena_com_dev *ena_dev,
                return rc;
        }
 
+       /* The PCIe configuration space revision id indicate if mmio reg
+        * read is disabled.
+        */
+       readless_supported =
+               !(((struct rte_pci_device *)ena_dev->dmadev)->id.class_id
+                              & ENA_MMIO_DISABLE_REG_READ);
+       ena_com_set_mmio_read_mode(ena_dev, readless_supported);
+
        /* reset device */
        rc = ena_com_dev_reset(ena_dev);
        if (rc) {
index ab9667f09f5b41106d7a37d895adb43a3cedeab9..61390a93c4cc91ff3afe4b259f983260058d62f1 100644 (file)
@@ -54,6 +54,8 @@
 
 #define ENA_PKT_MAX_BUFS     17
 
+#define ENA_MMIO_DISABLE_REG_READ      BIT(0)
+
 #define        ENA_CIRC_COUNT(head, tail, size)                                \
        (((uint16_t)((uint16_t)(head) - (uint16_t)(tail))) & ((size) - 1))