net/ice/base: add more macros for FDID priority

Add macro for FDID  priority 0 and 3, also adjust the
fdid_prio position to sync with kernel driver.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 86b532b..6f11195 100644 (file)
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -202,8 +202,8 @@ struct ice_fdir_fltr {
        u8 cnt_ena;
        u8 fltr_status;
        u16 cnt_index;
-       u8 fdid_prio;
        u32 fltr_id;
+       u8 fdid_prio;
        /* Set to true for an ACL filter */
        bool acl_fltr;
 };

diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 3312974..d904385 100644 (file)
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -162,7 +162,9 @@ struct ice_fltr_desc {
 
 #define ICE_FXD_FLTR_QW1_FDID_PRI_S    25
 #define ICE_FXD_FLTR_QW1_FDID_PRI_M    (0x7ULL << ICE_FXD_FLTR_QW1_FDID_PRI_S)
+#define ICE_FXD_FLTR_QW1_FDID_PRI_ZERO 0x0ULL
 #define ICE_FXD_FLTR_QW1_FDID_PRI_ONE  0x1ULL
+#define ICE_FXD_FLTR_QW1_FDID_PRI_THREE        0x3ULL
 
 #define ICE_FXD_FLTR_QW1_FDID_MDID_S   28
 #define ICE_FXD_FLTR_QW1_FDID_MDID_M   (0xFULL << ICE_FXD_FLTR_QW1_FDID_MDID_S)