#define NUM_OF_ENG_PFS(dev) (ECORE_IS_BB(dev) ? MAX_NUM_PFS_BB \
: MAX_NUM_PFS_K2)
+#define CRC8_TABLE_SIZE 256
+
/**
* @brief ecore_concrete_to_sw_fid - get the sw function id from
* the concrete value.
ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
{
struct dcbx_app_priority_feature *p_app;
- enum _ecore_status_t rc = ECORE_SUCCESS;
- struct ecore_dcbx_results data = { 0 };
struct dcbx_app_priority_entry *p_tbl;
+ struct ecore_dcbx_results data = { 0 };
struct dcbx_ets_feature *p_ets;
struct ecore_hw_info *p_info;
u32 pri_tc_tbl, flags;
u8 dcbx_version;
int num_entries;
+ enum _ecore_status_t rc = ECORE_SUCCESS;
flags = p_hwfn->p_dcbx_info->operational.flags;
dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
struct ecore_dcbx_mib_meta_data *p_data,
enum ecore_mib_read_type type)
{
- enum _ecore_status_t rc = ECORE_SUCCESS;
u32 prefix_seq_num, suffix_seq_num;
int read_count = 0;
+ enum _ecore_status_t rc = ECORE_SUCCESS;
/* The data is considered to be valid only if both sequence numbers are
* the same.
DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
}
- return rc;
+ return ECORE_SUCCESS;
}
/*
p_hwfn->mcp_info->mfw_mb_length);
}
-enum _ecore_status_t ecore_vf_start(struct ecore_hwfn *p_hwfn,
- struct ecore_hw_init_params *p_params)
-{
- if (p_params->p_tunn) {
- ecore_vf_set_vf_start_tunn_update_param(p_params->p_tunn);
- ecore_vf_pf_tunnel_param_update(p_hwfn, p_params->p_tunn);
- }
-
- p_hwfn->b_int_enabled = 1;
-
- return ECORE_SUCCESS;
-}
-
static void ecore_pglueb_clear_err(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt)
{
}
}
+enum _ecore_status_t ecore_vf_start(struct ecore_hwfn *p_hwfn,
+ struct ecore_hw_init_params *p_params)
+{
+ if (p_params->p_tunn) {
+ ecore_vf_set_vf_start_tunn_update_param(p_params->p_tunn);
+ ecore_vf_pf_tunnel_param_update(p_hwfn, p_params->p_tunn);
+ }
+
+ p_hwfn->b_int_enabled = 1;
+
+ return ECORE_SUCCESS;
+}
+
enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
struct ecore_hw_init_params *p_params)
{
struct ecore_chain *p_chain,
struct ecore_chain_ext_pbl *ext_pbl)
{
- void *p_virt = OSAL_NULL;
- u8 *p_pbl_virt = OSAL_NULL;
- void **pp_virt_addr_tbl = OSAL_NULL;
- dma_addr_t p_phys = 0, p_pbl_phys = 0;
u32 page_cnt = p_chain->page_cnt, size, i;
+ dma_addr_t p_phys = 0, p_pbl_phys = 0;
+ void **pp_virt_addr_tbl = OSAL_NULL;
+ u8 *p_pbl_virt = OSAL_NULL;
+ void *p_virt = OSAL_NULL;
size = page_cnt * sizeof(*pp_virt_addr_tbl);
pp_virt_addr_tbl = (void **)OSAL_VZALLOC(p_dev, size);
#ifndef LINUX_REMOVE
#define CRC8_INIT_VALUE 0xFF
-#define CRC8_TABLE_SIZE 256
#endif
static u8 cdu_crc8_table[CRC8_TABLE_SIZE];
struct ecore_ptt *p_ptt,
enum ecore_ov_client client)
{
- enum _ecore_status_t rc;
u32 resp = 0, param = 0;
u32 drv_mb_param;
+ enum _ecore_status_t rc;
switch (client) {
case ECORE_OV_CLIENT_DRV:
struct ecore_ptt *p_ptt,
enum ecore_ov_driver_state drv_state)
{
- enum _ecore_status_t rc;
u32 resp = 0, param = 0;
u32 drv_mb_param;
+ enum _ecore_status_t rc;
switch (drv_state) {
case ECORE_OV_DRIVER_STATE_NOT_LOADED:
static void ecore_spq_hw_initialize(struct ecore_hwfn *p_hwfn,
struct ecore_spq *p_spq)
{
- struct ecore_cxt_info cxt_info;
struct e4_core_conn_context *p_cxt;
- enum _ecore_status_t rc;
+ struct ecore_cxt_info cxt_info;
u16 physical_q;
+ enum _ecore_status_t rc;
cxt_info.iid = p_spq->cid;