common/mlx5: update MMO HCA capabilities
authorRaja Zidane <rzidane@nvidia.com>
Tue, 5 Oct 2021 12:27:30 +0000 (12:27 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 5 Oct 2021 16:15:40 +0000 (18:15 +0200)
New MMO HCA capabilities were added and others were renamed.
Align hca capabilities with new prm.
Add support in DevX interface for changes in HCA capabilities.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h
drivers/common/mlx5/mlx5_prm.h
drivers/compress/mlx5/mlx5_compress.c

index ac554cc..00c78b1 100644 (file)
@@ -858,9 +858,18 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
        attr->log_max_srq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq_sz);
        attr->reg_c_preserve =
                MLX5_GET(cmd_hca_cap, hcattr, reg_c_preserve);
-       attr->mmo_dma_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo);
-       attr->mmo_compress_en = MLX5_GET(cmd_hca_cap, hcattr, compress);
-       attr->mmo_decompress_en = MLX5_GET(cmd_hca_cap, hcattr, decompress);
+       attr->mmo_regex_qp_en = MLX5_GET(cmd_hca_cap, hcattr, regexp_mmo_qp);
+       attr->mmo_regex_sq_en = MLX5_GET(cmd_hca_cap, hcattr, regexp_mmo_sq);
+       attr->mmo_dma_sq_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo_sq);
+       attr->mmo_compress_sq_en = MLX5_GET(cmd_hca_cap, hcattr,
+                       compress_mmo_sq);
+       attr->mmo_decompress_sq_en = MLX5_GET(cmd_hca_cap, hcattr,
+                       decompress_mmo_sq);
+       attr->mmo_dma_qp_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo_qp);
+       attr->mmo_compress_qp_en = MLX5_GET(cmd_hca_cap, hcattr,
+                       compress_mmo_qp);
+       attr->mmo_decompress_qp_en = MLX5_GET(cmd_hca_cap, hcattr,
+                       decompress_mmo_qp);
        attr->compress_min_block_size = MLX5_GET(cmd_hca_cap, hcattr,
                                                 compress_min_block_size);
        attr->log_max_mmo_dma = MLX5_GET(cmd_hca_cap, hcattr, log_dma_mmo_size);
index c071629..b21df0f 100644 (file)
@@ -173,9 +173,14 @@ struct mlx5_hca_attr {
        uint32_t log_max_srq;
        uint32_t log_max_srq_sz;
        uint32_t rss_ind_tbl_cap;
-       uint32_t mmo_dma_en:1;
-       uint32_t mmo_compress_en:1;
-       uint32_t mmo_decompress_en:1;
+       uint32_t mmo_dma_sq_en:1;
+       uint32_t mmo_compress_sq_en:1;
+       uint32_t mmo_decompress_sq_en:1;
+       uint32_t mmo_dma_qp_en:1;
+       uint32_t mmo_compress_qp_en:1;
+       uint32_t mmo_decompress_qp_en:1;
+       uint32_t mmo_regex_qp_en:1;
+       uint32_t mmo_regex_sq_en:1;
        uint32_t compress_min_block_size:4;
        uint32_t log_max_mmo_dma:5;
        uint32_t log_max_mmo_compress:5;
index d361bcf..ec5f871 100644 (file)
@@ -1386,10 +1386,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8 rtr2rts_qp_counters_set_id[0x1];
        u8 rts2rts_udp_sport[0x1];
        u8 rts2rts_lag_tx_port_affinity[0x1];
-       u8 dma_mmo[0x1];
+       u8 dma_mmo_sq[0x1];
        u8 compress_min_block_size[0x4];
-       u8 compress[0x1];
-       u8 decompress[0x1];
+       u8 compress_mmo_sq[0x1];
+       u8 decompress_mmo_sq[0x1];
        u8 log_max_ra_res_qp[0x6];
        u8 end_pad[0x1];
        u8 cc_query_allowed[0x1];
@@ -1519,7 +1519,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8 num_lag_ports[0x4];
        u8 reserved_at_280[0x10];
        u8 max_wqe_sz_sq[0x10];
-       u8 reserved_at_2a0[0x10];
+       u8 reserved_at_2a0[0xc];
+       u8 regexp_mmo_sq[0x1];
+       u8 reserved_at_2b0[0x3];
        u8 max_wqe_sz_rq[0x10];
        u8 max_flow_counter_31_16[0x10];
        u8 max_wqe_sz_sq_dc[0x10];
@@ -1632,7 +1634,12 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8 num_vhca_ports[0x8];
        u8 reserved_at_618[0x6];
        u8 sw_owner_id[0x1];
-       u8 reserved_at_61f[0x1e1];
+       u8 reserved_at_61f[0x109];
+       u8 dma_mmo_qp[0x1];
+       u8 regexp_mmo_qp[0x1];
+       u8 compress_mmo_qp[0x1];
+       u8 decompress_mmo_qp[0x1];
+       u8 reserved_at_624[0xd4];
 };
 
 struct mlx5_ifc_qos_cap_bits {
@@ -3244,7 +3251,8 @@ struct mlx5_ifc_create_qp_in_bits {
        u8 uid[0x10];
        u8 reserved_at_20[0x10];
        u8 op_mod[0x10];
-       u8 reserved_at_40[0x40];
+       u8 qpc_ext[0x1];
+       u8 reserved_at_41[0x3f];
        u8 opt_param_mask[0x20];
        u8 reserved_at_a0[0x20];
        struct mlx5_ifc_qpc_bits qpc;
index c5e0a83..1e03030 100644 (file)
@@ -813,8 +813,8 @@ mlx5_compress_dev_probe(struct rte_device *dev)
                return -rte_errno;
        }
        if (mlx5_devx_cmd_query_hca_attr(ctx, &att) != 0 ||
-           att.mmo_compress_en == 0 || att.mmo_decompress_en == 0 ||
-           att.mmo_dma_en == 0) {
+           att.mmo_compress_sq_en == 0 || att.mmo_decompress_sq_en == 0 ||
+           att.mmo_dma_sq_en == 0) {
                DRV_LOG(ERR, "Not enough capabilities to support compress "
                        "operations, maybe old FW/OFED version?");
                claim_zero(mlx5_glue->close_device(ctx));