net/sfc/base: add API to allocate and free RSS contexts
authorMark Spender <mspender@solarflare.com>
Wed, 30 Aug 2017 18:17:36 +0000 (19:17 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 6 Oct 2017 00:49:47 +0000 (02:49 +0200)
Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
drivers/net/sfc/base/ef10_impl.h
drivers/net/sfc/base/ef10_rx.c
drivers/net/sfc/base/efx.h
drivers/net/sfc/base/efx_impl.h
drivers/net/sfc/base/efx_rx.c

index 86b723f..71a68d7 100644 (file)
@@ -897,6 +897,18 @@ ef10_rx_scatter_enable(
 
 #if EFSYS_OPT_RX_SCALE
 
+extern __checkReturn   efx_rc_t
+ef10_rx_scale_context_alloc(
+       __in            efx_nic_t *enp,
+       __in            efx_rx_scale_context_type_t type,
+       __in            uint32_t num_queues,
+       __out           uint32_t *rss_contextp);
+
+extern __checkReturn   efx_rc_t
+ef10_rx_scale_context_free(
+       __in            efx_nic_t *enp,
+       __in            uint32_t rss_context);
+
 extern __checkReturn   efx_rc_t
 ef10_rx_scale_mode_set(
        __in            efx_nic_t *enp,
index 9bd5353..8dd6572 100644 (file)
@@ -489,6 +489,48 @@ ef10_rx_scatter_enable(
 }
 #endif /* EFSYS_OPT_RX_SCATTER */
 
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+ef10_rx_scale_context_alloc(
+       __in            efx_nic_t *enp,
+       __in            efx_rx_scale_context_type_t type,
+       __in            uint32_t num_queues,
+       __out           uint32_t *rss_contextp)
+{
+       efx_rc_t rc;
+
+       rc = efx_mcdi_rss_context_alloc(enp, type, num_queues, rss_contextp);
+       if (rc != 0)
+               goto fail1;
+
+       return (0);
+
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
+
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+ef10_rx_scale_context_free(
+       __in            efx_nic_t *enp,
+       __in            uint32_t rss_context)
+{
+       efx_rc_t rc;
+
+       rc = efx_mcdi_rss_context_free(enp, rss_context);
+       if (rc != 0)
+               goto fail1;
+
+       return (0);
+
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
+
 #if EFSYS_OPT_RX_SCALE
        __checkReturn   efx_rc_t
 ef10_rx_scale_mode_set(
index 7d370f4..0bca7d9 100644 (file)
@@ -1926,6 +1926,18 @@ efx_rx_scale_default_support_get(
        __in            efx_nic_t *enp,
        __out           efx_rx_scale_context_type_t *typep);
 
+extern __checkReturn   efx_rc_t
+efx_rx_scale_context_alloc(
+       __in            efx_nic_t *enp,
+       __in            efx_rx_scale_context_type_t type,
+       __in            uint32_t num_queues,
+       __out           uint32_t *rss_contextp);
+
+extern __checkReturn   efx_rc_t
+efx_rx_scale_context_free(
+       __in            efx_nic_t *enp,
+       __in            uint32_t rss_context);
+
 extern __checkReturn   efx_rc_t
 efx_rx_scale_mode_set(
        __in    efx_nic_t *enp,
index f20c97f..c7ed067 100644 (file)
@@ -152,6 +152,10 @@ typedef struct efx_rx_ops_s {
        efx_rc_t        (*erxo_scatter_enable)(efx_nic_t *, unsigned int);
 #endif
 #if EFSYS_OPT_RX_SCALE
+       efx_rc_t        (*erxo_scale_context_alloc)(efx_nic_t *,
+                                                   efx_rx_scale_context_type_t,
+                                                   uint32_t, uint32_t *);
+       efx_rc_t        (*erxo_scale_context_free)(efx_nic_t *, uint32_t);
        efx_rc_t        (*erxo_scale_mode_set)(efx_nic_t *, efx_rx_hash_alg_t,
                                               efx_rx_hash_type_t, boolean_t);
        efx_rc_t        (*erxo_scale_key_set)(efx_nic_t *, uint8_t *, size_t);
index 41fc17e..d587f08 100644 (file)
@@ -149,6 +149,8 @@ static const efx_rx_ops_t __efx_rx_siena_ops = {
        siena_rx_scatter_enable,                /* erxo_scatter_enable */
 #endif
 #if EFSYS_OPT_RX_SCALE
+       NULL,                                   /* erxo_scale_context_alloc */
+       NULL,                                   /* erxo_scale_context_free */
        siena_rx_scale_mode_set,                /* erxo_scale_mode_set */
        siena_rx_scale_key_set,                 /* erxo_scale_key_set */
        siena_rx_scale_tbl_set,                 /* erxo_scale_tbl_set */
@@ -176,6 +178,8 @@ static const efx_rx_ops_t __efx_rx_ef10_ops = {
        ef10_rx_scatter_enable,                 /* erxo_scatter_enable */
 #endif
 #if EFSYS_OPT_RX_SCALE
+       ef10_rx_scale_context_alloc,            /* erxo_scale_context_alloc */
+       ef10_rx_scale_context_free,             /* erxo_scale_context_free */
        ef10_rx_scale_mode_set,                 /* erxo_scale_mode_set */
        ef10_rx_scale_key_set,                  /* erxo_scale_key_set */
        ef10_rx_scale_tbl_set,                  /* erxo_scale_tbl_set */
@@ -360,7 +364,71 @@ fail1:
 
        return (rc);
 }
+#endif /* EFSYS_OPT_RX_SCALE */
+
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+efx_rx_scale_context_alloc(
+       __in            efx_nic_t *enp,
+       __in            efx_rx_scale_context_type_t type,
+       __in            uint32_t num_queues,
+       __out           uint32_t *rss_contextp)
+{
+       const efx_rx_ops_t *erxop = enp->en_erxop;
+       efx_rc_t rc;
+
+       EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+       EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
+
+       if (erxop->erxo_scale_context_alloc == NULL) {
+               rc = ENOTSUP;
+               goto fail1;
+       }
+       if ((rc = erxop->erxo_scale_context_alloc(enp, type,
+                           num_queues, rss_contextp)) != 0) {
+               goto fail2;
+       }
+
+       return (0);
+
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
 
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+efx_rx_scale_context_free(
+       __in            efx_nic_t *enp,
+       __in            uint32_t rss_context)
+{
+       const efx_rx_ops_t *erxop = enp->en_erxop;
+       efx_rc_t rc;
+
+       EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+       EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
+
+       if (erxop->erxo_scale_context_free == NULL) {
+               rc = ENOTSUP;
+               goto fail1;
+       }
+       if ((rc = erxop->erxo_scale_context_free(enp, rss_context)) != 0)
+               goto fail2;
+
+       return (0);
+
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
+
+#if EFSYS_OPT_RX_SCALE
        __checkReturn   efx_rc_t
 efx_rx_scale_mode_set(
        __in            efx_nic_t *enp,