struct mlx5_counter_ctrl info[MLX5_MAX_XSTATS];
};
+struct mlx5_stats_ctrl {
+ /* Base for imissed counter. */
+ uint64_t imissed_base;
+};
+
/* Flow list . */
TAILQ_HEAD(mlx5_flows, rte_flow);
LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps;
uint32_t link_speed_capa; /* Link speed capabilities. */
struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
+ struct mlx5_stats_ctrl stats_ctrl; /* Stats control. */
int primary_socket; /* Unix socket for primary process. */
void *uar_base; /* Reserved address space for UAR mapping */
struct rte_intr_handle intr_handle_socket; /* Interrupt handler. */
/* mlx5_stats.c */
-void mlx5_xstats_init(struct rte_eth_dev *dev);
+void mlx5_stats_init(struct rte_eth_dev *dev);
int mlx5_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats);
void mlx5_stats_reset(struct rte_eth_dev *dev);
int mlx5_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *stats,
.dpdk_name = "rx_packets_phy",
.ctr_name = "rx_packets_phy",
},
+ {
+ .dpdk_name = "tx_discards_phy",
+ .ctr_name = "tx_discards_phy",
+ },
+ {
+ .dpdk_name = "rx_discards_phy",
+ .ctr_name = "rx_discards_phy",
+ },
{
.dpdk_name = "tx_bytes_phy",
.ctr_name = "tx_bytes_phy",
static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init);
+static inline void
+mlx5_read_ib_stat(struct priv *priv, const char *ctr_name, uint64_t *stat)
+{
+ FILE *file;
+ MKSTR(path, "%s/ports/1/hw_counters/%s",
+ priv->ibdev_path,
+ ctr_name);
+
+ file = fopen(path, "rb");
+ if (file) {
+ int n = fscanf(file, "%" SCNu64, stat);
+
+ fclose(file);
+ if (n != 1)
+ stat = 0;
+ }
+}
+
/**
* Read device counters table.
*
}
for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) {
if (xstats_ctrl->info[i].ib) {
- FILE *file;
- MKSTR(path, "%s/ports/1/hw_counters/%s",
- priv->ibdev_path,
- xstats_ctrl->info[i].ctr_name);
-
- file = fopen(path, "rb");
- if (file) {
- int n = fscanf(file, "%" SCNu64, &stats[i]);
-
- fclose(file);
- if (n != 1)
- stats[i] = 0;
- }
+ mlx5_read_ib_stat(priv, xstats_ctrl->info[i].ctr_name,
+ &stats[i]);
} else {
stats[i] = (uint64_t)
et_stats->data[xstats_ctrl->dev_table_idx[i]];
* Pointer to Ethernet device.
*/
void
-mlx5_xstats_init(struct rte_eth_dev *dev)
+mlx5_stats_init(struct rte_eth_dev *dev)
{
struct priv *priv = dev->data->dev_private;
struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl;
+ struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl;
unsigned int i;
unsigned int j;
struct ifreq ifr;
if (ret)
DRV_LOG(ERR, "port %u cannot read device counters: %s",
dev->data->port_id, strerror(rte_errno));
+ mlx5_read_ib_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base);
free:
rte_free(strings);
}
if (stats_n < 0)
return stats_n;
if (xstats_ctrl->stats_n != stats_n)
- mlx5_xstats_init(dev);
+ mlx5_stats_init(dev);
ret = mlx5_read_dev_counters(dev, counters);
if (ret)
return ret;
#endif
tmp.oerrors += txq->stats.oerrors;
}
+ mlx5_read_ib_stat(priv, "out_of_buffer", &tmp.imissed);
+ tmp.imissed -= priv->stats_ctrl.imissed_base;
#ifndef MLX5_PMD_SOFT_COUNTERS
/* FIXME: retrieve and add hardware counters. */
#endif
mlx5_stats_reset(struct rte_eth_dev *dev)
{
struct priv *priv = dev->data->dev_private;
+ struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl;
unsigned int i;
unsigned int idx;
(*priv->txqs)[i]->stats =
(struct mlx5_txq_stats){ .idx = idx };
}
+ mlx5_read_ib_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base);
#ifndef MLX5_PMD_SOFT_COUNTERS
/* FIXME: reset hardware counters. */
#endif
return;
}
if (xstats_ctrl->stats_n != stats_n)
- mlx5_xstats_init(dev);
+ mlx5_stats_init(dev);
ret = mlx5_read_dev_counters(dev, counters);
if (ret) {
DRV_LOG(ERR, "port %u cannot read device counters: %s",