}
rxq->next_to_use = 0;
- rxq->next_to_clean = 0;
- rxq->nb_rx_hold = 0;
+ rxq->rx_free_hold = 0;
hns3_init_rx_queue_hw(rxq);
return 0;
rxq = (struct hns3_rx_queue *)hw->fkq_data.rx_queues[idx];
rxq->next_to_use = 0;
- rxq->next_to_clean = 0;
- rxq->nb_rx_hold = 0;
+ rxq->rx_free_hold = 0;
hns3_init_rx_queue_hw(rxq);
}
rxq->hns = hns;
rxq->mb_pool = mp;
- if (conf->rx_free_thresh <= 0)
- rxq->rx_free_thresh = DEFAULT_RX_FREE_THRESH;
- else
- rxq->rx_free_thresh = conf->rx_free_thresh;
+ rxq->rx_free_thresh = (conf->rx_free_thresh > 0) ?
+ conf->rx_free_thresh : HNS3_DEFAULT_RX_FREE_THRESH;
rxq->rx_deferred_start = conf->rx_deferred_start;
rx_entry_len = sizeof(struct hns3_entry) * rxq->nb_rx_desc;
}
rxq->next_to_use = 0;
- rxq->next_to_clean = 0;
- rxq->nb_rx_hold = 0;
+ rxq->rx_free_hold = 0;
rxq->pkt_first_seg = NULL;
rxq->pkt_last_seg = NULL;
rxq->port_id = dev->data->port_id;
nb_rx_bd = 0;
rxq = rx_queue;
- rx_id = rxq->next_to_clean;
+ rx_id = rxq->next_to_use;
rx_ring = rxq->rx_ring;
+ sw_ring = rxq->sw_ring;
first_seg = rxq->pkt_first_seg;
last_seg = rxq->pkt_last_seg;
- sw_ring = rxq->sw_ring;
while (nb_rx < nb_pkts) {
rxdp = &rx_ring[rx_id];
first_seg = NULL;
}
- rxq->next_to_clean = rx_id;
+ rxq->next_to_use = rx_id;
rxq->pkt_first_seg = first_seg;
rxq->pkt_last_seg = last_seg;
- nb_rx_bd = nb_rx_bd + rxq->nb_rx_hold;
- if (nb_rx_bd > rxq->rx_free_thresh) {
- hns3_clean_rx_buffers(rxq, nb_rx_bd);
- nb_rx_bd = 0;
+ rxq->rx_free_hold += nb_rx_bd;
+ if (rxq->rx_free_hold > rxq->rx_free_thresh) {
+ hns3_clean_rx_buffers(rxq, rxq->rx_free_hold);
+ rxq->rx_free_hold = 0;
}
- rxq->nb_rx_hold = nb_rx_bd;
return nb_rx;
}
#define HNS3_DEFAULT_RING_DESC 1024
#define HNS3_ALIGN_RING_DESC 32
#define HNS3_RING_BASE_ALIGN 128
+#define HNS3_DEFAULT_RX_FREE_THRESH 32
#define HNS3_512_BD_BUF_SIZE 512
#define HNS3_1K_BD_BUF_SIZE 1024
uint16_t queue_id;
uint16_t port_id;
uint16_t nb_rx_desc;
- uint16_t nb_rx_hold;
- uint16_t rx_tail;
- uint16_t next_to_clean;
uint16_t next_to_use;
uint16_t rx_buf_len;
+ /*
+ * threshold for the number of BDs waited to passed to hardware. If the
+ * number exceeds the threshold, driver will pass these BDs to hardware.
+ */
uint16_t rx_free_thresh;
+ uint16_t rx_free_hold; /* num of BDs waited to passed to hardware */
/*
* port based vlan configuration state.