common/mlx5: read tunneling capabilities from DevX

mlx5 in Windows needs the tunneling hca capabilities
to query the NIC for Inner TSO offloading support.

Added the capability as part of the capabilities
queried by the PMD using DevX.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index ee2388caa9b8706ae72577003181f1f0cdaa4495..372da993b3fc643aa148a3eb57bc1dec47a5f480 100644 (file)
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1002,6 +1002,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
                                          hcattr, tunnel_lro_vxlan);
        attr->swp = MLX5_GET(per_protocol_networking_offload_caps,
                                          hcattr, swp);
+       attr->tunnel_stateless_gre =
+                               MLX5_GET(per_protocol_networking_offload_caps,
+                                         hcattr, tunnel_stateless_gre);
+       attr->tunnel_stateless_vxlan =
+                               MLX5_GET(per_protocol_networking_offload_caps,
+                                         hcattr, tunnel_stateless_vxlan);
        attr->swp_csum = MLX5_GET(per_protocol_networking_offload_caps,
                                          hcattr, swp_csum);
        attr->swp_lso = MLX5_GET(per_protocol_networking_offload_caps,

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 857a4e7a634d0c4176d49eb6ba6229cf2c6650a1..f65dfc0397e451f4bd89b199ea9686a42c909724 100644 (file)
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -116,6 +116,8 @@ struct mlx5_hca_attr {
        uint32_t lro_cap:1;
        uint32_t tunnel_lro_gre:1;
        uint32_t tunnel_lro_vxlan:1;
+       uint32_t tunnel_stateless_gre:1;
+       uint32_t tunnel_stateless_vxlan:1;
        uint32_t swp:1;
        uint32_t swp_csum:1;
        uint32_t swp_lso:1;