eal/arm: fix build with gcc optimization level 0

GCC build with '-O0' on platforms with RTE_ARM_FEATURE_ATOMICS set
failed for:
 ../lib/librte_efd/rte_efd.c
 Assembler messages:
3866: Error: selected processor does not support `crc32cb w0,w0,w1'
3890: Error: selected processor does not support `crc32ch w0,w0,w1'
3914: Error: selected processor does not support `crc32cw w0,w0,w1'
3938: Error: selected processor does not support `crc32cx w0,w0,x1'

This was caused by an architecture specifier added for Clang.
Unlike Clang, GCC considers each inline assembly block to be dependent
and therefore, the architecture specifier impacts assemble of some
blocks require certain extension support.

Removed the architecture for GCC to fix the issue.

Fixes: 8fce34cd0a6a ("eal/arm: fix clang build of native target")
Cc: stable@dpdk.org
Reported-by: Feifei Wang <feifei.wang2@arm.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h
index 7fcd174..467d32a 100644 (file)
--- a/lib/librte_eal/arm/include/rte_atomic_64.h
+++ b/lib/librte_eal/arm/include/rte_atomic_64.h
@@ -46,7 +46,11 @@ rte_atomic_thread_fence(int memorder)
 /*------------------------ 128 bit atomic operations -------------------------*/
 
 #if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)
+#if defined(RTE_CC_CLANG)
 #define __LSE_PREAMBLE ".arch armv8-a+lse\n"
+#else
+#define __LSE_PREAMBLE ""
+#endif
 
 #define __ATOMIC128_CAS_OP(cas_op_name, op_string)                          \
 static __rte_noinline rte_int128_t                                          \