net/mlx5: fix LAG representor probing on PF1 PCI
authorXueming Li <xuemingl@nvidia.com>
Mon, 10 May 2021 13:13:42 +0000 (16:13 +0300)
committerThomas Monjalon <thomas@monjalon.net>
Wed, 12 May 2021 10:17:45 +0000 (12:17 +0200)
In case of bonding, orchestrator wants to use same devargs for LAG and
non-LAG scenario to probe representor on PF1 using PF1 PCI address
like "<DBDF_PF1>,representor=pf1vf[0-3]".

This patch changes PCI address check policy to allow PF1 PCI address for
representors on PF1.

Note: detaching PF0 device can't remove representors on PF1. It's
recommended to use primary(PF0) PCI address to probe representors on
both PFs.

Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/linux/mlx5_os.c

index 41b3e07..ef7ccba 100644 (file)
@@ -1879,11 +1879,14 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
                                tmp_str);
                        break;
                }
-               /* Match PCI address. */
+               /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
                if (pci_dev->domain == pci_addr.domain &&
                    pci_dev->bus == pci_addr.bus &&
                    pci_dev->devid == pci_addr.devid &&
-                   pci_dev->function + owner == pci_addr.function)
+                   ((pci_dev->function == 0 &&
+                     pci_dev->function + owner == pci_addr.function) ||
+                    (pci_dev->function == owner &&
+                     pci_addr.function == owner)))
                        pf = info.port_name;
                /* Get ifindex. */
                snprintf(tmp_str, sizeof(tmp_str),